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microinstruction: Update ReadsFromAndWritesToFPSRCumulativeExceptionBits

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This commit is contained in:
MerryMage 2018-07-25 19:17:07 +01:00
parent 10de36394e
commit ddcff86f9c
1 changed files with 10 additions and 7 deletions
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17
src/frontend/ir/microinstruction.cpp
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@ -249,8 +249,6 @@ bool Inst::WritesToFPSRCumulativeExceptionBits() const {
bool Inst::ReadsFromAndWritesToFPSRCumulativeExceptionBits() const { bool Inst::ReadsFromAndWritesToFPSRCumulativeExceptionBits() const {
switch (op) { switch (op) {
case Opcode::FPAbs32:
case Opcode::FPAbs64:
case Opcode::FPAdd32: case Opcode::FPAdd32:
case Opcode::FPAdd64: case Opcode::FPAdd64:
case Opcode::FPCompare32: case Opcode::FPCompare32:
@ -269,8 +267,10 @@ bool Inst::ReadsFromAndWritesToFPSRCumulativeExceptionBits() const {
case Opcode::FPMul64: case Opcode::FPMul64:
case Opcode::FPMulAdd32: case Opcode::FPMulAdd32:
case Opcode::FPMulAdd64: case Opcode::FPMulAdd64:
case Opcode::FPNeg32: case Opcode::FPRecipEstimate32:
case Opcode::FPNeg64: case Opcode::FPRecipEstimate64:
case Opcode::FPRecipStepFused32:
case Opcode::FPRecipStepFused64:
case Opcode::FPRoundInt32: case Opcode::FPRoundInt32:
case Opcode::FPRoundInt64: case Opcode::FPRoundInt64:
case Opcode::FPRSqrtEstimate32: case Opcode::FPRSqrtEstimate32:
@ -299,9 +299,6 @@ bool Inst::ReadsFromAndWritesToFPSRCumulativeExceptionBits() const {
case Opcode::FPS32ToDouble: case Opcode::FPS32ToDouble:
case Opcode::FPS64ToDouble: case Opcode::FPS64ToDouble:
case Opcode::FPS64ToSingle: case Opcode::FPS64ToSingle:
case Opcode::FPVectorAbs16:
case Opcode::FPVectorAbs32:
case Opcode::FPVectorAbs64:
case Opcode::FPVectorAdd32: case Opcode::FPVectorAdd32:
case Opcode::FPVectorAdd64: case Opcode::FPVectorAdd64:
case Opcode::FPVectorDiv32: case Opcode::FPVectorDiv32:
@ -314,10 +311,16 @@ bool Inst::ReadsFromAndWritesToFPSRCumulativeExceptionBits() const {
case Opcode::FPVectorGreaterEqual64: case Opcode::FPVectorGreaterEqual64:
case Opcode::FPVectorMul32: case Opcode::FPVectorMul32:
case Opcode::FPVectorMul64: case Opcode::FPVectorMul64:
case Opcode::FPVectorMulAdd32:
case Opcode::FPVectorMulAdd64:
case Opcode::FPVectorPairedAddLower32: case Opcode::FPVectorPairedAddLower32:
case Opcode::FPVectorPairedAddLower64: case Opcode::FPVectorPairedAddLower64:
case Opcode::FPVectorPairedAdd32: case Opcode::FPVectorPairedAdd32:
case Opcode::FPVectorPairedAdd64: case Opcode::FPVectorPairedAdd64:
case Opcode::FPVectorRecipEstimate32:
case Opcode::FPVectorRecipEstimate64:
case Opcode::FPVectorRecipStepFused32:
case Opcode::FPVectorRecipStepFused64:
case Opcode::FPVectorRSqrtEstimate32: case Opcode::FPVectorRSqrtEstimate32:
case Opcode::FPVectorRSqrtEstimate64: case Opcode::FPVectorRSqrtEstimate64:
case Opcode::FPVectorRSqrtStepFused32: case Opcode::FPVectorRSqrtStepFused32: