From e27733464b74162971b64597b1e29c5dd8259cb4 Mon Sep 17 00:00:00 2001 From: merry Date: Sat, 2 Apr 2022 19:33:15 +0100 Subject: [PATCH] emit_x64_memory: Always order exclusive accesses --- src/dynarmic/backend/x64/emit_x64_memory.cpp.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc b/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc index 74899034..55008ca2 100644 --- a/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc +++ b/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc @@ -303,7 +303,7 @@ void AxxEmitX64::EmitExclusiveReadMemoryInline(AxxEmitContext& ctx, IR::Inst* in } auto args = ctx.reg_alloc.GetArgumentInfo(inst); - const bool ordered = IsOrdered(args[1].GetImmediateAccType()); + const bool ordered = true; const Xbyak::Reg64 vaddr = ctx.reg_alloc.UseGpr(args[0]); const int value_idx = bitsize == 128 ? ctx.reg_alloc.ScratchXmm().getIdx() : ctx.reg_alloc.ScratchGpr().getIdx(); @@ -370,7 +370,7 @@ void AxxEmitX64::EmitExclusiveWriteMemoryInline(AxxEmitContext& ctx, IR::Inst* i } auto args = ctx.reg_alloc.GetArgumentInfo(inst); - const bool ordered = IsOrdered(args[2].GetImmediateAccType()); + const bool ordered = true; const auto value = [&] { if constexpr (bitsize == 128) {