diff --git a/src/frontend/translate/translate_arm/exception_generating.cpp b/src/frontend/translate/translate_arm/exception_generating.cpp
index bf25ce20..50f83029 100644
--- a/src/frontend/translate/translate_arm/exception_generating.cpp
+++ b/src/frontend/translate/translate_arm/exception_generating.cpp
@@ -17,8 +17,10 @@ bool ArmTranslatorVisitor::arm_SVC(Cond cond, Imm24 imm24) {
     u32 imm32 = imm24;
     // SVC<c> #<imm24>
     if (ConditionPassed(cond)) {
+        ir.BranchWritePC(ir.Imm32(ir.current_location.PC() + 4));
         ir.CallSupervisor(ir.Imm32(imm32));
-        return LinkToNextInstruction();
+        ir.SetTerm(IR::Term::ReturnToDispatch{});
+        return false;
     }
     return true;
 }
diff --git a/src/frontend/translate/translate_thumb.cpp b/src/frontend/translate/translate_thumb.cpp
index 3a1178ab..a334de35 100644
--- a/src/frontend/translate/translate_thumb.cpp
+++ b/src/frontend/translate/translate_thumb.cpp
@@ -769,6 +769,7 @@ struct ThumbTranslatorVisitor final {
     bool thumb16_SVC(Imm8 imm8) {
         u32 imm32 = imm8;
         // SVC #<imm8>
+        ir.BranchWritePC(ir.Imm32(ir.current_location.PC() + 2));
         ir.CallSupervisor(ir.Imm32(imm32));
         ir.SetTerm(IR::Term::ReturnToDispatch{});
         return false;