From ee9a81dcba213252d755f84be1b9a96262b2bedd Mon Sep 17 00:00:00 2001 From: Lioncash Date: Sat, 16 May 2020 13:27:39 -0400 Subject: [PATCH] A32: Implement ASIMD VBIT (register) --- src/frontend/A32/decoder/asimd.inc | 2 +- src/frontend/A32/translate/impl/asimd_three_same.cpp | 6 ++++++ src/frontend/A32/translate/impl/translate_arm.h | 1 + 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/src/frontend/A32/decoder/asimd.inc b/src/frontend/A32/decoder/asimd.inc index e81f0e41..72264630 100644 --- a/src/frontend/A32/decoder/asimd.inc +++ b/src/frontend/A32/decoder/asimd.inc @@ -8,7 +8,7 @@ INST(asimd_VORR_reg, "VORR (register)", "111100100D10nnnndddd000 INST(asimd_VORN_reg, "VORN (register)", "111100100D11nnnndddd0001NQM1mmmm") // ASIMD INST(asimd_VEOR_reg, "VEOR (register)", "111100110D00nnnndddd0001NQM1mmmm") // ASIMD INST(asimd_VBSL, "VBSL", "111100110D01nnnndddd0001NQM1mmmm") // ASIMD -//INST(asimd_VBIT, "VBIT", "111100110-10--------0001---1----") // ASIMD +INST(asimd_VBIT, "VBIT", "111100110D10nnnndddd0001NQM1mmmm") // ASIMD //INST(asimd_VBIF, "VBIF", "111100110-11--------0001---1----") // ASIMD //INST(asimd_VHADD, "VHADD", "1111001U0-CC--------0010---0----") // ASIMD //INST(asimd_VQSUB, "VQSUB", "1111001U0-CC--------0010---1----") // ASIMD diff --git a/src/frontend/A32/translate/impl/asimd_three_same.cpp b/src/frontend/A32/translate/impl/asimd_three_same.cpp index d660f9d7..5199174e 100644 --- a/src/frontend/A32/translate/impl/asimd_three_same.cpp +++ b/src/frontend/A32/translate/impl/asimd_three_same.cpp @@ -92,4 +92,10 @@ bool ArmTranslatorVisitor::asimd_VBSL(bool D, size_t Vn, size_t Vd, bool N, bool return ir.Or(ir.And(reg_n, reg_d), ir.And(reg_m, ir.Not(reg_d))); }); } + +bool ArmTranslatorVisitor::asimd_VBIT(bool D, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm) { + return BitwiseInstructionWithDst(*this, D, Vn, Vd, N, Q, M, Vm, [this](const auto& reg_d, const auto& reg_n, const auto& reg_m) { + return ir.Or(ir.And(reg_n, reg_m), ir.And(reg_d, ir.Not(reg_m))); + }); +} } // namespace Dynarmic::A32 diff --git a/src/frontend/A32/translate/impl/translate_arm.h b/src/frontend/A32/translate/impl/translate_arm.h index ae474a9b..a235abf0 100644 --- a/src/frontend/A32/translate/impl/translate_arm.h +++ b/src/frontend/A32/translate/impl/translate_arm.h @@ -436,6 +436,7 @@ struct ArmTranslatorVisitor final { bool asimd_VORN_reg(bool D, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm); bool asimd_VEOR_reg(bool D, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm); bool asimd_VBSL(bool D, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm); + bool asimd_VBIT(bool D, size_t Vn, size_t Vd, bool N, bool Q, bool M, size_t Vm); // Advanced SIMD load/store structures bool v8_VLD_multiple(bool D, Reg n, size_t Vd, Imm<4> type, size_t sz, size_t align, Reg m);