diff --git a/src/frontend/A32/decoder/thumb32.h b/src/frontend/A32/decoder/thumb32.h
index 7b9c5c01..02da295a 100644
--- a/src/frontend/A32/decoder/thumb32.h
+++ b/src/frontend/A32/decoder/thumb32.h
@@ -248,7 +248,7 @@ std::optional<std::reference_wrapper<const Thumb32Matcher<V>>> DecodeThumb32(u32
         INST(&V::thumb32_QADD8,          "QADD8",                    "111110101000nnnn1111dddd0001mmmm"),
         INST(&V::thumb32_QSUB8,          "QSUB8",                    "111110101100nnnn1111dddd0001mmmm"),
         INST(&V::thumb32_SHADD16,        "SHADD16",                  "111110101001nnnn1111dddd0010mmmm"),
-        //INST(&V::thumb32_SHASX,          "SHASX",                    "111110101010----1111----0010----"),
+        INST(&V::thumb32_SHASX,          "SHASX",                    "111110101010nnnn1111dddd0010mmmm"),
         //INST(&V::thumb32_SHSAX,          "SHSAX",                    "111110101110----1111----0010----"),
         //INST(&V::thumb32_SHSUB16,        "SHSUB16",                  "111110101101----1111----0010----"),
         //INST(&V::thumb32_SHADD8,         "SHADD8",                   "111110101000----1111----0010----"),
@@ -268,7 +268,7 @@ std::optional<std::reference_wrapper<const Thumb32Matcher<V>>> DecodeThumb32(u32
         INST(&V::thumb32_UQADD8,         "UQADD8",                   "111110101000nnnn1111dddd0101mmmm"),
         INST(&V::thumb32_UQSUB8,         "UQSUB8",                   "111110101100nnnn1111dddd0101mmmm"),
         INST(&V::thumb32_UHADD16,        "UHADD16",                  "111110101001nnnn1111dddd0110mmmm"),
-        //INST(&V::thumb32_UHASX,          "UHASX",                    "111110101010----1111----0110----"),
+        INST(&V::thumb32_UHASX,          "UHASX",                    "111110101010nnnn1111dddd0110mmmm"),
         //INST(&V::thumb32_UHSAX,          "UHSAX",                    "111110101110----1111----0110----"),
         //INST(&V::thumb32_UHSUB16,        "UHSUB16",                  "111110101101----1111----0110----"),
         //INST(&V::thumb32_UHADD8,         "UHADD8",                   "111110101000----1111----0110----"),
diff --git a/src/frontend/A32/translate/impl/thumb32_parallel.cpp b/src/frontend/A32/translate/impl/thumb32_parallel.cpp
index c00b8c5a..0c5fca8e 100644
--- a/src/frontend/A32/translate/impl/thumb32_parallel.cpp
+++ b/src/frontend/A32/translate/impl/thumb32_parallel.cpp
@@ -375,6 +375,19 @@ bool ThumbTranslatorVisitor::thumb32_SHADD16(Reg n, Reg d, Reg m) {
     return true;
 }
 
+bool ThumbTranslatorVisitor::thumb32_SHASX(Reg n, Reg d, Reg m) {
+    if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
+        return UnpredictableInstruction();
+    }
+
+    const auto reg_m = ir.GetRegister(m);
+    const auto reg_n = ir.GetRegister(n);
+    const auto result = ir.PackedHalvingAddSubS16(reg_n, reg_m);
+
+    ir.SetRegister(d, result);
+    return true;
+}
+
 bool ThumbTranslatorVisitor::thumb32_UHADD16(Reg n, Reg d, Reg m) {
     if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
         return UnpredictableInstruction();
@@ -388,4 +401,17 @@ bool ThumbTranslatorVisitor::thumb32_UHADD16(Reg n, Reg d, Reg m) {
     return true;
 }
 
+bool ThumbTranslatorVisitor::thumb32_UHASX(Reg n, Reg d, Reg m) {
+    if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
+        return UnpredictableInstruction();
+    }
+
+    const auto reg_m = ir.GetRegister(m);
+    const auto reg_n = ir.GetRegister(n);
+    const auto result = ir.PackedHalvingAddSubU16(reg_n, reg_m);
+
+    ir.SetRegister(d, result);
+    return true;
+}
+
 } // namespace Dynarmic::A32
diff --git a/src/frontend/A32/translate/impl/translate_thumb.h b/src/frontend/A32/translate/impl/translate_thumb.h
index 25413df2..8edfd506 100644
--- a/src/frontend/A32/translate/impl/translate_thumb.h
+++ b/src/frontend/A32/translate/impl/translate_thumb.h
@@ -156,7 +156,9 @@ struct ThumbTranslatorVisitor final {
     bool thumb32_UQSUB16(Reg n, Reg d, Reg m);
 
     bool thumb32_SHADD16(Reg n, Reg d, Reg m);
+    bool thumb32_SHASX(Reg n, Reg d, Reg m);
     bool thumb32_UHADD16(Reg n, Reg d, Reg m);
+    bool thumb32_UHASX(Reg n, Reg d, Reg m);
 };
 
 } // namespace Dynarmic::A32
diff --git a/tests/A32/fuzz_thumb.cpp b/tests/A32/fuzz_thumb.cpp
index b02f0c4b..d9dcd349 100644
--- a/tests/A32/fuzz_thumb.cpp
+++ b/tests/A32/fuzz_thumb.cpp
@@ -434,6 +434,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") {
                      three_reg_not_r15),
         ThumbInstGen("111110101001nnnn1111dddd0010mmmm", // SHADD16
                      three_reg_not_r15),
+        ThumbInstGen("111110101010nnnn1111dddd0010mmmm", // SHASX
+                     three_reg_not_r15),
         ThumbInstGen("111110101110nnnn1111dddd0000mmmm", // SSAX
                      three_reg_not_r15),
         ThumbInstGen("111110101100nnnn1111dddd0000mmmm", // SSUB8
@@ -448,6 +450,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") {
                      three_reg_not_r15),
         ThumbInstGen("111110101001nnnn1111dddd0110mmmm", // UHADD16
                      three_reg_not_r15),
+        ThumbInstGen("111110101010nnnn1111dddd0110mmmm", // UHASX
+                     three_reg_not_r15),
         ThumbInstGen("111110101000nnnn1111dddd0101mmmm", // UQADD8
                      three_reg_not_r15),
         ThumbInstGen("111110101001nnnn1111dddd0101mmmm", // UQADD16