diff --git a/src/backend_x64/reg_alloc.cpp b/src/backend_x64/reg_alloc.cpp
index dd94605d..073d7be0 100644
--- a/src/backend_x64/reg_alloc.cpp
+++ b/src/backend_x64/reg_alloc.cpp
@@ -16,14 +16,16 @@
 namespace Dynarmic {
 namespace BackendX64 {
 
-static u32 ImmediateToU32(const IR::Value& imm) {
+static u64 ImmediateToU64(const IR::Value& imm) {
     switch (imm.GetType()) {
     case IR::Type::U1:
-        return u32(imm.GetU1());
+        return u64(imm.GetU1());
     case IR::Type::U8:
-        return u32(imm.GetU8());
+        return u64(imm.GetU8());
     case IR::Type::U32:
-        return u32(imm.GetU32());
+        return u64(imm.GetU32());
+    case IR::Type::U64:
+        return u64(imm.GetU64());
     default:
         ASSERT_MSG(false, "This should never happen.");
     }
@@ -477,11 +479,11 @@ HostLoc RegAlloc::LoadImmediateIntoHostLocReg(IR::Value imm, HostLoc host_loc) {
 
     Xbyak::Reg64 reg = HostLocToReg64(host_loc);
 
-    u32 imm_value = ImmediateToU32(imm);
+    u64 imm_value = ImmediateToU64(imm);
     if (imm_value == 0)
-        code->xor_(reg, reg);
+        code->xor_(reg.cvt32(), reg.cvt32());
     else
-        code->mov(reg.cvt32(), imm_value);
+        code->mov(reg, imm_value);
     return host_loc;
 }
 
diff --git a/src/frontend/ir/ir_emitter.cpp b/src/frontend/ir/ir_emitter.cpp
index 14971659..349c73a5 100644
--- a/src/frontend/ir/ir_emitter.cpp
+++ b/src/frontend/ir/ir_emitter.cpp
@@ -37,6 +37,10 @@ Value IREmitter::Imm32(u32 imm32) {
     return Value(imm32);
 }
 
+Value IREmitter::Imm64(u64 imm64) {
+    return Value(imm64);
+}
+
 Value IREmitter::GetRegister(Arm::Reg reg) {
     if (reg == Arm::Reg::PC) {
         return Imm32(PC());
diff --git a/src/frontend/ir/ir_emitter.h b/src/frontend/ir/ir_emitter.h
index eba24435..a5625329 100644
--- a/src/frontend/ir/ir_emitter.h
+++ b/src/frontend/ir/ir_emitter.h
@@ -56,6 +56,7 @@ public:
     Value Imm1(bool value);
     Value Imm8(u8 value);
     Value Imm32(u32 value);
+    Value Imm64(u64 value);
 
     Value GetRegister(Arm::Reg source_reg);
     Value GetExtendedRegister(Arm::ExtReg source_reg);