From f6be6bc14b8340c1249052699bca0cd3eb508372 Mon Sep 17 00:00:00 2001 From: merry Date: Sat, 2 Apr 2022 20:40:43 +0100 Subject: [PATCH] emit_x64_memory: Appease MSVC Associated with changes in 8bcd46b7e9dc487da217b216c908f2ef15e7a8cf --- src/dynarmic/backend/x64/emit_x64_memory.cpp.inc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc b/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc index f1666700..9e71df2a 100644 --- a/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc +++ b/src/dynarmic/backend/x64/emit_x64_memory.cpp.inc @@ -319,9 +319,9 @@ void AxxEmitX64::EmitExclusiveReadMemoryInline(AxxEmitContext& ctx, IR::Inst* in } auto args = ctx.reg_alloc.GetArgumentInfo(inst); - const bool ordered = true; + constexpr bool ordered = true; - if (ordered && bitsize == 128) { + if constexpr (ordered && bitsize == 128) { // Required for atomic 128-bit loads/stores ctx.reg_alloc.ScratchGpr(HostLoc::RAX); ctx.reg_alloc.ScratchGpr(HostLoc::RBX); @@ -394,7 +394,7 @@ void AxxEmitX64::EmitExclusiveWriteMemoryInline(AxxEmitContext& ctx, IR::Inst* i } auto args = ctx.reg_alloc.GetArgumentInfo(inst); - const bool ordered = true; + constexpr bool ordered = true; const auto value = [&] { if constexpr (bitsize == 128) {