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63 commits

Author SHA1 Message Date
Merry
2bc86209bd catch: Correct include directory 2021-08-08 12:52:55 +01:00
Merry
59fb568b27 tests: Use Zydis for disassembly 2021-08-06 15:29:43 +01:00
MerryMage
53493b2024 Add .clang-format file 
Using clang-format version 12.0.0
 2021-05-22 15:07:02 +01:00
Merry
714216fd0e Consolidate all source files into src/ directory 2021-05-19 17:41:59 +01:00
MerryMage
b93ae62acf thumb32: Add coprocessor instructions 2021-05-13 18:15:35 +01:00
MerryMage
61333917a4 thumb32: Implement MRS (register) 2021-05-04 12:43:38 +01:00
MerryMage
a5a210a9a5 T32: Add ASIMD instructions 2021-05-04 00:09:55 +01:00
MerryMage
d1e62b9993 T32: Add VFP instructions 2021-05-04 00:09:55 +01:00
MerryMage
e19f898aa2 ir: Reorganize to new top level folder 2021-04-21 22:22:07 +01:00
Lioncash
f5263cc196 thumb32: Implement exclusive loads 
Implements the remaining loads for ARMv7
 2021-04-19 19:46:19 +01:00
Lioncash
6241ff6be2 thumb32: Implement STREX variants 
Implements the exclusive store instructions. Now all that remains for
ARMv7 load/stores to be done is the exclusive loads.
 2021-04-10 17:15:19 +01:00
MerryMage
f77b0e2fbe A32/thumb16: Implement IT instruction 2021-02-07 20:41:48 +00:00
MerryMage
68bd9547c5 fuzz_arm: Correctly print thumb instruction listing 2021-02-07 20:41:48 +00:00
MerryMage
b252636dc3 a32_unicorn: Halt when PC leaves code_mem 2021-02-06 22:15:02 +00:00
MerryMage
331a02e02e fuzz_arm: Add fuzzing for thumb instructions 2021-02-06 21:41:01 +00:00
MerryMage
4ba1f8b9e7 Add optimization flags to disable specific optimizations 2020-07-04 11:04:10 +01:00
MerryMage
3eed024caf asimd_three_same: Ignore Q=1 for VPADD (floating-point) 2020-07-04 11:04:10 +01:00
MerryMage
3ea49fc6d6 A32: Implement VFPv3 VCT (between floating-point and fixed-point) 2020-06-22 22:08:58 +01:00
MerryMage
69a1d58a2b A32: Implement ASIMD VMULL 2020-06-21 10:00:24 +01:00
MerryMage
70d071e6ab fuzz_arm: Test large random blocks 2020-06-21 00:41:54 +01:00
MerryMage
214c1d6002 fuzz_arm: Test testable parts of ASIMD VRECPE and VRSQRTE 2020-06-20 15:17:39 +01:00
MerryMage
92cb4a5a34 A32: Implement ASIMD VRSQRTE 2020-06-20 15:13:22 +01:00
MerryMage
8912496206 fuzz_arm: Unicorn has incorrect VRSQRTS implementation 2020-06-20 15:07:50 +01:00
MerryMage
6f59c2cd8e A32: Implement ASIMD VRECPE 2020-06-20 15:07:06 +01:00
MerryMage
d3dc50d718 A32: Implement ASIMD VRSQRTS 2020-06-20 15:06:06 +01:00
MerryMage
f58e247ef3 A32: Implement ASIMD VPADD (floating-point) 2020-06-20 14:25:04 +01:00
Lioncash
9b06a938a9 fuzz_arm: Ignore endian bit 
A recent change from Qemu (268b1b3dfbb92a9348406f728a33f39e3d8dcd8)
allows user space modification of the E bit.
 2020-06-16 01:53:21 +01:00
MerryMage
2796a85096 interface/a32: Remove descriptor argument from Disassemble 2020-06-12 15:27:42 +01:00
MerryMage
1a0bc5ba91 A32/ASIMD: ARMv8: Implement VLD{1-4} (multiple) 2020-05-16 14:11:23 +01:00
MerryMage
e7f1a0d408 A32: ARMv8: Implement LDA{,EX}{,B,D,H} and STL{,EX}{,B,D,H} 2020-05-15 21:07:36 +01:00
MerryMage
7f77a04900 fuzz_arm: Do not test vfp_VMRS 
This may emit a vmrs *, fpscr instruction.
This results in fuzz failures due to slight inaccuracies in fpscr emulation.
 2020-05-10 14:47:21 +01:00
MerryMage
6df660c889 fuzz_arm: Ensure all instructions are fuzzed 
* VFP instructions were not getting fuzzed due to matching coprocessor instructions (as invalid instructions)
* Fix VPOP writeback for doubles when (imm8 & 1) == 1
* Do not accidentally fuzz unimplemented unconditional instructions
 2020-05-10 13:57:39 +01:00
MerryMage
a8a712c801 Relicense to 0BSD 2020-04-23 15:45:57 +01:00
MerryMage
c7d20f3f2f fuzz_arm: Test MSR and MRS instructions against unicorn 
* Add always_little_endian option to mach unicorn behavior.
* Correct CPSR.Mode = Usermode
 2020-04-22 21:04:23 +01:00
MerryMage
0495b2c779 tests: Fix Windows build when DYNARMIC_TESTS_USE_UNICORN is enabled 2020-04-22 21:04:21 +01:00
Lioncash
0fa0bca22a A32: Handle different variants of PLD 2020-04-22 21:02:47 +01:00
Lioncash
97277c598b A32: Rename vfp2-related files to vfp 
Now that we fuzz against Unicorn, we aren't just restricted to VFPv2.
VFPv3 and VFPv4 facilities can now be implemented. This renames
constructs mentioning VFPv2 to just refer to VFP.
 2020-04-22 21:02:46 +01:00
Lioncash
0b15fc9755 a32/fuzz_arm: Use same fuzzing mechanism as AArch64 
Introduces the same fuzzing mechanism used by the AArch64 code for
fuzzing instruction implementations, getting rid of the need to
manually specify the instruction generator sequences--replacing it with
an instruction blacklist instead.

Much of this change originates from a previous patch made by Mary. This
just makes it interact nicely with the alterations made to get Unicorn
to cooperate properly.
 2020-04-22 21:02:46 +01:00
Lioncash
7fc3bd689d A32: Implement ARM-mode MLS 2020-04-22 21:02:46 +01:00
Lioncash
8b338b7def A32: Implement ARM-mode MOVT 2020-04-22 21:02:46 +01:00
Lioncash
877fa0f8c3 A32: Implement ARM-mode SBFX 2020-04-22 21:02:46 +01:00
Lioncash
47218ee65d A32: Implement ARM-mode UBFX 2020-04-22 21:02:46 +01:00
Lioncash
2970b34e3c A32: Implement ARM-mode BFI 2020-04-22 21:02:46 +01:00
Lioncash
fab3a59e05 A32: Implement ARM-mode BFC 2020-04-22 21:02:46 +01:00
Lioncash
7305d13221 A32: Implement ARM-mode RBIT 2020-04-22 21:02:46 +01:00
Lioncash
b2f7a0e7ba A32: Implement ARM-mode SDIV/UDIV 
Now that we have Unicorn in place, we can freely implement instructions
introduced in newer versions of the ARM architecture.
 2020-04-22 21:02:46 +01:00
Lioncash
57be160524 fuzz_arm: Tidy up existing tests 
Now that we utilize C++17, we can use std::array's deduction guides to
avoid the need to explicitly specify the template arguments.

While we're at it, also use const where applicable.
 2020-04-22 21:02:46 +01:00
Lioncash
d29582a0e1 A32: Fuzz instructions using unicorn 
While skyeye was OK previously, now that we have an AArch64 backend,
this also means that we eventually have to support the AArch32
counterpart to it. Unfortunately, SkyEye is only compatible up to
ARMv6K, so we woud need to do a lot of work to bring the interpreter up
to speed with things to even begin testing new instruction
implementations.

For the AArch64 side of things, we already use Unicorn, so we can toss
out SkyEye in favor of it instead.
 2020-04-22 21:02:45 +01:00
Lioncash
9faed40a34 tests/a32/testenv: Make A32TestEnv's code_mem member a std::vector 
Makes the data member consistent with the A64 test environment.
 2020-04-22 20:58:10 +01:00
Lioncash
da5dd3ff66 tests/A32/fuzz_arm: Remove unused Unix-specific include 
This was introduced within 6f6f60c61b,
however, the relevant code that it was used with has since been removed,
making the include unnecessary.
 2020-04-22 20:57:38 +01:00