MerryMage
3c86d58064
VFPv4: Implement VCVTB, VCVTT
2020-05-10 14:45:18 +01:00
MerryMage
010fab9a0e
VFPv4: Implement VFMA, VFMS
2020-05-10 14:20:11 +01:00
MerryMage
8e97b10acb
VFPv4: Implement VFNMS, VFNMA
2020-05-10 14:14:03 +01:00
MerryMage
6df660c889
fuzz_arm: Ensure all instructions are fuzzed
...
* VFP instructions were not getting fuzzed due to matching coprocessor instructions (as invalid instructions)
* Fix VPOP writeback for doubles when (imm8 & 1) == 1
* Do not accidentally fuzz unimplemented unconditional instructions
2020-05-10 13:57:39 +01:00
MerryMage
9a38c7324f
A32: Add decoders for remaining v7 instructions
2020-05-10 10:50:34 +01:00
MerryMage
8b3bc92bce
backend/x64: Reduce conversions required for cpsr_nzcv
...
The guest program often accesses the NZCV flags directly much less
often than we need to use them for jumps and other such uses.
Therefore, we store our flags in cpsr_nzcv in a x64-friendly format.
This allows for a reduction in conditional jump related code.
2020-05-06 22:38:06 +01:00
Fernando Sahmkow
d7abae1e31
A64: Implement Exceptional Exit.
2020-05-03 01:40:37 +01:00
Fernando Sahmkow
41521ed856
User Config: Add option to specify wall clock CNTPCT.
2020-05-03 01:40:37 +01:00
Fernando Sahmkow
97b9d3e058
Exclusive Monitor: Rework exclusive monitor interface.
2020-05-03 01:40:37 +01:00
Fernando Sahmkow
b5d8b24a3c
Exclusive Monitor: Allow clearing a single processor.
2020-05-03 01:40:36 +01:00
Fernando Sahmkow
2068658a82
A64 Interface: Allow changing processor id.
...
This commit allows the JIT to be used per guest thread and change it's
core when the thread is migrated.
2020-05-03 01:40:36 +01:00
MerryMage
24229ab899
constant_propagation_pass: Don't fold add if we nee flags
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Results in incorrect flags
2020-04-29 15:33:12 +01:00
MerryMage
e7166e8ba7
constant_propagation_pass: Fold add and sub
2020-04-29 14:16:17 +01:00
MerryMage
dca983803a
translate_arm: ConditionPassed: Some instructions emit no microinstructions
2020-04-24 13:12:13 +01:00
MerryMage
94d0d33e02
Fix single stepping for certain instructions
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Several issues:
1. Several terminal instructions did not stop at the end of a single-step block
2. x64 backend for the A32 frontend sometimes polluted upper_location_descriptor with the single-stepping flag
We also introduce the enable_optimizations parameter to the A32 frontend.
2020-04-24 11:44:38 +01:00
MerryMage
69061d87fa
exception_handler_windows: Ignore irrelevant exceptions
2020-04-23 20:58:24 +01:00
MerryMage
5c0bb5cc63
Remove unreachable code (MSVC warnings)
2020-04-23 16:36:34 +01:00
MerryMage
a8a712c801
Relicense to 0BSD
2020-04-23 15:45:57 +01:00
MerryMage
d51a83d265
constant_propagation_pass: Fold IsZero
2020-04-22 21:07:09 +01:00
MerryMage
df1a0eecaf
constant_propagation_pass: Fold shifts
2020-04-22 21:07:09 +01:00
MerryMage
7242388577
A64: Specialize arithmetic shift SBFM aliases
2020-04-22 21:07:09 +01:00
MerryMage
a13392e432
A64: Specialize sign-extension SBFM aliases
2020-04-22 21:07:09 +01:00
MerryMage
4573511fe3
constant_propagation_pass: Prepare for IR matchers
2020-04-22 21:07:09 +01:00
MerryMage
0d7476d3ec
constant_propagation_pass: Propagate constants across commutative operations
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e.g. (a & b) & c == a & (b & c) where b and c are constants
2020-04-22 21:07:09 +01:00
MerryMage
f59b9fb020
IR: Add ReplicateBit microinstruction
2020-04-22 21:07:09 +01:00
MerryMage
93adcfa5c6
value: Add GetInstRecursive
2020-04-22 21:06:18 +01:00
MerryMage
996d5cb841
ir_opt: Add IdentityRemovalPass
2020-04-22 21:06:18 +01:00
MerryMage
2ae68b13ed
value: Add IsIdentity function
2020-04-22 21:06:18 +01:00
MerryMage
8db4d65587
A64/decoder: Use a lookup table instead of doing a linear scan
2020-04-22 21:06:18 +01:00
MerryMage
0c51313479
A64: Add enable_optimizations configuration option
...
Allow library users to disable optimizations for debugging reasons.
2020-04-22 21:06:18 +01:00
MerryMage
8bef1afb9a
emit_x64_floating_point: SSE2 implementation for DenormalsAreZero
2020-04-22 21:06:18 +01:00
MerryMage
7c917f1c12
CMakeLists: Add DYNARMIC_FRONTENDS option
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Allows library user to select which frontends to enable
2020-04-22 21:06:18 +01:00
MerryMage
668a43f815
A32: Detect unpredictable LDM/STM instructions
2020-04-22 21:06:18 +01:00
MerryMage
cd1560c664
emit_x64: Do not clear fast_dispatch_table unnecessarily
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Reduces invalidation overhead
2020-04-22 21:06:18 +01:00
MerryMage
35402a9a17
a64_emit_x64: Fix location descriptor generation in GenTerminalHandlers
2020-04-22 21:06:18 +01:00
MerryMage
2770115757
emit_x64_data_processing: EmitMaskedShift: Use appropriately sized immediates
2020-04-22 21:06:18 +01:00
MerryMage
cc012a830c
exception_handler_windows: Do not attempt to call cb when cb isn't callable
2020-04-22 21:06:18 +01:00
MerryMage
4e83e81e58
backend/x64: Add fastmem support to Windows exception handler
2020-04-22 21:06:18 +01:00
MerryMage
b7b71d65c2
backend/x64: Add POSIX exception handler with fastmem support
2020-04-22 21:06:18 +01:00
MerryMage
2d348d2d68
backend/x64: Add macOS exception handler with fastmem support
2020-04-22 21:06:18 +01:00
MerryMage
4636055646
a32_emit_x64: Implement fastmem
2020-04-22 21:06:17 +01:00
MerryMage
f9b9081d4c
a32_emit_x64: Fully wrapped memory fallbacks
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In the same style as the A64 backend
2020-04-22 21:06:17 +01:00
MerryMage
ad52c997f4
a32_emit_x64: Use r14 for page_table pointer
2020-04-22 21:06:17 +01:00
MerryMage
49fcfe040c
reg_alloc: Explicitly specify GPR and XMM order
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This allows each backend to modify what registers they want to use and their preferred orderings
2020-04-22 21:06:17 +01:00
MerryMage
c232ad7971
a32_emit_x64: Make {Read,Write}Memory member functions of A32EmitX64
2020-04-22 21:06:17 +01:00
MerryMage
5267dbb8cf
emit_x64_saturation: Prefer changeBit to setBit
2020-04-22 21:06:17 +01:00
MerryMage
9d60d92692
backend/x64: Make ExceptionHandler its own class
2020-04-22 21:06:17 +01:00
MerryMage
325808949f
backend/x64: Rename namespace BackendX64 -> Backend::X64
2020-04-22 21:06:17 +01:00
MerryMage
f569d7913c
block_of_code: Reduce jmps in dispatcher loop
2020-04-22 21:06:17 +01:00
MerryMage
7e0c415473
block_of_code: Always specify codeptr to run from
2020-04-22 21:06:17 +01:00