Commit graph

3223 commits

Author SHA1 Message Date
Lioncash
8a7a4cb672 Update xbyak to 5.97
Keeps the library up to date.
2020-09-19 11:28:09 -04:00
Lioncash
8042dc93e8 Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b

git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 11:27:42 -04:00
Wunkolo
c2d5f6da90 block_of_code: Add HasAVX512_Icelake
Detect AVX512 feature support up to the [Icelake-level featureset](https://en.wikipedia.org/wiki/AVX-512#CPUs_with_AVX-512)
2020-09-19 15:20:40 +01:00
Lioncash
0e1112b7df Revert "basic_block: Mark move constructor and assignment as noexcept"
This reverts commit 4f12e86ebb.

Big fan of MSVC preventing standard behavior.
2020-08-14 16:49:40 -04:00
Lioncash
889635d17d general: Resolve -Wmissing-prototypes warnings 2020-08-14 14:50:09 -04:00
Lioncash
68fea20020 common/assert: Resolve several -Wextra-semi warnings
Resolves 200+ warnings.
2020-08-14 14:45:53 -04:00
Lioncash
4f12e86ebb basic_block: Mark move constructor and assignment as noexcept
Allows the type to play nicely with standard library facilities better
(also we shouldn't be throwing in move operations to begin with).
2020-08-14 14:38:28 -04:00
Lioncash
34f4d99454 block_of_code: Remove unused variables in GenRunCode()
These aren't used, so they can be removed.
2020-08-14 14:35:17 -04:00
Lioncash
29d1758923 ir_matcher: Add missing header guard 2020-08-14 14:32:34 -04:00
MerryMage
6bbc53839f Unsafe Optimization: Extend Unsafe_UnfuseFMA to all FMA-related instructions 2020-07-12 12:45:12 +01:00
MerryMage
d05d95c132 Improve documentation of unsafe optimizations 2020-07-12 12:41:11 +01:00
MerryMage
82417da780 emit_x64{_vector}_floating_point: Add unsafe optimizations for RSqrtEstimate and RecipEstimate 2020-07-11 14:05:57 +01:00
MerryMage
761e95eec0 A64: Add unsafe_optimizations option
* Strength reduce FMA unsafely
2020-07-06 21:02:30 +01:00
MerryMage
82868034d3 A32/ASIMD: Ensure decoder table is correct
* Raise a DecoderError instead of ASSERT-ing on a decode error
* Correct ASIMD decode table
* Write a test which verifies every possible ASIMD instruction
2020-07-05 18:45:42 +01:00
MerryMage
3c742960a9 simd_three_same: Ensure zero in upper for PairedMinMaxOperation 2020-07-04 11:25:36 +01:00
MerryMage
735738c7b6 A32: Implement ASIMD VPMAX, VPMIN (floating-point) 2020-07-04 11:04:10 +01:00
MerryMage
88e74cb2ba A32: Implement ASIMD VPMAX, VPMIN (integer) 2020-07-04 11:04:10 +01:00
MerryMage
d9914b1d51 simd_permute: Implement VectorUnzip with deinterleave lower 2020-07-04 11:04:10 +01:00
MerryMage
f35aaa017c IR: Add VectorDeinterleave{Even,Odd}Lower 2020-07-04 11:04:10 +01:00
MerryMage
df477c46c2 asimd_load_store_structures: VST1 undef correction 2020-07-04 11:04:10 +01:00
MerryMage
4ba1f8b9e7 Add optimization flags to disable specific optimizations 2020-07-04 11:04:10 +01:00
MerryMage
3eed024caf asimd_three_same: Ignore Q=1 for VPADD (floating-point) 2020-07-04 11:04:10 +01:00
MerryMage
896cb46c89 asimd_*: Standardize order of n and m to reduce confusion 2020-07-04 11:04:10 +01:00
MerryMage
4b8a781c04 emit_x64_floating_point: Introduce ICODE 2020-07-04 11:04:10 +01:00
MerryMage
7022281a0b emit_x64_vector_floating_point: Introduce ICODE 2020-07-04 11:04:10 +01:00
Merry
4f967387c0 asimd_three_regs: Reimplement asimd_VMLAL in terms of WideInstruction 2020-06-27 13:06:46 +01:00
Merry
7997404ee7 A32: Implement ASIMD V{ADD,SUB}{W,L} 2020-06-27 12:58:47 +01:00
Merry
868bd00ab5 A32: Rearrange translators for ASIMD Three Registers
* Separate Three Registers with Different Lengths from Same Lengths decoders
2020-06-27 11:15:07 +01:00
Merry
b1ff971a92 backend/x64: Temporarily avoid use of DefineValue(Argument&)
Issues with inappropriate values in upper bits of values
2020-06-27 10:52:59 +01:00
Merry
337498823c FindUnicorn: Fix find_package_handle_standard_args warning 2020-06-27 10:06:39 +01:00
MerryMage
8a1f106dba decoder/asimd: Correct names of scalar exceptions 2020-06-25 17:40:11 +01:00
MerryMage
495f58eed8 A32: Implement ASIMD VSHLL 2020-06-24 23:47:13 +01:00
MerryMage
ed48a9d7d5 A32: Implement VFPv5 VRINTX 2020-06-24 22:31:58 +01:00
MerryMage
46445d0866 A64: Remove NaN accuracy setting
Always do accuracte NaN handling.
2020-06-24 22:26:10 +01:00
Lioncash
b5df8d1ef8 A32: Implement ASIMD VQDMULL (scalar) 2020-06-23 18:19:42 +01:00
Lioncash
20a2bf29fc A32: Implement ASIMD VQRDMULH (scalar) 2020-06-23 18:19:42 +01:00
Lioncash
ab5efe8632 A32: Implement ASIMD VQDMULH (scalar) 2020-06-23 18:19:42 +01:00
MerryMage
2008fda88b emit_x64_floating_point: Correct error in s16 rounding in EmitFPToFixed 2020-06-22 22:54:38 +01:00
MerryMage
3ea49fc6d6 A32: Implement VFPv3 VCT (between floating-point and fixed-point) 2020-06-22 22:08:58 +01:00
MerryMage
48b2ffdde9 A32: Implement ASIMD VQMOVUN, VQMOVN 2020-06-22 20:02:52 +01:00
MerryMage
52b8039367 A32: Implement VFPv5 VRINT{R,Z} 2020-06-22 19:35:32 +01:00
MerryMage
47bc99ad9f asimd_load_store_structures: Fix 2-byte aligned vld1.16
Previously incorrectly undefined
2020-06-22 18:46:22 +01:00
Lioncash
dd8d5497da A32: Implement ASIMD VQRDMULH 2020-06-22 17:31:57 +01:00
Lioncash
0b7a111b54 A32: Implement ASIMD VQDMULH 2020-06-22 17:31:57 +01:00
Lioncash
39488e4aad A32: Implement ASIMD VRSHRN 2020-06-21 23:15:43 +01:00
Lioncash
86b0e5c1c5 A32: Implement ASIMD VQSHRN 2020-06-21 23:15:43 +01:00
Lioncash
85222e3e65 A32: Implement ASIMD VQSHRUN
We can leverage ShiftRightNarrowing() to implement this.
2020-06-21 23:15:43 +01:00
MerryMage
562a98bcf9 A32: Implement ASIMD VCVT (between floating-point and fixed-point) 2020-06-21 20:23:40 +01:00
MerryMage
6f56043a73 A32: Implement ASIMD VFMA, VFMS 2020-06-21 20:21:53 +01:00
Lioncash
aa0358d324 A32: Implement ASIMD VMLAL/VMLSL (integer) 2020-06-21 20:03:19 +01:00