MerryMage
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3f97cb1f9b
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thumb32: Implement SUB (reg)
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2021-03-06 19:49:44 +00:00 |
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MerryMage
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17bdb54d30
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thumb32: Implement CMP (reg)
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2021-03-06 19:49:44 +00:00 |
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MerryMage
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a63271fd3b
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thumb32: Implement SBC (reg)
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2021-03-06 19:49:44 +00:00 |
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MerryMage
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95189b78ef
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thumb32: Implement ADC (reg)
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2021-03-06 19:49:44 +00:00 |
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MerryMage
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af33155ef8
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thumb32: Implement ADD (reg)
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2021-03-06 19:49:44 +00:00 |
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MerryMage
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41ac9971f4
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thumb32: Implement CMN (reg)
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2021-03-06 19:49:44 +00:00 |
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MerryMage
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e7ecd3a7ee
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thumb32: Implement PKHBT, PKHTB
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2021-03-06 19:49:44 +00:00 |
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MerryMage
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d2d996e6ba
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thumb32: Implement EOR (reg)
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2021-03-06 19:49:44 +00:00 |
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MerryMage
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158a13173c
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thumb32: Implement AND (reg)
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2021-03-06 19:49:44 +00:00 |
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MerryMage
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c253b8fc51
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thumb32: Implement TST (reg)
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2021-03-06 19:49:44 +00:00 |
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merry
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ea5d8a3047
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Merge pull request #584 from lioncash/loads
thumb32: Implement Thumb-2 Load Byte and Memory Hints instructions
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2021-03-06 17:31:45 +00:00 |
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MerryMage
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531bb42ab5
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thumb32: Implement B (T3)
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2021-03-06 17:29:55 +00:00 |
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MerryMage
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86aa3f0701
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thumb32: Implement B (T4)
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2021-03-06 17:27:54 +00:00 |
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Lioncash
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52fdf801d0
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thumb32: Implement LDRSB variants
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2021-03-06 11:33:33 -05:00 |
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Lioncash
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fe892732cf
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thumb32: Implement LDRB variants
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2021-03-06 11:06:30 -05:00 |
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Lioncash
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c66afadbc1
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thumb32: Implement PLI variants
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2021-03-06 09:55:29 -05:00 |
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Lioncash
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b2802aaf17
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thumb32: Implement PLD variants
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2021-03-06 09:36:51 -05:00 |
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Lioncash
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ee99fa69e9
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thumb32: Add load source files
Places all the skeleton files in place.
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2021-03-06 09:13:05 -05:00 |
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Lioncash
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47ab3a1450
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CMakeLists: Add decoder .inc files
This makes them show up in IDE generators like XCode.
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2021-03-05 21:00:31 -05:00 |
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merry
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f09e400858
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Merge pull request #582 from lioncash/pbi
thumb32: Implement most plain binary immediate instructions
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2021-03-05 23:20:58 +00:00 |
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MerryMage
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67e954a4cf
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thumb32_data_processing_plain_binary_immediate: Make invalid {S,U}SSAT16 decode undefined
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2021-03-02 20:54:19 +00:00 |
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MerryMage
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52a9af3dca
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CMakeLists: Rework architecture detection
* Also only enable xybak/vixl on appropriate architectures
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2021-03-02 20:41:38 +00:00 |
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merry
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3d418e9a4f
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Merge pull request #583 from lioncash/str
thumb32: Implement STRB/STRH/STR (register)
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2021-03-02 02:19:47 +00:00 |
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Lioncash
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2ac615b882
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thumb32: Implement SSAT/USAT
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2021-03-01 15:59:52 -05:00 |
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Lioncash
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5601aa554e
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thumb32: Implement STRB/STRH/STR (register)
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2021-03-01 15:41:49 -05:00 |
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MerryMage
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2fbb79fdf2
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externals: Build vixl
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2021-03-01 20:36:21 +00:00 |
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MerryMage
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1ca401619d
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Merge commit 'e64a00a7fcc1cfa7ac5f81626f85075997f9d8a3' as 'externals/vixl/vixl'
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2021-03-01 20:20:36 +00:00 |
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MerryMage
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170ab30b8e
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thumb32: Implement RSB (immediate)
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2021-02-28 21:49:14 +00:00 |
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MerryMage
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8d33de2dcc
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thumb32: Implement SUB (immediate, T3)
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2021-02-28 21:49:14 +00:00 |
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MerryMage
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8efb2a5b05
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thumb32: Implement CMP (immediate)
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2021-02-28 21:49:14 +00:00 |
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MerryMage
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78330e634f
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thumb32: Implement SBC (immediate)
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2021-02-28 21:49:14 +00:00 |
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MerryMage
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e6b925146b
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thumb32: Implement ADC (immediate)
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2021-02-28 21:49:14 +00:00 |
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MerryMage
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8f9e052c93
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thumb32: Implement ADD (imm, T3)
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2021-02-28 21:49:14 +00:00 |
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MerryMage
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30442ee1f4
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thumb32: Implement CMN (immediate)
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2021-02-28 21:49:14 +00:00 |
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merry
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421548ceef
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Merge pull request #581 from lioncash/8dot6
a64: Add v8.6 instruction encoding additions
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2021-02-27 21:54:08 +00:00 |
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Lioncash
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385f907463
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a64: Add v8.6 instruction encoding additions
Keeps the instruction listing up to date.
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2021-02-27 16:25:13 -05:00 |
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merry
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bf7d1a17ba
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Merge pull request #580 from lioncash/shift
thumb32: Implement ASR, LSL, LSR, and ROR register variants
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2021-02-26 19:07:12 +00:00 |
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Lioncash
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9d5505422f
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thumb32: Implement ADD/SUB (imm 2)
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2021-02-25 09:56:05 -05:00 |
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Lioncash
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68885fdb3c
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thumb32: Implement SBFX/UBFX
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2021-02-25 09:37:15 -05:00 |
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Lioncash
|
7334914047
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thumb32: Implement BFC/BFI
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2021-02-25 09:27:05 -05:00 |
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Lioncash
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ba7cbe7cf6
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thumb32: Implement SSAT16/USAT16
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2021-02-25 09:13:46 -05:00 |
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Lioncash
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725d712c88
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thumb32: Simplify register shift implementations to common function
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2021-02-23 04:53:50 -05:00 |
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Lioncash
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a7a9ed69b7
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thumb32: Implement ROR (register)
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2021-02-23 04:52:29 -05:00 |
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Lioncash
|
abf3548b2a
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thumb32: Implement ASR (register)
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2021-02-23 04:43:11 -05:00 |
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Lioncash
|
e06d4bcbb2
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thumb32: Implement LSR (register)
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2021-02-23 04:40:43 -05:00 |
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Lioncash
|
fdd379a36c
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thumb32: Implement LSL (register)
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2021-02-23 04:40:40 -05:00 |
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merry
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ac32175eff
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Merge pull request #579 from lioncash/bxj
thumb32: Implement BXJ
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2021-02-22 15:01:08 +00:00 |
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merry
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e753b223e2
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Merge pull request #578 from lioncash/hint
thumb32: Implement hint instructions
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2021-02-22 14:31:49 +00:00 |
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Lioncash
|
89838c5ce4
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thumb32: Implement BXJ
We handle this as a regular BX call, given we don't support Jazelle.
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2021-02-22 07:45:21 -05:00 |
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Lioncash
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de8e977bb1
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thumb32: Implement SEVL
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2021-02-22 07:34:42 -05:00 |
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