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authorCeleste <colean@colean.cc>2022-02-15 21:35:13 +0000
committerCeleste <colean@colean.cc>2022-02-15 21:35:13 +0000
commitc131f7aa394ad6f11a3ce4415c3887c84e0146e7 (patch)
tree93cfe52c50f5aa1dc5a82ab785064de29ce53dfd
parentef41729efb989271c0d8002fcc2b5906f03e8958 (diff)
i promise you this is the last commitHEADmaster
-rw-r--r--src/main.rs4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/main.rs b/src/main.rs
index 1fcab06..b924125 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -16,11 +16,11 @@ fn main() {
.expect("Registers file not read properly.");
let sreg: Vec<&str> = lreg.split(",").collect();
let mut x = 0;
- x = x + 1;
for s in sreg {
let c = s.replace("\n","");
let int: i32 = c.parse().unwrap();
registers[x] = int;
+ x = x + 1;
}
}
@@ -60,8 +60,8 @@ fn main() {
for x in registers {
if x != 0 {
println!("Register {}: {}", a, x);
- a = a + 1;
}
+ a = a + 1;
}
println!("Instruction Pointer: {}", i);
println!("Program Step: {}", ii);