2015-07-22 00:38:59 +01:00
|
|
|
// Copyright 2015 Citra Emulator Project
|
|
|
|
// Licensed under GPLv2 or any later version
|
|
|
|
// Refer to the license.txt file included.
|
|
|
|
|
|
|
|
#pragma once
|
|
|
|
|
2016-04-30 16:34:51 +01:00
|
|
|
#include <array>
|
|
|
|
#include <cstddef>
|
|
|
|
#include <memory>
|
|
|
|
#include <type_traits>
|
|
|
|
#include <nihstro/shader_bytecode.h>
|
|
|
|
#include "common/assert.h"
|
2015-07-22 00:38:59 +01:00
|
|
|
#include "common/common_funcs.h"
|
|
|
|
#include "common/common_types.h"
|
|
|
|
#include "common/vector_math.h"
|
|
|
|
#include "video_core/pica.h"
|
2016-04-30 16:34:51 +01:00
|
|
|
#include "video_core/pica_types.h"
|
2016-12-16 06:30:43 +00:00
|
|
|
#include "video_core/shader/debug_data.h"
|
2015-07-22 00:38:59 +01:00
|
|
|
|
|
|
|
using nihstro::RegisterType;
|
|
|
|
using nihstro::SourceRegister;
|
|
|
|
using nihstro::DestRegister;
|
|
|
|
|
|
|
|
namespace Pica {
|
|
|
|
|
|
|
|
namespace Shader {
|
|
|
|
|
|
|
|
struct InputVertex {
|
2016-04-28 18:01:47 +01:00
|
|
|
alignas(16) Math::Vec4<float24> attr[16];
|
2015-07-22 00:38:59 +01:00
|
|
|
};
|
|
|
|
|
|
|
|
struct OutputVertex {
|
|
|
|
OutputVertex() = default;
|
|
|
|
|
|
|
|
// VS output attributes
|
|
|
|
Math::Vec4<float24> pos;
|
2015-08-16 14:12:43 +01:00
|
|
|
Math::Vec4<float24> quat;
|
2015-07-22 00:38:59 +01:00
|
|
|
Math::Vec4<float24> color;
|
|
|
|
Math::Vec2<float24> tc0;
|
|
|
|
Math::Vec2<float24> tc1;
|
2016-04-18 09:51:13 +01:00
|
|
|
float24 tc0_w;
|
|
|
|
INSERT_PADDING_WORDS(1);
|
2015-09-10 03:39:43 +01:00
|
|
|
Math::Vec3<float24> view;
|
|
|
|
INSERT_PADDING_WORDS(1);
|
2015-07-22 00:38:59 +01:00
|
|
|
Math::Vec2<float24> tc2;
|
|
|
|
|
|
|
|
// Padding for optimal alignment
|
2015-09-10 03:39:43 +01:00
|
|
|
INSERT_PADDING_WORDS(4);
|
2015-07-22 00:38:59 +01:00
|
|
|
|
|
|
|
// Attributes used to store intermediate results
|
|
|
|
|
|
|
|
// position after perspective divide
|
|
|
|
Math::Vec3<float24> screenpos;
|
2015-09-10 03:39:43 +01:00
|
|
|
INSERT_PADDING_WORDS(1);
|
2015-07-22 00:38:59 +01:00
|
|
|
|
|
|
|
// Linear interpolation
|
|
|
|
// factor: 0=this, 1=vtx
|
|
|
|
void Lerp(float24 factor, const OutputVertex& vtx) {
|
|
|
|
pos = pos * factor + vtx.pos * (float24::FromFloat32(1) - factor);
|
|
|
|
|
|
|
|
// TODO: Should perform perspective correct interpolation here...
|
|
|
|
tc0 = tc0 * factor + vtx.tc0 * (float24::FromFloat32(1) - factor);
|
|
|
|
tc1 = tc1 * factor + vtx.tc1 * (float24::FromFloat32(1) - factor);
|
|
|
|
tc2 = tc2 * factor + vtx.tc2 * (float24::FromFloat32(1) - factor);
|
|
|
|
|
|
|
|
screenpos = screenpos * factor + vtx.screenpos * (float24::FromFloat32(1) - factor);
|
|
|
|
|
|
|
|
color = color * factor + vtx.color * (float24::FromFloat32(1) - factor);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Linear interpolation
|
|
|
|
// factor: 0=v0, 1=v1
|
|
|
|
static OutputVertex Lerp(float24 factor, const OutputVertex& v0, const OutputVertex& v1) {
|
|
|
|
OutputVertex ret = v0;
|
|
|
|
ret.Lerp(factor, v1);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
};
|
|
|
|
static_assert(std::is_pod<OutputVertex>::value, "Structure is not POD");
|
|
|
|
static_assert(sizeof(OutputVertex) == 32 * sizeof(float), "OutputVertex has invalid size");
|
|
|
|
|
2016-05-13 07:49:20 +01:00
|
|
|
struct OutputRegisters {
|
|
|
|
OutputRegisters() = default;
|
|
|
|
|
|
|
|
alignas(16) Math::Vec4<float24> value[16];
|
|
|
|
|
2016-12-15 05:00:02 +00:00
|
|
|
OutputVertex ToVertex(const Regs::ShaderConfig& config) const;
|
2016-05-13 07:49:20 +01:00
|
|
|
};
|
|
|
|
static_assert(std::is_pod<OutputRegisters>::value, "Structure is not POD");
|
|
|
|
|
2015-07-22 00:38:59 +01:00
|
|
|
/**
|
|
|
|
* This structure contains the state information that needs to be unique for a shader unit. The 3DS
|
|
|
|
* has four shader units that process shaders in parallel. At the present, Citra only implements a
|
|
|
|
* single shader unit that processes all shaders serially. Putting the state information in a struct
|
|
|
|
* here will make it easier for us to parallelize the shader processing later.
|
|
|
|
*/
|
2016-09-18 01:38:01 +01:00
|
|
|
template <bool Debug>
|
2015-07-22 00:38:59 +01:00
|
|
|
struct UnitState {
|
2015-08-15 21:51:32 +01:00
|
|
|
struct Registers {
|
|
|
|
// The registers are accessed by the shader JIT using SSE instructions, and are therefore
|
|
|
|
// required to be 16-byte aligned.
|
2016-03-09 06:28:26 +00:00
|
|
|
alignas(16) Math::Vec4<float24> input[16];
|
|
|
|
alignas(16) Math::Vec4<float24> temporary[16];
|
2015-08-15 21:51:32 +01:00
|
|
|
} registers;
|
|
|
|
static_assert(std::is_pod<Registers>::value, "Structure is not POD");
|
2015-07-22 00:38:59 +01:00
|
|
|
|
2016-05-13 07:49:20 +01:00
|
|
|
OutputRegisters output_registers;
|
|
|
|
|
2015-07-22 00:38:59 +01:00
|
|
|
bool conditional_code[2];
|
|
|
|
|
|
|
|
// Two Address registers and one loop counter
|
|
|
|
// TODO: How many bits do these actually have?
|
|
|
|
s32 address_registers[3];
|
|
|
|
|
2015-07-12 00:57:59 +01:00
|
|
|
DebugData<Debug> debug;
|
2015-07-22 00:38:59 +01:00
|
|
|
|
2015-09-07 06:49:57 +01:00
|
|
|
static size_t InputOffset(const SourceRegister& reg) {
|
2015-07-22 00:38:59 +01:00
|
|
|
switch (reg.GetRegisterType()) {
|
|
|
|
case RegisterType::Input:
|
2016-09-18 01:38:01 +01:00
|
|
|
return offsetof(UnitState, registers.input) +
|
|
|
|
reg.GetIndex() * sizeof(Math::Vec4<float24>);
|
2015-07-22 00:38:59 +01:00
|
|
|
|
|
|
|
case RegisterType::Temporary:
|
2016-09-18 01:38:01 +01:00
|
|
|
return offsetof(UnitState, registers.temporary) +
|
|
|
|
reg.GetIndex() * sizeof(Math::Vec4<float24>);
|
2015-07-22 00:38:59 +01:00
|
|
|
|
|
|
|
default:
|
|
|
|
UNREACHABLE();
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-09-07 06:49:57 +01:00
|
|
|
static size_t OutputOffset(const DestRegister& reg) {
|
2015-07-22 00:38:59 +01:00
|
|
|
switch (reg.GetRegisterType()) {
|
|
|
|
case RegisterType::Output:
|
2016-09-18 01:38:01 +01:00
|
|
|
return offsetof(UnitState, output_registers.value) +
|
|
|
|
reg.GetIndex() * sizeof(Math::Vec4<float24>);
|
2015-07-22 00:38:59 +01:00
|
|
|
|
|
|
|
case RegisterType::Temporary:
|
2016-09-18 01:38:01 +01:00
|
|
|
return offsetof(UnitState, registers.temporary) +
|
|
|
|
reg.GetIndex() * sizeof(Math::Vec4<float24>);
|
2015-07-22 00:38:59 +01:00
|
|
|
|
|
|
|
default:
|
|
|
|
UNREACHABLE();
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2016-03-30 01:45:18 +01:00
|
|
|
/// Clears the shader cache
|
|
|
|
void ClearCache();
|
|
|
|
|
|
|
|
struct ShaderSetup {
|
2015-07-22 00:38:59 +01:00
|
|
|
|
2016-03-30 01:45:18 +01:00
|
|
|
struct {
|
|
|
|
// The float uniforms are accessed by the shader JIT using SSE instructions, and are
|
|
|
|
// therefore required to be 16-byte aligned.
|
|
|
|
alignas(16) Math::Vec4<float24> f[96];
|
2015-07-23 04:25:30 +01:00
|
|
|
|
2016-03-30 01:45:18 +01:00
|
|
|
std::array<bool, 16> b;
|
|
|
|
std::array<Math::Vec4<u8>, 4> i;
|
|
|
|
} uniforms;
|
2015-07-12 00:57:59 +01:00
|
|
|
|
2016-05-13 07:46:14 +01:00
|
|
|
static size_t UniformOffset(RegisterType type, unsigned index) {
|
|
|
|
switch (type) {
|
|
|
|
case RegisterType::FloatUniform:
|
2016-09-18 01:38:01 +01:00
|
|
|
return offsetof(ShaderSetup, uniforms.f) + index * sizeof(Math::Vec4<float24>);
|
2016-05-13 07:46:14 +01:00
|
|
|
|
|
|
|
case RegisterType::BoolUniform:
|
2016-09-18 01:38:01 +01:00
|
|
|
return offsetof(ShaderSetup, uniforms.b) + index * sizeof(bool);
|
2016-05-13 07:46:14 +01:00
|
|
|
|
|
|
|
case RegisterType::IntUniform:
|
2016-09-18 01:38:01 +01:00
|
|
|
return offsetof(ShaderSetup, uniforms.i) + index * sizeof(Math::Vec4<u8>);
|
2016-05-13 07:46:14 +01:00
|
|
|
|
|
|
|
default:
|
|
|
|
UNREACHABLE();
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-03-30 01:45:18 +01:00
|
|
|
std::array<u32, 1024> program_code;
|
|
|
|
std::array<u32, 1024> swizzle_data;
|
|
|
|
|
|
|
|
/**
|
2016-09-18 01:38:01 +01:00
|
|
|
* Performs any shader unit setup that only needs to happen once per shader (as opposed to once
|
2016-09-19 02:01:46 +01:00
|
|
|
* per vertex, which would happen within the `Run` function).
|
2016-03-30 01:45:18 +01:00
|
|
|
*/
|
|
|
|
void Setup();
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Runs the currently setup shader
|
|
|
|
* @param state Shader unit state, must be setup per shader and per shader unit
|
|
|
|
* @param input Input vertex into the shader
|
|
|
|
* @param num_attributes The number of vertex shader attributes
|
|
|
|
*/
|
2016-05-13 07:49:20 +01:00
|
|
|
void Run(UnitState<false>& state, const InputVertex& input, int num_attributes);
|
2016-03-30 01:45:18 +01:00
|
|
|
|
|
|
|
/**
|
|
|
|
* Produce debug information based on the given shader and input vertex
|
|
|
|
* @param input Input vertex into the shader
|
|
|
|
* @param num_attributes The number of vertex shader attributes
|
|
|
|
* @param config Configuration object for the shader pipeline
|
|
|
|
* @param setup Setup object for the shader pipeline
|
|
|
|
* @return Debug information for this shader with regards to the given vertex
|
|
|
|
*/
|
2016-09-18 01:38:01 +01:00
|
|
|
DebugData<true> ProduceDebugInfo(const InputVertex& input, int num_attributes,
|
|
|
|
const Regs::ShaderConfig& config, const ShaderSetup& setup);
|
2016-03-30 01:45:18 +01:00
|
|
|
};
|
2015-07-22 00:38:59 +01:00
|
|
|
|
|
|
|
} // namespace Shader
|
|
|
|
|
|
|
|
} // namespace Pica
|