2018-01-25 17:51:45 +00:00
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/* This file is part of the dynarmic project.
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* Copyright (c) 2018 MerryMage
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2020-04-23 15:25:11 +01:00
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* SPDX-License-Identifier: 0BSD
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2018-01-25 17:51:45 +00:00
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*/
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#include <array>
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#include <climits>
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2018-08-14 19:13:47 +01:00
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#include "backend/x64/block_of_code.h"
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#include "backend/x64/emit_x64.h"
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2018-07-29 08:48:28 +01:00
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#include "common/crypto/crc32.h"
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2018-01-25 17:51:45 +00:00
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#include "frontend/ir/microinstruction.h"
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2020-04-08 11:46:36 +01:00
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namespace Dynarmic::Backend::X64 {
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2018-01-25 17:51:45 +00:00
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using namespace Xbyak::util;
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2018-07-29 08:48:28 +01:00
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namespace CRC32 = Common::Crypto::CRC32;
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2018-01-25 17:51:45 +00:00
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static void EmitCRC32Castagnoli(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, const int data_size) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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if (code.DoesCpuSupport(Xbyak::util::Cpu::tSSE42)) {
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const Xbyak::Reg32 crc = ctx.reg_alloc.UseScratchGpr(args[0]).cvt32();
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const Xbyak::Reg value = ctx.reg_alloc.UseGpr(args[1]).changeBit(data_size);
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code.crc32(crc, value);
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ctx.reg_alloc.DefineValue(inst, crc);
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2020-06-03 11:16:53 +01:00
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return;
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2018-01-25 17:51:45 +00:00
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}
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2020-06-03 11:16:53 +01:00
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ctx.reg_alloc.HostCall(inst, args[0], args[1], {});
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code.mov(code.ABI_PARAM3, data_size / CHAR_BIT);
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code.CallFunction(&CRC32::ComputeCRC32Castagnoli);
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2018-01-25 17:51:45 +00:00
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}
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2018-01-28 06:41:58 +00:00
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static void EmitCRC32ISO(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, const int data_size) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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2020-06-03 11:16:53 +01:00
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if (code.DoesCpuSupport(Xbyak::util::Cpu::tPCLMULQDQ) && data_size <= 32) {
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const Xbyak::Reg32 crc = ctx.reg_alloc.UseScratchGpr(args[0]).cvt32();
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const Xbyak::Reg64 value = ctx.reg_alloc.UseGpr(args[1]);
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const Xbyak::Xmm xmm_crc = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Xmm xmm_value = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Xmm xmm_const = ctx.reg_alloc.ScratchXmm();
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code.movd(xmm_value, value.cvt32());
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code.movd(xmm_crc, crc);
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code.movdqa(xmm_const, code.MConst(xword, 0x00000001'F7011641, 0x00000001'DB710641));
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code.pxor(xmm_value, xmm_crc);
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2020-06-03 18:55:58 +01:00
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code.psllq(xmm_value, 64 - data_size);
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2020-06-03 11:16:53 +01:00
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if (data_size < 32) {
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2020-06-03 18:55:58 +01:00
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code.pslldq(xmm_crc, (64 - data_size) / 8);
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2020-06-03 11:16:53 +01:00
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}
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code.pclmulqdq(xmm_value, xmm_const, 0x00);
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code.pclmulqdq(xmm_value, xmm_const, 0x10);
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if (data_size < 32) {
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code.pxor(xmm_value, xmm_crc);
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}
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2020-06-03 18:55:58 +01:00
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code.pextrd(crc, xmm_value, 2);
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2020-06-03 11:16:53 +01:00
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ctx.reg_alloc.DefineValue(inst, crc);
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return;
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}
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if (code.DoesCpuSupport(Xbyak::util::Cpu::tPCLMULQDQ) && data_size == 64) {
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const Xbyak::Reg32 crc = ctx.reg_alloc.UseScratchGpr(args[0]).cvt32();
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const Xbyak::Reg64 value = ctx.reg_alloc.UseScratchGpr(args[1]);
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const Xbyak::Xmm xmm_crc = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Xmm xmm_value = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Xmm xmm_const = ctx.reg_alloc.ScratchXmm();
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2020-06-03 18:55:58 +01:00
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code.movq(xmm_value, value);
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2020-06-03 11:16:53 +01:00
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code.movd(xmm_crc, crc);
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code.movdqa(xmm_const, code.MConst(xword, 0x00000001'F7011641, 0x00000001'DB710641));
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code.pxor(xmm_value, xmm_crc);
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2020-06-03 18:55:58 +01:00
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code.pslldq(xmm_value, 4);
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code.movdqa(xmm_crc, xmm_value);
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2020-06-03 11:16:53 +01:00
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code.pclmulqdq(xmm_value, xmm_const, 0x00);
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code.pclmulqdq(xmm_value, xmm_const, 0x10);
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code.pxor(xmm_value, xmm_crc);
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2020-06-03 18:55:58 +01:00
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code.psllq(xmm_value, 32);
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2020-06-03 11:16:53 +01:00
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2020-06-03 18:55:58 +01:00
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code.pclmulqdq(xmm_value, xmm_const, 0x01);
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2020-06-03 11:16:53 +01:00
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code.pclmulqdq(xmm_value, xmm_const, 0x10);
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2020-06-03 18:55:58 +01:00
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code.pextrd(crc, xmm_value, 2);
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2020-06-03 11:16:53 +01:00
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ctx.reg_alloc.DefineValue(inst, crc);
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return;
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}
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2018-01-29 17:31:50 +00:00
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ctx.reg_alloc.HostCall(inst, args[0], args[1], {});
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code.mov(code.ABI_PARAM3, data_size / CHAR_BIT);
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2018-07-29 08:48:28 +01:00
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code.CallFunction(&CRC32::ComputeCRC32ISO);
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2018-01-28 06:41:58 +00:00
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}
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2018-01-25 17:51:45 +00:00
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void EmitX64::EmitCRC32Castagnoli8(EmitContext& ctx, IR::Inst* inst) {
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2018-02-03 14:28:57 +00:00
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EmitCRC32Castagnoli(code, ctx, inst, 8);
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2018-01-25 17:51:45 +00:00
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}
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void EmitX64::EmitCRC32Castagnoli16(EmitContext& ctx, IR::Inst* inst) {
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2018-02-03 14:28:57 +00:00
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EmitCRC32Castagnoli(code, ctx, inst, 16);
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2018-01-25 17:51:45 +00:00
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}
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void EmitX64::EmitCRC32Castagnoli32(EmitContext& ctx, IR::Inst* inst) {
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2018-02-03 14:28:57 +00:00
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EmitCRC32Castagnoli(code, ctx, inst, 32);
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2018-01-25 17:51:45 +00:00
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}
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void EmitX64::EmitCRC32Castagnoli64(EmitContext& ctx, IR::Inst* inst) {
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2018-02-03 14:28:57 +00:00
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EmitCRC32Castagnoli(code, ctx, inst, 64);
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2018-01-25 17:51:45 +00:00
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}
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2018-01-28 06:41:58 +00:00
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void EmitX64::EmitCRC32ISO8(EmitContext& ctx, IR::Inst* inst) {
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2018-02-03 14:28:57 +00:00
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EmitCRC32ISO(code, ctx, inst, 8);
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2018-01-28 06:41:58 +00:00
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}
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void EmitX64::EmitCRC32ISO16(EmitContext& ctx, IR::Inst* inst) {
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2018-02-03 14:28:57 +00:00
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EmitCRC32ISO(code, ctx, inst, 16);
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2018-01-28 06:41:58 +00:00
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}
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void EmitX64::EmitCRC32ISO32(EmitContext& ctx, IR::Inst* inst) {
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2018-02-03 14:28:57 +00:00
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EmitCRC32ISO(code, ctx, inst, 32);
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2018-01-28 06:41:58 +00:00
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}
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void EmitX64::EmitCRC32ISO64(EmitContext& ctx, IR::Inst* inst) {
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2018-02-03 14:28:57 +00:00
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EmitCRC32ISO(code, ctx, inst, 64);
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2018-01-28 06:41:58 +00:00
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}
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2020-04-08 11:46:36 +01:00
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} // namespace Dynarmic::Backend::X64
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