2018-01-06 21:15:25 +00:00
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/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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2020-04-23 15:25:11 +01:00
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* SPDX-License-Identifier: 0BSD
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2018-01-06 21:15:25 +00:00
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*/
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#pragma once
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2020-06-18 11:27:12 +01:00
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#include <array>
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2018-02-12 19:49:56 +00:00
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#include <map>
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#include <tuple>
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2019-05-18 19:10:38 +01:00
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#include <dynarmic/A64/a64.h>
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#include <dynarmic/A64/config.h>
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2018-08-14 19:13:47 +01:00
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#include "backend/x64/a64_jitstate.h"
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#include "backend/x64/block_range_information.h"
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#include "backend/x64/emit_x64.h"
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2018-01-06 21:15:25 +00:00
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#include "frontend/A64/location_descriptor.h"
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#include "frontend/ir/terminal.h"
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2020-04-08 11:46:36 +01:00
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namespace Dynarmic::Backend::X64 {
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2018-01-06 21:15:25 +00:00
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class RegAlloc;
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struct A64EmitContext final : public EmitContext {
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2018-02-18 13:00:41 +00:00
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A64EmitContext(const A64::UserConfig& conf, RegAlloc& reg_alloc, IR::Block& block);
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2020-04-24 10:00:58 +01:00
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2018-01-06 21:15:25 +00:00
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A64::LocationDescriptor Location() const;
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2020-04-24 10:00:58 +01:00
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bool IsSingleStep() const;
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2019-03-24 10:59:44 +00:00
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FP::FPCR FPCR() const override;
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2018-02-18 13:04:45 +00:00
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bool AccurateNaN() const override;
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2018-02-18 13:00:41 +00:00
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const A64::UserConfig& conf;
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2018-01-06 21:15:25 +00:00
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};
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2018-01-23 19:16:39 +00:00
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class A64EmitX64 final : public EmitX64 {
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2018-01-06 21:15:25 +00:00
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public:
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2018-08-18 01:20:42 +01:00
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A64EmitX64(BlockOfCode& code, A64::UserConfig conf, A64::Jit* jit_interface);
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2018-01-27 02:25:27 +00:00
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~A64EmitX64() override;
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2018-01-06 21:15:25 +00:00
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/**
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2019-05-24 06:59:04 +01:00
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* Emit host machine code for a basic block with intermediate representation `block`.
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* @note block is modified.
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2018-01-06 21:15:25 +00:00
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*/
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2019-05-24 06:59:04 +01:00
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BlockDescriptor Emit(IR::Block& block);
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2018-01-06 21:15:25 +00:00
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2018-01-23 19:16:39 +00:00
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void ClearCache() override;
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void InvalidateCacheRanges(const boost::icl::interval_set<u64>& ranges);
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2020-02-27 17:01:39 +00:00
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void ChangeProcessorID(size_t value) {
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conf.processor_id = value;
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}
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2018-01-06 21:15:25 +00:00
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protected:
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2020-02-27 17:01:39 +00:00
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A64::UserConfig conf;
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2018-08-18 01:20:42 +01:00
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A64::Jit* jit_interface;
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2018-01-23 19:16:39 +00:00
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BlockRangeInformation<u64> block_ranges;
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2018-01-06 21:15:25 +00:00
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2018-09-07 21:51:42 +01:00
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struct FastDispatchEntry {
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2020-04-15 21:26:48 +01:00
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u64 location_descriptor = 0xFFFF'FFFF'FFFF'FFFFull;
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const void* code_ptr = nullptr;
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2018-09-07 21:51:42 +01:00
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};
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static_assert(sizeof(FastDispatchEntry) == 0x10);
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static constexpr u64 fast_dispatch_table_mask = 0xFFFFF0;
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static constexpr size_t fast_dispatch_table_size = 0x100000;
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std::array<FastDispatchEntry, fast_dispatch_table_size> fast_dispatch_table;
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void ClearFastDispatchTable();
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2018-02-12 18:18:47 +00:00
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void (*memory_read_128)();
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void (*memory_write_128)();
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void GenMemory128Accessors();
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2018-02-12 19:49:56 +00:00
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std::map<std::tuple<size_t, int, int>, void(*)()> read_fallbacks;
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std::map<std::tuple<size_t, int, int>, void(*)()> write_fallbacks;
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void GenFastmemFallbacks();
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2018-09-07 21:51:42 +01:00
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const void* terminal_handler_pop_rsb_hint;
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const void* terminal_handler_fast_dispatch_hint = nullptr;
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2020-04-15 21:26:48 +01:00
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FastDispatchEntry& (*fast_dispatch_table_lookup)(u64) = nullptr;
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2018-09-07 21:51:42 +01:00
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void GenTerminalHandlers();
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2020-06-18 11:27:12 +01:00
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template<std::size_t bitsize>
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void EmitDirectPageTableMemoryRead(A64EmitContext& ctx, IR::Inst* inst);
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template<std::size_t bitsize>
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void EmitDirectPageTableMemoryWrite(A64EmitContext& ctx, IR::Inst* inst);
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2020-06-16 18:09:12 +01:00
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template<std::size_t bitsize, auto callback>
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void EmitExclusiveReadMemory(A64EmitContext& ctx, IR::Inst* inst);
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template<std::size_t bitsize, auto callback>
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void EmitExclusiveWriteMemory(A64EmitContext& ctx, IR::Inst* inst);
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2018-02-12 19:49:56 +00:00
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2018-01-06 21:15:25 +00:00
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// Microinstruction emitters
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2020-04-19 15:54:46 +01:00
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void EmitPushRSB(EmitContext& ctx, IR::Inst* inst);
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2018-01-06 21:15:25 +00:00
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#define OPCODE(...)
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#define A32OPC(...)
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#define A64OPC(name, type, ...) void EmitA64##name(A64EmitContext& ctx, IR::Inst* inst);
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#include "frontend/ir/opcodes.inc"
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#undef OPCODE
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#undef A32OPC
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#undef A64OPC
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2018-07-27 12:42:10 +01:00
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// Helpers
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std::string LocationDescriptorToFriendlyName(const IR::LocationDescriptor&) const override;
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2018-01-06 21:15:25 +00:00
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// Terminal instruction emitters
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2020-04-24 10:00:58 +01:00
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void EmitTerminalImpl(IR::Term::Interpret terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
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void EmitTerminalImpl(IR::Term::ReturnToDispatch terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
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void EmitTerminalImpl(IR::Term::LinkBlock terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
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void EmitTerminalImpl(IR::Term::LinkBlockFast terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
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void EmitTerminalImpl(IR::Term::PopRSBHint terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
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void EmitTerminalImpl(IR::Term::FastDispatchHint terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
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void EmitTerminalImpl(IR::Term::If terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
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void EmitTerminalImpl(IR::Term::CheckBit terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
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void EmitTerminalImpl(IR::Term::CheckHalt terminal, IR::LocationDescriptor initial_location, bool is_single_step) override;
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2018-01-06 21:15:25 +00:00
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// Patching
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2020-04-15 21:26:48 +01:00
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void Unpatch(const IR::LocationDescriptor& target_desc) override;
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2018-01-06 21:15:25 +00:00
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void EmitPatchJg(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr = nullptr) override;
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void EmitPatchJmp(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr = nullptr) override;
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void EmitPatchMovRcx(CodePtr target_code_ptr = nullptr) override;
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};
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2020-04-08 11:46:36 +01:00
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} // namespace Dynarmic::Backend::X64
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