2016-07-01 14:01:06 +01:00
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/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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2016-08-05 18:54:19 +01:00
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2016-07-01 14:01:06 +01:00
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#pragma once
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#include <array>
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2018-01-04 21:12:02 +00:00
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#include <xbyak.h>
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2016-07-01 14:01:06 +01:00
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#include "common/common_types.h"
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2018-01-26 13:51:48 +00:00
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namespace Dynarmic::BackendX64 {
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2016-07-01 14:01:06 +01:00
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2016-08-13 00:10:23 +01:00
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class BlockOfCode;
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2016-12-15 21:31:58 +00:00
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#ifdef _MSC_VER
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#pragma warning(push)
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#pragma warning(disable:4324) // Structure was padded due to alignment specifier
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#endif
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2018-01-01 22:49:17 +00:00
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struct A32JitState {
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2018-01-02 17:45:39 +00:00
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using ProgramCounterType = u32;
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2018-01-01 22:49:17 +00:00
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A32JitState() { ResetRSB(); }
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2016-08-13 00:10:23 +01:00
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2016-07-01 14:01:06 +01:00
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std::array<u32, 16> Reg{}; // Current register file.
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// TODO: Mode-specific register sets unimplemented.
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2017-12-02 14:03:54 +00:00
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u32 CPSR_ge = 0;
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2017-12-02 15:24:10 +00:00
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u32 CPSR_et = 0;
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2017-12-02 15:54:48 +00:00
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u32 CPSR_q = 0;
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2017-12-09 15:42:47 +00:00
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u32 CPSR_nzcv = 0;
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u32 CPSR_jaifm = 0;
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2017-12-02 13:55:04 +00:00
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u32 Cpsr() const;
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void SetCpsr(u32 cpsr);
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2016-08-05 18:54:19 +01:00
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alignas(u64) std::array<u32, 64> ExtReg{}; // Extension registers.
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2016-08-01 20:03:13 +01:00
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2018-01-04 21:12:02 +00:00
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static constexpr size_t SpillCount = 64;
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2016-08-02 13:46:12 +01:00
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std::array<u64, SpillCount> Spill{}; // Spill.
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2018-01-04 21:12:02 +00:00
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static Xbyak::Address GetSpillLocationFromIndex(size_t i) {
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using namespace Xbyak::util;
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return qword[r15 + offsetof(A32JitState, Spill) + i * sizeof(u64)];
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}
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2016-07-01 14:01:06 +01:00
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2016-08-07 18:08:48 +01:00
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// For internal use (See: BlockOfCode::RunCode)
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2016-08-07 00:40:29 +01:00
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u32 guest_MXCSR = 0x00001f80;
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2016-08-05 18:54:19 +01:00
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u32 save_host_MXCSR = 0;
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2017-12-03 02:42:22 +00:00
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s64 cycles_to_run = 0;
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2016-07-04 10:22:11 +01:00
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s64 cycles_remaining = 0;
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2016-08-15 15:02:08 +01:00
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bool halt_requested = false;
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2016-08-05 18:54:19 +01:00
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TranslateArm: Implement CLREX, LDREX, LDREXB, LDREXD, LDREXH, STREX, STREXB, STREXD, STREXH, SWP, SWPB
2016-08-09 22:48:20 +01:00
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// Exclusive state
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static constexpr u32 RESERVATION_GRANULE_MASK = 0xFFFFFFF8;
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u32 exclusive_state = 0;
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u32 exclusive_address = 0;
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2016-08-15 15:48:22 +01:00
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static constexpr size_t RSBSize = 8; // MUST be a power of 2.
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2017-11-27 20:29:19 +00:00
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static constexpr size_t RSBPtrMask = RSBSize - 1;
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2016-08-13 00:10:23 +01:00
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u32 rsb_ptr = 0;
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std::array<u64, RSBSize> rsb_location_descriptors;
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std::array<u64, RSBSize> rsb_codeptrs;
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2016-08-31 21:57:33 +01:00
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void ResetRSB();
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2016-08-13 00:10:23 +01:00
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2018-06-30 10:49:47 +01:00
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u32 fpsr_exc = 0;
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2018-07-15 23:19:35 +01:00
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u32 fpsr_qc = 0; // Dummy value
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2016-08-06 17:21:29 +01:00
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u32 FPSCR_IDC = 0;
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u32 FPSCR_UFC = 0;
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2016-09-05 14:39:17 +01:00
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u32 FPSCR_mode = 0;
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u32 FPSCR_nzcv = 0;
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2016-08-05 18:54:19 +01:00
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u32 old_FPSCR = 0;
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u32 Fpscr() const;
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void SetFpscr(u32 FPSCR);
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2017-12-12 14:18:21 +00:00
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u64 GetUniqueHash() const;
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2016-07-01 14:01:06 +01:00
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};
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2016-12-15 21:31:58 +00:00
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#ifdef _MSC_VER
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#pragma warning(pop)
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#endif
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2016-08-24 20:07:08 +01:00
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using CodePtr = const void*;
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2016-07-01 14:01:06 +01:00
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2018-01-26 13:51:48 +00:00
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} // namespace Dynarmic::BackendX64
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