2016-07-01 14:01:06 +01:00
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/* This file is part of the dynarmic project.
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* Copyright (c) 2016 MerryMage
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* This software may be used and distributed according to the terms of the GNU
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* General Public License version 2 or any later version.
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*/
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#pragma once
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2018-07-16 01:16:11 +01:00
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#include <type_traits>
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2016-07-04 14:37:50 +01:00
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#include <unordered_map>
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2018-01-23 19:16:39 +00:00
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#include <unordered_set>
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2016-08-17 15:53:36 +01:00
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#include <vector>
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2016-07-01 14:01:06 +01:00
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2016-08-12 18:17:31 +01:00
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#include <boost/optional.hpp>
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2016-11-25 20:32:22 +00:00
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#include <xbyak_util.h>
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2016-07-01 14:01:06 +01:00
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#include "backend_x64/reg_alloc.h"
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2017-02-16 18:18:29 +00:00
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#include "common/address_range.h"
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2018-07-16 01:16:11 +01:00
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#include "common/bit_util.h"
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2018-07-14 07:08:15 +01:00
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#include "common/fp/rounding_mode.h"
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2018-01-02 17:45:39 +00:00
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#include "frontend/ir/location_descriptor.h"
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2016-08-17 15:53:36 +01:00
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#include "frontend/ir/terminal.h"
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2016-07-01 14:01:06 +01:00
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2018-01-26 13:51:48 +00:00
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namespace Dynarmic::IR {
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class Block;
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class Inst;
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2018-01-26 13:51:48 +00:00
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} // namespace Dynarmic::IR
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2016-09-03 21:48:03 +01:00
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2018-01-26 13:51:48 +00:00
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namespace Dynarmic::BackendX64 {
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2016-07-01 14:01:06 +01:00
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2016-12-05 04:14:58 +00:00
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class BlockOfCode;
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2018-07-16 01:16:11 +01:00
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using A64FullVectorWidth = std::integral_constant<size_t, 128>;
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// Array alias that always sizes itself according to the given type T
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// relative to the size of a vector register. e.g. T = u32 would result
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// in a std::array<u32, 4>.
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template <typename T>
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using VectorArray = std::array<T, A64FullVectorWidth::value / Common::BitSize<T>()>;
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2018-01-01 23:40:34 +00:00
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struct EmitContext {
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EmitContext(RegAlloc& reg_alloc, IR::Block& block);
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void EraseInstruction(IR::Inst* inst);
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2018-07-14 07:08:15 +01:00
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virtual FP::RoundingMode FPSCR_RMode() const = 0;
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2018-07-15 14:23:50 +01:00
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virtual u32 FPCR() const = 0;
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virtual bool FPSCR_RoundTowardsZero() const = 0;
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virtual bool FPSCR_FTZ() const = 0;
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virtual bool FPSCR_DN() const = 0;
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virtual bool AccurateNaN() const { return true; }
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RegAlloc& reg_alloc;
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IR::Block& block;
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};
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2018-01-01 22:34:05 +00:00
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class EmitX64 {
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public:
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struct BlockDescriptor {
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CodePtr entrypoint; // Entrypoint of emitted code
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size_t size; // Length in bytes of emitted code
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};
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2018-02-03 14:28:57 +00:00
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EmitX64(BlockOfCode& code);
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virtual ~EmitX64();
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/// Looks up an emitted host block in the cache.
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boost::optional<BlockDescriptor> GetBasicBlock(IR::LocationDescriptor descriptor) const;
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/// Empties the entire cache.
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virtual void ClearCache();
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/// Invalidates a selection of basic blocks.
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void InvalidateBasicBlocks(const std::unordered_set<IR::LocationDescriptor>& locations);
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2018-01-01 22:34:05 +00:00
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protected:
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// Microinstruction emitters
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#define OPCODE(name, type, ...) void Emit##name(EmitContext& ctx, IR::Inst* inst);
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#define A32OPC(...)
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#define A64OPC(...)
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2016-07-31 14:52:28 +01:00
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#include "frontend/ir/opcodes.inc"
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#undef OPCODE
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#undef A32OPC
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#undef A64OPC
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2016-07-14 12:52:53 +01:00
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// Helpers
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void EmitAddCycles(size_t cycles);
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Xbyak::Label EmitCond(IR::Cond cond);
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2016-08-18 18:16:18 +01:00
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void EmitCondPrelude(const IR::Block& block);
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void PushRSBHelper(Xbyak::Reg64 loc_desc_reg, Xbyak::Reg64 index_reg, IR::LocationDescriptor target);
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2016-07-07 10:53:09 +01:00
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2016-07-14 12:52:53 +01:00
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// Terminal instruction emitters
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void EmitTerminal(IR::Terminal terminal, IR::LocationDescriptor initial_location);
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virtual void EmitTerminalImpl(IR::Term::Interpret terminal, IR::LocationDescriptor initial_location) = 0;
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virtual void EmitTerminalImpl(IR::Term::ReturnToDispatch terminal, IR::LocationDescriptor initial_location) = 0;
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virtual void EmitTerminalImpl(IR::Term::LinkBlock terminal, IR::LocationDescriptor initial_location) = 0;
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virtual void EmitTerminalImpl(IR::Term::LinkBlockFast terminal, IR::LocationDescriptor initial_location) = 0;
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virtual void EmitTerminalImpl(IR::Term::PopRSBHint terminal, IR::LocationDescriptor initial_location) = 0;
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virtual void EmitTerminalImpl(IR::Term::If terminal, IR::LocationDescriptor initial_location) = 0;
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2018-01-07 16:33:02 +00:00
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virtual void EmitTerminalImpl(IR::Term::CheckBit terminal, IR::LocationDescriptor initial_location) = 0;
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virtual void EmitTerminalImpl(IR::Term::CheckHalt terminal, IR::LocationDescriptor initial_location) = 0;
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2016-12-19 15:01:49 +00:00
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// Patching
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struct PatchInformation {
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std::vector<CodePtr> jg;
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std::vector<CodePtr> jmp;
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std::vector<CodePtr> mov_rcx;
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};
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void Patch(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr);
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void Unpatch(const IR::LocationDescriptor& target_desc);
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virtual void EmitPatchJg(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr = nullptr) = 0;
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virtual void EmitPatchJmp(const IR::LocationDescriptor& target_desc, CodePtr target_code_ptr = nullptr) = 0;
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virtual void EmitPatchMovRcx(CodePtr target_code_ptr = nullptr) = 0;
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2016-07-14 12:52:53 +01:00
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// State
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BlockOfCode& code;
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std::unordered_map<IR::LocationDescriptor, BlockDescriptor> block_descriptors;
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std::unordered_map<IR::LocationDescriptor, PatchInformation> patch_information;
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};
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2018-01-26 13:51:48 +00:00
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} // namespace Dynarmic::BackendX64
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