Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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const char *getVersionString() const { return "7.05"; }
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void aadd(const Address& addr, const Reg32e ®) { opMR(addr, reg, T_0F38, 0x0FC, T_APX); }
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void aand(const Address& addr, const Reg32e ®) { opMR(addr, reg, T_0F38|T_66, 0x0FC, T_APX|T_66); }
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void adc(const Operand& op, uint32_t imm) { opOI(op, imm, 0x10, 2); }
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void adc(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x10); }
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void adc(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NONE, 2); }
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void adc(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NONE, 0x10); }
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void adcx(const Reg32e& d, const Reg32e& reg, const Operand& op) { opROO(d, op, reg, T_66, 0x66); }
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void adcx(const Reg32e& reg, const Operand& op) { if (!reg.isREG(16|i32e) && reg.getBit() == op.getBit()) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) if (opROO(Reg(), op, reg, T_66, 0x66)) return; opRO(reg, op, T_66 | T_0F38, 0xF6); }
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void add(const Operand& op, uint32_t imm) { opOI(op, imm, 0x00, 0); }
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void add(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x00); }
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void add(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 0); }
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void add(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x00); }
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void addpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x58, isXMM_XMMorMEM); }
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void addps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x58, isXMM_XMMorMEM); }
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void addsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x58, isXMM_XMMorMEM); }
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void addss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x58, isXMM_XMMorMEM); }
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void addsubpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F|T_YMM, 0xD0, isXMM_XMMorMEM); }
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void addsubps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F|T_YMM, 0xD0, isXMM_XMMorMEM); }
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void adox(const Reg32e& d, const Reg32e& reg, const Operand& op) { opROO(d, op, reg, T_F3, 0x66); }
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void adox(const Reg32e& reg, const Operand& op) { if (!reg.isREG(16|i32e) && reg.getBit() == op.getBit()) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) if (opROO(Reg(), op, reg, T_F3, 0x66)) return; opRO(reg, op, T_F3 | T_0F38, 0xF6); }
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void aesdec(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM|T_EVEX, 0xDE, isXMM_XMMorMEM); }
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void aesdeclast(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM|T_EVEX, 0xDF, isXMM_XMMorMEM); }
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void aesenc(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM|T_EVEX, 0xDC, isXMM_XMMorMEM); }
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void aesenclast(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM|T_EVEX, 0xDD, isXMM_XMMorMEM); }
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void aesimc(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_W0, 0xDB, isXMM_XMMorMEM, NONE); }
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void aeskeygenassist(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0xDF, isXMM_XMMorMEM, imm); }
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void and_(const Operand& op, uint32_t imm) { opOI(op, imm, 0x20, 4); }
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void and_(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x20); }
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void and_(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 4); }
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void and_(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x20); }
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void andn(const Reg32e& r1, const Reg32e& r2, const Operand& op) { opRRO(r1, r2, op, T_APX|T_0F38|T_NF, 0xf2); }
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void andnpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x55, isXMM_XMMorMEM); }
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void andnps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x55, isXMM_XMMorMEM); }
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void andpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x54, isXMM_XMMorMEM); }
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void andps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x54, isXMM_XMMorMEM); }
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void aor(const Address& addr, const Reg32e ®) { opMR(addr, reg, T_0F38|T_F2, 0x0FC, T_APX|T_F2); }
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void axor(const Address& addr, const Reg32e ®) { opMR(addr, reg, T_0F38|T_F3, 0x0FC, T_APX|T_F3); }
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void bextr(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_APX|T_0F38|T_NF, 0xf7); }
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void blendpd(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0D, isXMM_XMMorMEM, static_cast<uint8_t>(imm)); }
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void blendps(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0C, isXMM_XMMorMEM, static_cast<uint8_t>(imm)); }
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void blendvpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x15, isXMM_XMMorMEM, NONE); }
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void blendvps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x14, isXMM_XMMorMEM, NONE); }
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void blsi(const Reg32e& r, const Operand& op) { opRRO(Reg32e(3, r.getBit()), r, op, T_APX|T_0F38|T_NF, 0xf3); }
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void blsmsk(const Reg32e& r, const Operand& op) { opRRO(Reg32e(2, r.getBit()), r, op, T_APX|T_0F38|T_NF, 0xf3); }
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void blsr(const Reg32e& r, const Operand& op) { opRRO(Reg32e(1, r.getBit()), r, op, T_APX|T_0F38|T_NF, 0xf3); }
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Squashed 'externals/xbyak/' changes from d512551e..2794cde7
2794cde7 add xword, yword, etc. in Xbyak::util
fb9c04e4 fix document for vfpclassps
a51be78b fix test dependency
04fdfb1e update version
e6354f8b add vgf2p8mulb
09a12642 add gf2p8affineqb
d171ba0e add gf2p8affineinvqb
457f4fd0 add vpshufbitqmb
5af0ba39 add vpexpand{b,w}
e450f965 vpopcnt{d,q} supports ptr_b
48499eb1 add vpdpbusd(s), vpdpwssd(s)
9c745109 add vpdpbusd, vpdpbusds
0e1a11b4 add vpopcnt{b,w,d,q}
9acfc132 add vpshrd(v){w,d,q}
ac8de850 add vpshld(v){w,d,q}
f181c259 add vcompressb, vcompressw
5a402477 vpclmulqdq supports AVX-512
9e16b40b vaes* supports AVX-512
7fde08e0 add flags for intel's manual 319433-030.pdf
c5da3778 add test of v4fmaddps, vp4dpwssd, etc.
e4fc9d8a fix mpx encoding
d0b2fb62 add bnd(0xf2) prefix for MPX
f12b5678 use db for array
cd74ab44 remove bat file
git-subtree-dir: externals/xbyak
git-subtree-split: 2794cde79eb71e86490061cac9622ad0067b8d15
2020-04-22 20:45:52 +01:00
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void bnd() { db(0xF2); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void bndcl(const BoundsReg& bnd, const Operand& op) { opRext(op, i32e, bnd.getIdx(), T_F3 | T_0F, 0x1A, !op.isMEM()); }
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void bndcn(const BoundsReg& bnd, const Operand& op) { opRext(op, i32e, bnd.getIdx(), T_F2 | T_0F, 0x1B, !op.isMEM()); }
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void bndcu(const BoundsReg& bnd, const Operand& op) { opRext(op, i32e, bnd.getIdx(), T_F2 | T_0F, 0x1A, !op.isMEM()); }
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void bndldx(const BoundsReg& bnd, const Address& addr) { opMIB(addr, bnd, T_0F, 0x1A); }
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void bndmk(const BoundsReg& bnd, const Address& addr) { opMR(addr, bnd, T_F3 | T_0F, 0x1B); }
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void bndmov(const Address& addr, const BoundsReg& bnd) { opMR(addr, bnd, T_66 | T_0F, 0x1B); }
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void bndmov(const BoundsReg& bnd, const Operand& op) { opRO(bnd, op, T_66 | T_0F, 0x1A, op.isBNDREG()); }
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void bndstx(const Address& addr, const BoundsReg& bnd) { opMIB(addr, bnd, T_0F, 0x1B); }
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void bsf(const Reg®, const Operand& op) { opRO(reg, op, T_0F, 0xBC, op.isREG(16|i32e)); }
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void bsr(const Reg®, const Operand& op) { opRO(reg, op, T_0F, 0xBD, op.isREG(16|i32e)); }
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void bt(const Operand& op, const Reg& reg) { opRO(reg, op, T_0F, 0xA3, op.isREG(16|i32e) && op.getBit() == reg.getBit()); }
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void bt(const Operand& op, uint8_t imm) { opRext(op, 16|i32e, 4, T_0F, 0xba, false, 1); db(imm); }
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void btc(const Operand& op, const Reg& reg) { opRO(reg, op, T_0F, 0xBB, op.isREG(16|i32e) && op.getBit() == reg.getBit()); }
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void btc(const Operand& op, uint8_t imm) { opRext(op, 16|i32e, 7, T_0F, 0xba, false, 1); db(imm); }
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void btr(const Operand& op, const Reg& reg) { opRO(reg, op, T_0F, 0xB3, op.isREG(16|i32e) && op.getBit() == reg.getBit()); }
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void btr(const Operand& op, uint8_t imm) { opRext(op, 16|i32e, 6, T_0F, 0xba, false, 1); db(imm); }
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void bts(const Operand& op, const Reg& reg) { opRO(reg, op, T_0F, 0xAB, op.isREG(16|i32e) && op.getBit() == reg.getBit()); }
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void bts(const Operand& op, uint8_t imm) { opRext(op, 16|i32e, 5, T_0F, 0xba, false, 1); db(imm); }
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void bzhi(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_APX|T_0F38|T_NF, 0xf5); }
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2020-04-22 20:25:57 +01:00
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void cbw() { db(0x66); db(0x98); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void ccmpa(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 7); }
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void ccmpa(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 7); }
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void ccmpae(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 3); }
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void ccmpae(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 3); }
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void ccmpb(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 2); }
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void ccmpb(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 2); }
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void ccmpbe(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 6); }
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void ccmpbe(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 6); }
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void ccmpc(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 2); }
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void ccmpc(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 2); }
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void ccmpe(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 4); }
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void ccmpe(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 4); }
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void ccmpf(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 11); }
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void ccmpf(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 11); }
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void ccmpg(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 15); }
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void ccmpg(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 15); }
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void ccmpge(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 13); }
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void ccmpge(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 13); }
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void ccmpl(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 12); }
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void ccmpl(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 12); }
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void ccmple(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 14); }
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void ccmple(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 14); }
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void ccmpna(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 6); }
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void ccmpna(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 6); }
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void ccmpnae(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 2); }
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void ccmpnae(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 2); }
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void ccmpnb(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 3); }
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void ccmpnb(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 3); }
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void ccmpnbe(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 7); }
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void ccmpnbe(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 7); }
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void ccmpnc(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 3); }
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void ccmpnc(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 3); }
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void ccmpne(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 5); }
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void ccmpne(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 5); }
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void ccmpng(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 14); }
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void ccmpng(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 14); }
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void ccmpnge(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 12); }
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void ccmpnge(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 12); }
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void ccmpnl(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 13); }
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void ccmpnl(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 13); }
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void ccmpnle(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 15); }
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void ccmpnle(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 15); }
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void ccmpno(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 1); }
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void ccmpno(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 1); }
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void ccmpns(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 9); }
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void ccmpns(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 9); }
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void ccmpnz(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 5); }
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void ccmpnz(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 5); }
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void ccmpo(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 0); }
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void ccmpo(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 0); }
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void ccmps(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 8); }
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void ccmps(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 8); }
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void ccmpt(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 10); }
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void ccmpt(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 10); }
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void ccmpz(const Operand& op, int imm, int dfv = 0) { opCcmpi(op, imm, dfv, 4); }
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void ccmpz(const Operand& op1, const Operand& op2, int dfv = 0) { opCcmp(op1, op2, dfv, 0x38, 4); }
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2020-04-22 20:25:57 +01:00
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void cdq() { db(0x99); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void cfcmovb(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x42); }
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void cfcmovb(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x42); }
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void cfcmovbe(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x46); }
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void cfcmovbe(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x46); }
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void cfcmovl(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x4C); }
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void cfcmovl(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4C); }
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void cfcmovle(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x4E); }
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void cfcmovle(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4E); }
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void cfcmovnb(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x43); }
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void cfcmovnb(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x43); }
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void cfcmovnbe(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x47); }
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void cfcmovnbe(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x47); }
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void cfcmovnl(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x4D); }
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void cfcmovnl(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4D); }
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void cfcmovnle(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x4F); }
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void cfcmovnle(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4F); }
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void cfcmovno(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x41); }
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void cfcmovno(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x41); }
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void cfcmovnp(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x4B); }
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void cfcmovnp(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4B); }
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void cfcmovns(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x49); }
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void cfcmovns(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x49); }
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void cfcmovnz(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x45); }
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void cfcmovnz(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x45); }
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void cfcmovo(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x40); }
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void cfcmovo(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x40); }
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void cfcmovp(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x4A); }
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void cfcmovp(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x4A); }
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void cfcmovs(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x48); }
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void cfcmovs(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x48); }
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void cfcmovz(const Operand& op1, const Operand& op2) { opCfcmov(Reg(), op1, op2, 0x44); }
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void cfcmovz(const Reg& d, const Reg& r, const Operand& op) { opCfcmov(d|T_nf, op, r, 0x44); }
|
2020-04-22 20:25:57 +01:00
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void clc() { db(0xF8); }
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void cld() { db(0xFC); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void cldemote(const Address& addr) { opMR(addr, eax, T_0F, 0x1C); }
|
|
|
|
void clflush(const Address& addr) { opMR(addr, Reg32(7), T_0F, 0xAE); }
|
|
|
|
void clflushopt(const Address& addr) { opMR(addr, Reg32(7), T_66 | T_0F, 0xAE); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void cli() { db(0xFA); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void clwb(const Address& addr) { opMR(addr, esi, T_66 | T_0F, 0xAE); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void clzero() { db(0x0F); db(0x01); db(0xFC); }
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2020-04-22 20:25:57 +01:00
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void cmc() { db(0xF5); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void cmova(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 7); }//-V524
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void cmova(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 7, op.isREG(16|i32e)); }//-V524
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void cmovae(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 3); }//-V524
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void cmovae(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 3, op.isREG(16|i32e)); }//-V524
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void cmovb(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 2); }//-V524
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void cmovb(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 2, op.isREG(16|i32e)); }//-V524
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void cmovbe(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 6); }//-V524
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void cmovbe(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 6, op.isREG(16|i32e)); }//-V524
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void cmovc(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 2); }//-V524
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void cmovc(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 2, op.isREG(16|i32e)); }//-V524
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void cmove(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 4); }//-V524
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void cmove(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 4, op.isREG(16|i32e)); }//-V524
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void cmovg(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 15); }//-V524
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void cmovg(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 15, op.isREG(16|i32e)); }//-V524
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void cmovge(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 13); }//-V524
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void cmovge(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 13, op.isREG(16|i32e)); }//-V524
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void cmovl(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 12); }//-V524
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void cmovl(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 12, op.isREG(16|i32e)); }//-V524
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void cmovle(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 14); }//-V524
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void cmovle(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 14, op.isREG(16|i32e)); }//-V524
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void cmovna(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 6); }//-V524
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void cmovna(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 6, op.isREG(16|i32e)); }//-V524
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void cmovnae(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 2); }//-V524
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void cmovnae(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 2, op.isREG(16|i32e)); }//-V524
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void cmovnb(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 3); }//-V524
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void cmovnb(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 3, op.isREG(16|i32e)); }//-V524
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void cmovnbe(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 7); }//-V524
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void cmovnbe(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 7, op.isREG(16|i32e)); }//-V524
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void cmovnc(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 3); }//-V524
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void cmovnc(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 3, op.isREG(16|i32e)); }//-V524
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void cmovne(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 5); }//-V524
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void cmovne(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 5, op.isREG(16|i32e)); }//-V524
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void cmovng(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 14); }//-V524
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void cmovng(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 14, op.isREG(16|i32e)); }//-V524
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void cmovnge(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 12); }//-V524
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void cmovnge(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 12, op.isREG(16|i32e)); }//-V524
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void cmovnl(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 13); }//-V524
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void cmovnl(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 13, op.isREG(16|i32e)); }//-V524
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void cmovnle(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 15); }//-V524
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void cmovnle(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 15, op.isREG(16|i32e)); }//-V524
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void cmovno(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 1); }//-V524
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void cmovno(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 1, op.isREG(16|i32e)); }//-V524
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void cmovnp(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 11); }//-V524
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void cmovnp(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 11, op.isREG(16|i32e)); }//-V524
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void cmovns(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 9); }//-V524
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void cmovns(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 9, op.isREG(16|i32e)); }//-V524
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void cmovnz(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 5); }//-V524
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void cmovnz(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 5, op.isREG(16|i32e)); }//-V524
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void cmovo(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 0); }//-V524
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void cmovo(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 0, op.isREG(16|i32e)); }//-V524
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void cmovp(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 10); }//-V524
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void cmovp(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 10, op.isREG(16|i32e)); }//-V524
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void cmovpe(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 10); }//-V524
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void cmovpe(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 10, op.isREG(16|i32e)); }//-V524
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void cmovpo(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 11); }//-V524
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void cmovpo(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 11, op.isREG(16|i32e)); }//-V524
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void cmovs(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 8); }//-V524
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void cmovs(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 8, op.isREG(16|i32e)); }//-V524
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void cmovz(const Reg& d, const Reg& reg, const Operand& op) { opROO(d, op, reg, T_APX|T_ND1, 0x40 | 4); }//-V524
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void cmovz(const Reg& reg, const Operand& op) { opRO(reg, op, T_0F, 0x40 | 4, op.isREG(16|i32e)); }//-V524
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void cmp(const Operand& op, uint32_t imm) { opOI(op, imm, 0x38, 7); }
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void cmp(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x38); }
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2020-04-22 20:25:57 +01:00
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void cmpeqpd(const Xmm& x, const Operand& op) { cmppd(x, op, 0); }
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void cmpeqps(const Xmm& x, const Operand& op) { cmpps(x, op, 0); }
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void cmpeqsd(const Xmm& x, const Operand& op) { cmpsd(x, op, 0); }
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void cmpeqss(const Xmm& x, const Operand& op) { cmpss(x, op, 0); }
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void cmplepd(const Xmm& x, const Operand& op) { cmppd(x, op, 2); }
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void cmpleps(const Xmm& x, const Operand& op) { cmpps(x, op, 2); }
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void cmplesd(const Xmm& x, const Operand& op) { cmpsd(x, op, 2); }
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void cmpless(const Xmm& x, const Operand& op) { cmpss(x, op, 2); }
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void cmpltpd(const Xmm& x, const Operand& op) { cmppd(x, op, 1); }
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void cmpltps(const Xmm& x, const Operand& op) { cmpps(x, op, 1); }
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void cmpltsd(const Xmm& x, const Operand& op) { cmpsd(x, op, 1); }
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void cmpltss(const Xmm& x, const Operand& op) { cmpss(x, op, 1); }
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void cmpneqpd(const Xmm& x, const Operand& op) { cmppd(x, op, 4); }
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void cmpneqps(const Xmm& x, const Operand& op) { cmpps(x, op, 4); }
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void cmpneqsd(const Xmm& x, const Operand& op) { cmpsd(x, op, 4); }
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void cmpneqss(const Xmm& x, const Operand& op) { cmpss(x, op, 4); }
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void cmpnlepd(const Xmm& x, const Operand& op) { cmppd(x, op, 6); }
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void cmpnleps(const Xmm& x, const Operand& op) { cmpps(x, op, 6); }
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void cmpnlesd(const Xmm& x, const Operand& op) { cmpsd(x, op, 6); }
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void cmpnless(const Xmm& x, const Operand& op) { cmpss(x, op, 6); }
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void cmpnltpd(const Xmm& x, const Operand& op) { cmppd(x, op, 5); }
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void cmpnltps(const Xmm& x, const Operand& op) { cmpps(x, op, 5); }
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void cmpnltsd(const Xmm& x, const Operand& op) { cmpsd(x, op, 5); }
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void cmpnltss(const Xmm& x, const Operand& op) { cmpss(x, op, 5); }
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void cmpordpd(const Xmm& x, const Operand& op) { cmppd(x, op, 7); }
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void cmpordps(const Xmm& x, const Operand& op) { cmpps(x, op, 7); }
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void cmpordsd(const Xmm& x, const Operand& op) { cmpsd(x, op, 7); }
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void cmpordss(const Xmm& x, const Operand& op) { cmpss(x, op, 7); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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|
|
void cmppd(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_66, 0xC2, isXMM_XMMorMEM, imm8); }
|
|
|
|
void cmpps(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F, 0xC2, isXMM_XMMorMEM, imm8); }
|
2020-04-22 20:51:10 +01:00
|
|
|
void cmpsb() { db(0xA6); }
|
|
|
|
void cmpsd() { db(0xA7); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void cmpsd(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_F2, 0xC2, isXMM_XMMorMEM, imm8); }
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void cmpss(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_F3, 0xC2, isXMM_XMMorMEM, imm8); }
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2020-04-22 20:51:10 +01:00
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|
|
void cmpsw() { db(0x66); db(0xA7); }
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2020-04-22 20:25:57 +01:00
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|
|
void cmpunordpd(const Xmm& x, const Operand& op) { cmppd(x, op, 3); }
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void cmpunordps(const Xmm& x, const Operand& op) { cmpps(x, op, 3); }
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void cmpunordsd(const Xmm& x, const Operand& op) { cmpsd(x, op, 3); }
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void cmpunordss(const Xmm& x, const Operand& op) { cmpss(x, op, 3); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void cmpxchg(const Operand& op, const Reg& reg) { opRO(reg, op, T_0F, 0xB0 | (reg.isBit(8) ? 0 : 1), op.getBit() == reg.getBit()); }
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void cmpxchg8b(const Address& addr) { opMR(addr, Reg32(1), T_0F, 0xC7); }
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void comisd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x2F, isXMM_XMMorMEM); }
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void comiss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x2F, isXMM_XMMorMEM); }
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2020-04-22 20:25:57 +01:00
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void cpuid() { db(0x0F); db(0xA2); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void crc32(const Reg32e& r, const Operand& op) { if (!((r.isBit(32) && op.isBit(8|16|32)) || (r.isBit(64) && op.isBit(8|64)))) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) int code = 0xF0 | (op.isBit(8) ? 0 : 1); uint64_t type = op.isBit(16) ? T_66:0; if (opROO(Reg(), op, static_cast<const Reg&>(r), T_APX|type, code)) return; opRO(r, op, T_F2|T_0F38|type, code); }
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void ctesta(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 7); }
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void ctesta(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 7); }
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void ctestae(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 3); }
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void ctestae(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 3); }
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void ctestb(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 2); }
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void ctestb(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 2); }
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void ctestbe(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 6); }
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void ctestbe(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 6); }
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void ctestc(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 2); }
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void ctestc(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 2); }
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void cteste(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 4); }
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void cteste(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 4); }
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void ctestf(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 11); }
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void ctestf(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 11); }
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void ctestg(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 15); }
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void ctestg(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 15); }
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void ctestge(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 13); }
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void ctestge(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 13); }
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void ctestl(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 12); }
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void ctestl(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 12); }
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void ctestle(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 14); }
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void ctestle(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 14); }
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void ctestna(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 6); }
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void ctestna(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 6); }
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void ctestnae(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 2); }
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void ctestnae(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 2); }
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void ctestnb(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 3); }
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void ctestnb(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 3); }
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void ctestnbe(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 7); }
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void ctestnbe(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 7); }
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void ctestnc(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 3); }
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void ctestnc(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 3); }
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void ctestne(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 5); }
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void ctestne(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 5); }
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void ctestng(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 14); }
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void ctestng(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 14); }
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void ctestnge(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 12); }
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void ctestnge(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 12); }
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void ctestnl(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 13); }
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void ctestnl(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 13); }
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void ctestnle(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 15); }
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void ctestnle(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 15); }
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void ctestno(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 1); }
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void ctestno(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 1); }
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void ctestns(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 9); }
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void ctestns(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 9); }
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void ctestnz(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 5); }
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void ctestnz(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 5); }
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void ctesto(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 0); }
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void ctesto(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 0); }
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void ctests(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 8); }
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void ctests(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 8); }
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void ctestt(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 10); }
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void ctestt(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 10); }
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void ctestz(const Operand& op, const Reg& r, int dfv = 0) { opCcmp(op, r, dfv, 0x84, 4); }
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void ctestz(const Operand& op, int imm, int dfv = 0) { opTesti(op, imm, dfv, 4); }
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void cvtdq2pd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F, 0xE6, isXMM_XMMorMEM); }
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void cvtdq2ps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5B, isXMM_XMMorMEM); }
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void cvtpd2dq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F, 0xE6, isXMM_XMMorMEM); }
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void cvtpd2pi(const Reg& reg, const Operand& op) { opSSE(reg, op, T_66|T_0F, 0x2D, isMMX_XMMorMEM); }
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void cvtpd2ps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x5A, isXMM_XMMorMEM); }
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void cvtpi2pd(const Reg& reg, const Operand& op) { opSSE(reg, op, T_66|T_0F, 0x2A, isXMM_MMXorMEM); }
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void cvtpi2ps(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F, 0x2A, isXMM_MMXorMEM); }
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void cvtps2dq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x5B, isXMM_XMMorMEM); }
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void cvtps2pd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5A, isXMM_XMMorMEM); }
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void cvtps2pi(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F, 0x2D, isMMX_XMMorMEM); }
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void cvtsd2si(const Reg& reg, const Operand& op) { opSSE(reg, op, T_F2|T_0F, 0x2D, isREG32_XMMorMEM); }
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void cvtsd2ss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F, 0x5A, isXMM_XMMorMEM); }
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void cvtsi2sd(const Reg& reg, const Operand& op) { opSSE(reg, op, T_F2|T_0F, 0x2A, isXMM_REG32orMEM); }
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void cvtsi2ss(const Reg& reg, const Operand& op) { opSSE(reg, op, T_F3|T_0F, 0x2A, isXMM_REG32orMEM); }
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void cvtss2sd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F, 0x5A, isXMM_XMMorMEM); }
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void cvtss2si(const Reg& reg, const Operand& op) { opSSE(reg, op, T_F3|T_0F, 0x2D, isREG32_XMMorMEM); }
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void cvttpd2dq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0xE6, isXMM_XMMorMEM); }
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void cvttpd2pi(const Reg& reg, const Operand& op) { opSSE(reg, op, T_66|T_0F, 0x2C, isMMX_XMMorMEM); }
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void cvttps2dq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F, 0x5B, isXMM_XMMorMEM); }
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void cvttps2pi(const Reg& reg, const Operand& op) { opSSE(reg, op, T_0F, 0x2C, isMMX_XMMorMEM); }
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void cvttsd2si(const Reg& reg, const Operand& op) { opSSE(reg, op, T_F2|T_0F, 0x2C, isREG32_XMMorMEM); }
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void cvttss2si(const Reg& reg, const Operand& op) { opSSE(reg, op, T_F3|T_0F, 0x2C, isREG32_XMMorMEM); }
|
2020-04-22 20:25:57 +01:00
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void cwd() { db(0x66); db(0x99); }
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void cwde() { db(0x98); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void dec(const Operand& op) { opIncDec(Reg(), op, 1); }
|
|
|
|
void dec(const Reg& d, const Operand& op) { opIncDec(d, op, 1); }
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|
void div(const Operand& op) { opRext(op, 0, 6, T_APX|T_NF|T_CODE1_IF1, 0xF6); }
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|
|
|
void divpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5E, isXMM_XMMorMEM); }
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|
void divps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5E, isXMM_XMMorMEM); }
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|
void divsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5E, isXMM_XMMorMEM); }
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|
void divss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5E, isXMM_XMMorMEM); }
|
|
|
|
void dppd(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x41, isXMM_XMMorMEM, static_cast<uint8_t>(imm)); }
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|
|
|
void dpps(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x40, isXMM_XMMorMEM, static_cast<uint8_t>(imm)); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void emms() { db(0x0F); db(0x77); }
|
Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void endbr32() { db(0xF3); db(0x0F); db(0x1E); db(0xFB); }
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void endbr64() { db(0xF3); db(0x0F); db(0x1E); db(0xFA); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void enter(uint16_t x, uint8_t y) { db(0xC8); dw(x); db(y); }
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void extractps(const Operand& op, const Xmm& xmm, uint8_t imm) { opExt(op, xmm, 0x17, imm); }
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2020-04-22 20:25:57 +01:00
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void f2xm1() { db(0xD9); db(0xF0); }
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void fabs() { db(0xD9); db(0xE1); }
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void fadd(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 0, 0); }
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void fadd(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xD8C0, 0xDCC0); }
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void fadd(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xD8C0, 0xDCC0); }
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void faddp() { db(0xDE); db(0xC1); }
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void faddp(const Fpu& reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEC0); }
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void faddp(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEC0); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void fbld(const Address& addr) { opMR(addr, Reg32(4), 0, 0xDF); }
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void fbstp(const Address& addr) { opMR(addr, Reg32(6), 0, 0xDF); }
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2020-04-22 20:25:57 +01:00
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void fchs() { db(0xD9); db(0xE0); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void fclex() { db(0x9B); db(0xDB); db(0xE2); }
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2020-04-22 20:25:57 +01:00
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void fcmovb(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDAC0, 0x00C0); }
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void fcmovb(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDAC0, 0x00C0); }
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void fcmovbe(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDAD0, 0x00D0); }
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void fcmovbe(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDAD0, 0x00D0); }
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void fcmove(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDAC8, 0x00C8); }
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void fcmove(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDAC8, 0x00C8); }
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void fcmovnb(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDBC0, 0x00C0); }
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void fcmovnb(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDBC0, 0x00C0); }
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void fcmovnbe(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDBD0, 0x00D0); }
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void fcmovnbe(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDBD0, 0x00D0); }
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void fcmovne(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDBC8, 0x00C8); }
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void fcmovne(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDBC8, 0x00C8); }
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void fcmovnu(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDBD8, 0x00D8); }
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void fcmovnu(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDBD8, 0x00D8); }
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void fcmovu(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDAD8, 0x00D8); }
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void fcmovu(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDAD8, 0x00D8); }
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void fcom() { db(0xD8); db(0xD1); }
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void fcom(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 2, 0); }
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void fcom(const Fpu& reg) { opFpu(reg, 0xD8, 0xD0); }
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void fcomi(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDBF0, 0x00F0); }
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void fcomi(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDBF0, 0x00F0); }
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void fcomip(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDFF0, 0x00F0); }
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void fcomip(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDFF0, 0x00F0); }
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void fcomp() { db(0xD8); db(0xD9); }
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void fcomp(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 3, 0); }
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void fcomp(const Fpu& reg) { opFpu(reg, 0xD8, 0xD8); }
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void fcompp() { db(0xDE); db(0xD9); }
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void fcos() { db(0xD9); db(0xFF); }
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void fdecstp() { db(0xD9); db(0xF6); }
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void fdiv(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 6, 0); }
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void fdiv(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xD8F0, 0xDCF8); }
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void fdiv(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xD8F0, 0xDCF8); }
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void fdivp() { db(0xDE); db(0xF9); }
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void fdivp(const Fpu& reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEF8); }
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void fdivp(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEF8); }
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void fdivr(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 7, 0); }
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void fdivr(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xD8F8, 0xDCF0); }
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void fdivr(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xD8F8, 0xDCF0); }
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void fdivrp() { db(0xDE); db(0xF1); }
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void fdivrp(const Fpu& reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEF0); }
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void fdivrp(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEF0); }
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void ffree(const Fpu& reg) { opFpu(reg, 0xDD, 0xC0); }
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void fiadd(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 0, 0); }
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void ficom(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 2, 0); }
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void ficomp(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 3, 0); }
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void fidiv(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 6, 0); }
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void fidivr(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 7, 0); }
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void fild(const Address& addr) { opFpuMem(addr, 0xDF, 0xDB, 0xDF, 0, 5); }
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void fimul(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 1, 0); }
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void fincstp() { db(0xD9); db(0xF7); }
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void finit() { db(0x9B); db(0xDB); db(0xE3); }
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void fist(const Address& addr) { opFpuMem(addr, 0xDF, 0xDB, 0x00, 2, 0); }
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void fistp(const Address& addr) { opFpuMem(addr, 0xDF, 0xDB, 0xDF, 3, 7); }
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void fisttp(const Address& addr) { opFpuMem(addr, 0xDF, 0xDB, 0xDD, 1, 0); }
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void fisub(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 4, 0); }
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void fisubr(const Address& addr) { opFpuMem(addr, 0xDE, 0xDA, 0x00, 5, 0); }
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void fld(const Address& addr) { opFpuMem(addr, 0x00, 0xD9, 0xDD, 0, 0); }
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void fld(const Fpu& reg) { opFpu(reg, 0xD9, 0xC0); }
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void fld1() { db(0xD9); db(0xE8); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void fldcw(const Address& addr) { opMR(addr, Reg32(5), 0, 0xD9); }
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void fldenv(const Address& addr) { opMR(addr, Reg32(4), 0, 0xD9); }
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2020-04-22 20:25:57 +01:00
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void fldl2e() { db(0xD9); db(0xEA); }
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void fldl2t() { db(0xD9); db(0xE9); }
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void fldlg2() { db(0xD9); db(0xEC); }
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void fldln2() { db(0xD9); db(0xED); }
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void fldpi() { db(0xD9); db(0xEB); }
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void fldz() { db(0xD9); db(0xEE); }
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void fmul(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 1, 0); }
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void fmul(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xD8C8, 0xDCC8); }
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void fmul(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xD8C8, 0xDCC8); }
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void fmulp() { db(0xDE); db(0xC9); }
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void fmulp(const Fpu& reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEC8); }
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void fmulp(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEC8); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void fnclex() { db(0xDB); db(0xE2); }
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2020-04-22 20:25:57 +01:00
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void fninit() { db(0xDB); db(0xE3); }
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void fnop() { db(0xD9); db(0xD0); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void fnsave(const Address& addr) { opMR(addr, Reg32(6), 0, 0xDD); }
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void fnstcw(const Address& addr) { opMR(addr, Reg32(7), 0, 0xD9); }
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void fnstenv(const Address& addr) { opMR(addr, Reg32(6), 0, 0xD9); }
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void fnstsw(const Address& addr) { opMR(addr, Reg32(7), 0, 0xDD); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void fnstsw(const Reg16& r) { if (r.getIdx() != Operand::AX) XBYAK_THROW(ERR_BAD_PARAMETER) db(0xDF); db(0xE0); }
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2020-04-22 20:25:57 +01:00
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void fpatan() { db(0xD9); db(0xF3); }
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void fprem() { db(0xD9); db(0xF8); }
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void fprem1() { db(0xD9); db(0xF5); }
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void fptan() { db(0xD9); db(0xF2); }
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void frndint() { db(0xD9); db(0xFC); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void frstor(const Address& addr) { opMR(addr, Reg32(4), 0, 0xDD); }
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void fsave(const Address& addr) { db(0x9B); opMR(addr, Reg32(6), 0, 0xDD); }
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2020-04-22 20:25:57 +01:00
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void fscale() { db(0xD9); db(0xFD); }
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void fsin() { db(0xD9); db(0xFE); }
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void fsincos() { db(0xD9); db(0xFB); }
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void fsqrt() { db(0xD9); db(0xFA); }
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void fst(const Address& addr) { opFpuMem(addr, 0x00, 0xD9, 0xDD, 2, 0); }
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void fst(const Fpu& reg) { opFpu(reg, 0xDD, 0xD0); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void fstcw(const Address& addr) { db(0x9B); opMR(addr, Reg32(7), 0, 0xD9); }
|
|
|
|
void fstenv(const Address& addr) { db(0x9B); opMR(addr, Reg32(6), 0, 0xD9); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void fstp(const Address& addr) { opFpuMem(addr, 0x00, 0xD9, 0xDD, 3, 0); }
|
|
|
|
void fstp(const Fpu& reg) { opFpu(reg, 0xDD, 0xD8); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void fstsw(const Address& addr) { db(0x9B); opMR(addr, Reg32(7), 0, 0xDD); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void fstsw(const Reg16& r) { if (r.getIdx() != Operand::AX) XBYAK_THROW(ERR_BAD_PARAMETER) db(0x9B); db(0xDF); db(0xE0); }
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2020-04-22 20:25:57 +01:00
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void fsub(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 4, 0); }
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void fsub(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xD8E0, 0xDCE8); }
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void fsub(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xD8E0, 0xDCE8); }
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void fsubp() { db(0xDE); db(0xE9); }
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void fsubp(const Fpu& reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEE8); }
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void fsubp(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEE8); }
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void fsubr(const Address& addr) { opFpuMem(addr, 0x00, 0xD8, 0xDC, 5, 0); }
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void fsubr(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xD8E8, 0xDCE0); }
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void fsubr(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xD8E8, 0xDCE0); }
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void fsubrp() { db(0xDE); db(0xE1); }
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void fsubrp(const Fpu& reg1) { opFpuFpu(reg1, st0, 0x0000, 0xDEE0); }
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void fsubrp(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0x0000, 0xDEE0); }
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void ftst() { db(0xD9); db(0xE4); }
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void fucom() { db(0xDD); db(0xE1); }
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void fucom(const Fpu& reg) { opFpu(reg, 0xDD, 0xE0); }
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void fucomi(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDBE8, 0x00E8); }
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void fucomi(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDBE8, 0x00E8); }
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void fucomip(const Fpu& reg1) { opFpuFpu(st0, reg1, 0xDFE8, 0x00E8); }
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void fucomip(const Fpu& reg1, const Fpu& reg2) { opFpuFpu(reg1, reg2, 0xDFE8, 0x00E8); }
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void fucomp() { db(0xDD); db(0xE9); }
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void fucomp(const Fpu& reg) { opFpu(reg, 0xDD, 0xE8); }
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void fucompp() { db(0xDA); db(0xE9); }
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void fwait() { db(0x9B); }
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void fxam() { db(0xD9); db(0xE5); }
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void fxch() { db(0xD9); db(0xC9); }
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void fxch(const Fpu& reg) { opFpu(reg, 0xD9, 0xC8); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void fxrstor(const Address& addr) { opMR(addr, Reg32(1), T_0F, 0xAE); }
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2020-04-22 20:25:57 +01:00
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void fxtract() { db(0xD9); db(0xF4); }
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void fyl2x() { db(0xD9); db(0xF1); }
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void fyl2xp1() { db(0xD9); db(0xF9); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void gf2p8affineinvqb(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0xCF, isXMM_XMMorMEM, static_cast<uint8_t>(imm)); }
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void gf2p8affineqb(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0xCE, isXMM_XMMorMEM, static_cast<uint8_t>(imm)); }
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void gf2p8mulb(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0xCF, isXMM_XMMorMEM); }
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void haddpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F|T_YMM, 0x7C, isXMM_XMMorMEM); }
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void haddps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F|T_YMM, 0x7C, isXMM_XMMorMEM); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void hlt() { db(0xF4); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void hsubpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F|T_YMM, 0x7D, isXMM_XMMorMEM); }
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void hsubps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F2|T_0F|T_YMM, 0x7D, isXMM_XMMorMEM); }
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void idiv(const Operand& op) { opRext(op, 0, 7, T_APX|T_NF|T_CODE1_IF1, 0xF6); }
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void imul(const Operand& op) { opRext(op, 0, 5, T_APX|T_NF|T_CODE1_IF1, 0xF6); }
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void imul(const Reg& reg, const Operand& op) { if (opROO(Reg(), op, reg, T_APX|T_NF, 0xAF)) return; opRO(reg, op, T_0F, 0xAF, reg.getKind() == op.getKind()); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void in_(const Reg& a, const Reg& d) { opInOut(a, d, 0xEC); }
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void in_(const Reg& a, uint8_t v) { opInOut(a, 0xE4, v); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void inc(const Operand& op) { opIncDec(Reg(), op, 0); }
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void inc(const Reg& d, const Operand& op) { opIncDec(d, op, 0); }
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void insertps(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x21, isXMM_XMMorMEM, imm); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void int3() { db(0xCC); }
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void int_(uint8_t x) { db(0xCD); db(x); }
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2020-04-22 20:25:57 +01:00
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void ja(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x77, 0x87, 0x0F); }//-V524
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void ja(const char *label, LabelType type = T_AUTO) { ja(std::string(label), type); }//-V524
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void ja(const void *addr) { opJmpAbs(addr, T_NEAR, 0x77, 0x87, 0x0F); }//-V524
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void ja(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x77, 0x87, 0x0F); }//-V524
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void jae(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x73, 0x83, 0x0F); }//-V524
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void jae(const char *label, LabelType type = T_AUTO) { jae(std::string(label), type); }//-V524
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void jae(const void *addr) { opJmpAbs(addr, T_NEAR, 0x73, 0x83, 0x0F); }//-V524
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void jae(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x73, 0x83, 0x0F); }//-V524
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void jb(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x72, 0x82, 0x0F); }//-V524
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void jb(const char *label, LabelType type = T_AUTO) { jb(std::string(label), type); }//-V524
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void jb(const void *addr) { opJmpAbs(addr, T_NEAR, 0x72, 0x82, 0x0F); }//-V524
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void jb(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x72, 0x82, 0x0F); }//-V524
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void jbe(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x76, 0x86, 0x0F); }//-V524
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void jbe(const char *label, LabelType type = T_AUTO) { jbe(std::string(label), type); }//-V524
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void jbe(const void *addr) { opJmpAbs(addr, T_NEAR, 0x76, 0x86, 0x0F); }//-V524
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void jbe(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x76, 0x86, 0x0F); }//-V524
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void jc(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x72, 0x82, 0x0F); }//-V524
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void jc(const char *label, LabelType type = T_AUTO) { jc(std::string(label), type); }//-V524
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void jc(const void *addr) { opJmpAbs(addr, T_NEAR, 0x72, 0x82, 0x0F); }//-V524
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void jc(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x72, 0x82, 0x0F); }//-V524
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void je(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x74, 0x84, 0x0F); }//-V524
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void je(const char *label, LabelType type = T_AUTO) { je(std::string(label), type); }//-V524
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void je(const void *addr) { opJmpAbs(addr, T_NEAR, 0x74, 0x84, 0x0F); }//-V524
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void je(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x74, 0x84, 0x0F); }//-V524
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void jg(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x7F, 0x8F, 0x0F); }//-V524
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void jg(const char *label, LabelType type = T_AUTO) { jg(std::string(label), type); }//-V524
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void jg(const void *addr) { opJmpAbs(addr, T_NEAR, 0x7F, 0x8F, 0x0F); }//-V524
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void jg(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x7F, 0x8F, 0x0F); }//-V524
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void jge(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x7D, 0x8D, 0x0F); }//-V524
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void jge(const char *label, LabelType type = T_AUTO) { jge(std::string(label), type); }//-V524
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void jge(const void *addr) { opJmpAbs(addr, T_NEAR, 0x7D, 0x8D, 0x0F); }//-V524
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void jge(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x7D, 0x8D, 0x0F); }//-V524
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void jl(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x7C, 0x8C, 0x0F); }//-V524
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void jl(const char *label, LabelType type = T_AUTO) { jl(std::string(label), type); }//-V524
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void jl(const void *addr) { opJmpAbs(addr, T_NEAR, 0x7C, 0x8C, 0x0F); }//-V524
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void jl(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x7C, 0x8C, 0x0F); }//-V524
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void jle(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x7E, 0x8E, 0x0F); }//-V524
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void jle(const char *label, LabelType type = T_AUTO) { jle(std::string(label), type); }//-V524
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void jle(const void *addr) { opJmpAbs(addr, T_NEAR, 0x7E, 0x8E, 0x0F); }//-V524
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void jle(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x7E, 0x8E, 0x0F); }//-V524
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void jna(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x76, 0x86, 0x0F); }//-V524
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void jna(const char *label, LabelType type = T_AUTO) { jna(std::string(label), type); }//-V524
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void jna(const void *addr) { opJmpAbs(addr, T_NEAR, 0x76, 0x86, 0x0F); }//-V524
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void jna(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x76, 0x86, 0x0F); }//-V524
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void jnae(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x72, 0x82, 0x0F); }//-V524
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void jnae(const char *label, LabelType type = T_AUTO) { jnae(std::string(label), type); }//-V524
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void jnae(const void *addr) { opJmpAbs(addr, T_NEAR, 0x72, 0x82, 0x0F); }//-V524
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void jnae(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x72, 0x82, 0x0F); }//-V524
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void jnb(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x73, 0x83, 0x0F); }//-V524
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void jnb(const char *label, LabelType type = T_AUTO) { jnb(std::string(label), type); }//-V524
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void jnb(const void *addr) { opJmpAbs(addr, T_NEAR, 0x73, 0x83, 0x0F); }//-V524
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void jnb(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x73, 0x83, 0x0F); }//-V524
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void jnbe(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x77, 0x87, 0x0F); }//-V524
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void jnbe(const char *label, LabelType type = T_AUTO) { jnbe(std::string(label), type); }//-V524
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void jnbe(const void *addr) { opJmpAbs(addr, T_NEAR, 0x77, 0x87, 0x0F); }//-V524
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void jnbe(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x77, 0x87, 0x0F); }//-V524
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void jnc(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x73, 0x83, 0x0F); }//-V524
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void jnc(const char *label, LabelType type = T_AUTO) { jnc(std::string(label), type); }//-V524
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void jnc(const void *addr) { opJmpAbs(addr, T_NEAR, 0x73, 0x83, 0x0F); }//-V524
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void jnc(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x73, 0x83, 0x0F); }//-V524
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void jne(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x75, 0x85, 0x0F); }//-V524
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void jne(const char *label, LabelType type = T_AUTO) { jne(std::string(label), type); }//-V524
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void jne(const void *addr) { opJmpAbs(addr, T_NEAR, 0x75, 0x85, 0x0F); }//-V524
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void jne(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x75, 0x85, 0x0F); }//-V524
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void jng(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x7E, 0x8E, 0x0F); }//-V524
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void jng(const char *label, LabelType type = T_AUTO) { jng(std::string(label), type); }//-V524
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void jng(const void *addr) { opJmpAbs(addr, T_NEAR, 0x7E, 0x8E, 0x0F); }//-V524
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void jng(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x7E, 0x8E, 0x0F); }//-V524
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void jnge(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x7C, 0x8C, 0x0F); }//-V524
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void jnge(const char *label, LabelType type = T_AUTO) { jnge(std::string(label), type); }//-V524
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void jnge(const void *addr) { opJmpAbs(addr, T_NEAR, 0x7C, 0x8C, 0x0F); }//-V524
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void jnge(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x7C, 0x8C, 0x0F); }//-V524
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void jnl(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x7D, 0x8D, 0x0F); }//-V524
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void jnl(const char *label, LabelType type = T_AUTO) { jnl(std::string(label), type); }//-V524
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void jnl(const void *addr) { opJmpAbs(addr, T_NEAR, 0x7D, 0x8D, 0x0F); }//-V524
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void jnl(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x7D, 0x8D, 0x0F); }//-V524
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void jnle(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x7F, 0x8F, 0x0F); }//-V524
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void jnle(const char *label, LabelType type = T_AUTO) { jnle(std::string(label), type); }//-V524
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void jnle(const void *addr) { opJmpAbs(addr, T_NEAR, 0x7F, 0x8F, 0x0F); }//-V524
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void jnle(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x7F, 0x8F, 0x0F); }//-V524
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void jno(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x71, 0x81, 0x0F); }//-V524
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void jno(const char *label, LabelType type = T_AUTO) { jno(std::string(label), type); }//-V524
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void jno(const void *addr) { opJmpAbs(addr, T_NEAR, 0x71, 0x81, 0x0F); }//-V524
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void jno(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x71, 0x81, 0x0F); }//-V524
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void jnp(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x7B, 0x8B, 0x0F); }//-V524
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void jnp(const char *label, LabelType type = T_AUTO) { jnp(std::string(label), type); }//-V524
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void jnp(const void *addr) { opJmpAbs(addr, T_NEAR, 0x7B, 0x8B, 0x0F); }//-V524
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void jnp(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x7B, 0x8B, 0x0F); }//-V524
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void jns(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x79, 0x89, 0x0F); }//-V524
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void jns(const char *label, LabelType type = T_AUTO) { jns(std::string(label), type); }//-V524
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void jns(const void *addr) { opJmpAbs(addr, T_NEAR, 0x79, 0x89, 0x0F); }//-V524
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void jns(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x79, 0x89, 0x0F); }//-V524
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void jnz(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x75, 0x85, 0x0F); }//-V524
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void jnz(const char *label, LabelType type = T_AUTO) { jnz(std::string(label), type); }//-V524
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void jnz(const void *addr) { opJmpAbs(addr, T_NEAR, 0x75, 0x85, 0x0F); }//-V524
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void jnz(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x75, 0x85, 0x0F); }//-V524
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void jo(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x70, 0x80, 0x0F); }//-V524
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void jo(const char *label, LabelType type = T_AUTO) { jo(std::string(label), type); }//-V524
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void jo(const void *addr) { opJmpAbs(addr, T_NEAR, 0x70, 0x80, 0x0F); }//-V524
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void jo(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x70, 0x80, 0x0F); }//-V524
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void jp(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x7A, 0x8A, 0x0F); }//-V524
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void jp(const char *label, LabelType type = T_AUTO) { jp(std::string(label), type); }//-V524
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void jp(const void *addr) { opJmpAbs(addr, T_NEAR, 0x7A, 0x8A, 0x0F); }//-V524
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void jp(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x7A, 0x8A, 0x0F); }//-V524
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void jpe(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x7A, 0x8A, 0x0F); }//-V524
|
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|
void jpe(const char *label, LabelType type = T_AUTO) { jpe(std::string(label), type); }//-V524
|
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|
|
void jpe(const void *addr) { opJmpAbs(addr, T_NEAR, 0x7A, 0x8A, 0x0F); }//-V524
|
|
|
|
void jpe(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x7A, 0x8A, 0x0F); }//-V524
|
|
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|
void jpo(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x7B, 0x8B, 0x0F); }//-V524
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|
void jpo(const char *label, LabelType type = T_AUTO) { jpo(std::string(label), type); }//-V524
|
|
|
|
void jpo(const void *addr) { opJmpAbs(addr, T_NEAR, 0x7B, 0x8B, 0x0F); }//-V524
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|
void jpo(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x7B, 0x8B, 0x0F); }//-V524
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void js(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x78, 0x88, 0x0F); }//-V524
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|
void js(const char *label, LabelType type = T_AUTO) { js(std::string(label), type); }//-V524
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void js(const void *addr) { opJmpAbs(addr, T_NEAR, 0x78, 0x88, 0x0F); }//-V524
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|
void js(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x78, 0x88, 0x0F); }//-V524
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|
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|
void jz(const Label& label, LabelType type = T_AUTO) { opJmp(label, type, 0x74, 0x84, 0x0F); }//-V524
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|
void jz(const char *label, LabelType type = T_AUTO) { jz(std::string(label), type); }//-V524
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|
|
void jz(const void *addr) { opJmpAbs(addr, T_NEAR, 0x74, 0x84, 0x0F); }//-V524
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|
void jz(std::string label, LabelType type = T_AUTO) { opJmp(label, type, 0x74, 0x84, 0x0F); }//-V524
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|
void lahf() { db(0x9F); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void lddqu(const Xmm& xmm, const Address& addr) { opMR(addr, xmm, T_F2 | T_0F, 0xF0); }
|
|
|
|
void ldmxcsr(const Address& addr) { opMR(addr, Reg32(2), T_0F, 0xAE); }
|
|
|
|
void lea(const Reg& reg, const Address& addr) { if (!reg.isBit(16 | i32e)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) opMR(addr, reg, 0, 0x8D); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void leave() { db(0xC9); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void lfence() { db(0x0F); db(0xAE); db(0xE8); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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|
|
void lfs(const Reg& reg, const Address& addr) { opLoadSeg(addr, reg, T_0F, 0xB4); }
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void lgs(const Reg& reg, const Address& addr) { opLoadSeg(addr, reg, T_0F, 0xB5); }
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2020-04-22 20:25:57 +01:00
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void lock() { db(0xF0); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void lodsb() { db(0xAC); }
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void lodsd() { db(0xAD); }
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void lodsw() { db(0x66); db(0xAD); }
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void loop(const Label& label) { opJmp(label, T_SHORT, 0xE2, 0, 0); }
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void loop(const char *label) { loop(std::string(label)); }
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void loop(std::string label) { opJmp(label, T_SHORT, 0xE2, 0, 0); }
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void loope(const Label& label) { opJmp(label, T_SHORT, 0xE1, 0, 0); }
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void loope(const char *label) { loope(std::string(label)); }
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void loope(std::string label) { opJmp(label, T_SHORT, 0xE1, 0, 0); }
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void loopne(const Label& label) { opJmp(label, T_SHORT, 0xE0, 0, 0); }
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void loopne(const char *label) { loopne(std::string(label)); }
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void loopne(std::string label) { opJmp(label, T_SHORT, 0xE0, 0, 0); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void lss(const Reg& reg, const Address& addr) { opLoadSeg(addr, reg, T_0F, 0xB2); }
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void lzcnt(const Reg®, const Operand& op) { if (opROO(Reg(), op, reg, T_APX|T_NF, 0xF5)) return; opCnt(reg, op, 0xBD); }
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void maskmovdqu(const Xmm& reg1, const Xmm& reg2) { opRR(reg1, reg2, T_66|T_0F, 0xF7); }
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void maskmovq(const Mmx& reg1, const Mmx& reg2) { if (!reg1.isMMX() || !reg2.isMMX()) XBYAK_THROW(ERR_BAD_COMBINATION) opRR(reg1, reg2, T_0F, 0xF7); }
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void maxpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5F, isXMM_XMMorMEM); }
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void maxps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5F, isXMM_XMMorMEM); }
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void maxsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5F, isXMM_XMMorMEM); }
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void maxss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5F, isXMM_XMMorMEM); }
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2020-04-22 20:25:57 +01:00
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void mfence() { db(0x0F); db(0xAE); db(0xF0); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void minpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5D, isXMM_XMMorMEM); }
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void minps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5D, isXMM_XMMorMEM); }
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void minsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5D, isXMM_XMMorMEM); }
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void minss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5D, isXMM_XMMorMEM); }
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2020-04-22 20:25:57 +01:00
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void monitor() { db(0x0F); db(0x01); db(0xC8); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void monitorx() { db(0x0F); db(0x01); db(0xFA); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void movapd(const Address& addr, const Xmm& xmm) { opMR(addr, xmm, T_0F|T_66, 0x29); }
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void movapd(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x28, T_0F, T_66); }
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void movaps(const Address& addr, const Xmm& xmm) { opMR(addr, xmm, T_0F|T_NONE, 0x29); }
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void movaps(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x28, T_0F, T_NONE); }
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void movbe(const Address& addr, const Reg& reg) { opMR(addr, reg, T_0F38, 0xF1, T_APX, 0x61); }
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void movbe(const Reg& reg, const Address& addr) { opMR(addr, reg, T_0F38, 0xF0, T_APX, 0x60); }
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void movd(const Address& addr, const Mmx& mmx) { if (mmx.isXMM()) db(0x66); opMR(addr, mmx, T_0F, 0x7E); }
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void movd(const Mmx& mmx, const Address& addr) { if (mmx.isXMM()) db(0x66); opMR(addr, mmx, T_0F, 0x6E); }
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void movd(const Mmx& mmx, const Reg32& reg) { if (mmx.isXMM()) db(0x66); opRR(mmx, reg, T_0F, 0x6E); }
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void movd(const Reg32& reg, const Mmx& mmx) { if (mmx.isXMM()) db(0x66); opRR(mmx, reg, T_0F, 0x7E); }
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void movddup(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_DUP|T_F2|T_0F|T_EW1|T_YMM|T_EVEX|T_ER_X|T_ER_Y|T_ER_Z, 0x12, isXMM_XMMorMEM, NONE); }
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void movdir64b(const Reg& reg, const Address& addr) { opMR(addr, reg.cvt32(), T_66|T_0F38, 0xF8, T_APX|T_66); }
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void movdiri(const Address& addr, const Reg32e& reg) { opMR(addr, reg, T_0F38, 0xF9, T_APX); }
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void movdq2q(const Mmx& mmx, const Xmm& xmm) { opRR(mmx, xmm, T_F2 | T_0F, 0xD6); }
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void movdqa(const Address& addr, const Xmm& xmm) { opMR(addr, xmm, T_0F|T_66, 0x7F); }
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void movdqa(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x6F, T_0F, T_66); }
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void movdqu(const Address& addr, const Xmm& xmm) { opMR(addr, xmm, T_0F|T_F3, 0x7F); }
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void movdqu(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x6F, T_0F, T_F3); }
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void movhlps(const Xmm& reg1, const Xmm& reg2) { opRR(reg1, reg2, T_0F, 0x12); }
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void movhpd(const Operand& op1, const Operand& op2) { opMovXMM(op1, op2, T_66|T_0F, 0x16); }
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void movhps(const Operand& op1, const Operand& op2) { opMovXMM(op1, op2, T_0F, 0x16); }
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void movlhps(const Xmm& reg1, const Xmm& reg2) { opRR(reg1, reg2, T_0F, 0x16); }
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void movlpd(const Operand& op1, const Operand& op2) { opMovXMM(op1, op2, T_66|T_0F, 0x12); }
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void movlps(const Operand& op1, const Operand& op2) { opMovXMM(op1, op2, T_0F, 0x12); }
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2020-04-22 20:25:57 +01:00
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void movmskpd(const Reg32e& reg, const Xmm& xmm) { db(0x66); movmskps(reg, xmm); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void movmskps(const Reg32e& reg, const Xmm& xmm) { opRR(reg, xmm, T_0F, 0x50); }
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void movntdq(const Address& addr, const Xmm& reg) { opMR(addr, Reg16(reg.getIdx()), T_0F, 0xE7); }
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void movntdqa(const Xmm& xmm, const Address& addr) { opMR(addr, xmm, T_66 | T_0F38, 0x2A); }
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void movnti(const Address& addr, const Reg32e& reg) { opMR(addr, reg, T_0F, 0xC3); }
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void movntpd(const Address& addr, const Xmm& reg) { opMR(addr, Reg16(reg.getIdx()), T_0F, 0x2B); }
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void movntps(const Address& addr, const Xmm& xmm) { opMR(addr, Mmx(xmm.getIdx()), T_0F, 0x2B); }
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void movntq(const Address& addr, const Mmx& mmx) { if (!mmx.isMMX()) XBYAK_THROW(ERR_BAD_COMBINATION) opMR(addr, mmx, T_0F, 0xE7); }
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void movq(const Address& addr, const Mmx& mmx) { if (mmx.isXMM()) db(0x66); opMR(addr, mmx, T_0F, mmx.isXMM() ? 0xD6 : 0x7F); }
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void movq(const Mmx& mmx, const Operand& op) { if (mmx.isXMM()) db(0xF3); opRO(mmx, op, T_0F, mmx.isXMM() ? 0x7E : 0x6F, mmx.getKind() == op.getKind()); }
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void movq2dq(const Xmm& xmm, const Mmx& mmx) { opRR(xmm, mmx, T_F3 | T_0F, 0xD6); }
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2020-04-22 20:25:57 +01:00
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void movsb() { db(0xA4); }
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void movsd() { db(0xA5); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void movsd(const Address& addr, const Xmm& xmm) { opMR(addr, xmm, T_0F|T_F2, 0x11); }
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void movsd(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x10, T_0F, T_F2); }
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void movshdup(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F|T_EW0|T_YMM|T_EVEX, 0x16, isXMM_XMMorMEM, NONE); }
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void movsldup(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_F3|T_0F|T_EW0|T_YMM|T_EVEX, 0x12, isXMM_XMMorMEM, NONE); }
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void movss(const Address& addr, const Xmm& xmm) { opMR(addr, xmm, T_0F|T_F3, 0x11); }
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void movss(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x10, T_0F, T_F3); }
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2020-04-22 20:25:57 +01:00
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void movsw() { db(0x66); db(0xA5); }
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void movsx(const Reg& reg, const Operand& op) { opMovxx(reg, op, 0xBE); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void movupd(const Address& addr, const Xmm& xmm) { opMR(addr, xmm, T_0F|T_66, 0x11); }
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void movupd(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x10, T_0F, T_66); }
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void movups(const Address& addr, const Xmm& xmm) { opMR(addr, xmm, T_0F|T_NONE, 0x11); }
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void movups(const Xmm& xmm, const Operand& op) { opMMX(xmm, op, 0x10, T_0F, T_NONE); }
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2020-04-22 20:25:57 +01:00
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void movzx(const Reg& reg, const Operand& op) { opMovxx(reg, op, 0xB6); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void mpsadbw(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x42, isXMM_XMMorMEM, static_cast<uint8_t>(imm)); }
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void mul(const Operand& op) { opRext(op, 0, 4, T_APX|T_NF|T_CODE1_IF1, 0xF6); }
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void mulpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x59, isXMM_XMMorMEM); }
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void mulps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x59, isXMM_XMMorMEM); }
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void mulsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x59, isXMM_XMMorMEM); }
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void mulss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x59, isXMM_XMMorMEM); }
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void mulx(const Reg32e& r1, const Reg32e& r2, const Operand& op) { opRRO(r1, r2, op, T_APX|T_F2|T_0F38, 0xf6); }
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2020-04-22 20:25:57 +01:00
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void mwait() { db(0x0F); db(0x01); db(0xC9); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void mwaitx() { db(0x0F); db(0x01); db(0xFB); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void neg(const Operand& op) { opRext(op, 0, 3, T_APX|T_NF|T_CODE1_IF1, 0xF6); }
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void neg(const Reg& d, const Operand& op) { opROO(d, op, Reg(3, Operand::REG, d.getBit()), T_APX|T_NF|T_CODE1_IF1|T_ND1, 0xF6); }
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void not_(const Operand& op) { opRext(op, 0, 2, T_APX|T_CODE1_IF1, 0xF6); }
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void not_(const Reg& d, const Operand& op) { opROO(d, op, Reg(2, Operand::REG, d.getBit()), T_APX|T_CODE1_IF1|T_ND1, 0xF6); }
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void or_(const Operand& op, uint32_t imm) { opOI(op, imm, 0x08, 1); }
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void or_(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x08); }
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void or_(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 1); }
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void or_(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x08); }
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void orpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x56, isXMM_XMMorMEM); }
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void orps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x56, isXMM_XMMorMEM); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void out_(const Reg& d, const Reg& a) { opInOut(a, d, 0xEE); }
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void out_(uint8_t v, const Reg& a) { opInOut(a, 0xE6, v); }
|
|
|
|
void outsb() { db(0x6E); }
|
|
|
|
void outsd() { db(0x6F); }
|
|
|
|
void outsw() { db(0x66); db(0x6F); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void pabsb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x1C, T_0F38, T_66); }
|
|
|
|
void pabsd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x1E, T_0F38, T_66); }
|
|
|
|
void pabsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x1D, T_0F38, T_66); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void packssdw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x6B); }
|
|
|
|
void packsswb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x63); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void packusdw(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x2B, isXMM_XMMorMEM); }
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2020-04-22 20:25:57 +01:00
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void packuswb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x67); }
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void paddb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xFC); }
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void paddd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xFE); }
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void paddq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD4); }
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void paddsb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xEC); }
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void paddsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xED); }
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void paddusb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xDC); }
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void paddusw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xDD); }
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void paddw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xFD); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void palignr(const Mmx& mmx, const Operand& op, int imm) { opMMX(mmx, op, 0x0F, T_0F3A, T_66, static_cast<uint8_t>(imm)); }
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2020-04-22 20:25:57 +01:00
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void pand(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xDB); }
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void pandn(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xDF); }
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void pause() { db(0xF3); db(0x90); }
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void pavgb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE0); }
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void pavgw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE3); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void pblendvb(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x10, isXMM_XMMorMEM, NONE); }
|
|
|
|
void pblendw(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0E, isXMM_XMMorMEM, static_cast<uint8_t>(imm)); }
|
|
|
|
void pclmulhqhqdq(const Xmm& xmm, const Operand& op) { pclmulqdq(xmm, op, 0x11); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void pclmulhqlqdq(const Xmm& xmm, const Operand& op) { pclmulqdq(xmm, op, 0x01); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void pclmullqhqdq(const Xmm& xmm, const Operand& op) { pclmulqdq(xmm, op, 0x10); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void pclmullqlqdq(const Xmm& xmm, const Operand& op) { pclmulqdq(xmm, op, 0x00); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void pclmulqdq(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x44, isXMM_XMMorMEM, static_cast<uint8_t>(imm)); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void pcmpeqb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x74); }
|
|
|
|
void pcmpeqd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x76); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void pcmpeqq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x29, isXMM_XMMorMEM); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void pcmpeqw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x75); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void pcmpestri(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0x61, isXMM_XMMorMEM, imm); }
|
|
|
|
void pcmpestrm(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0x60, isXMM_XMMorMEM, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void pcmpgtb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x64); }
|
|
|
|
void pcmpgtd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x66); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void pcmpgtq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x37, isXMM_XMMorMEM); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void pcmpgtw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x65); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void pcmpistri(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0x63, isXMM_XMMorMEM, imm); }
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void pcmpistrm(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A, 0x62, isXMM_XMMorMEM, imm); }
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void pdep(const Reg32e& r1, const Reg32e& r2, const Operand& op) { opRRO(r1, r2, op, T_APX|T_F2|T_0F38, 0xf5); }
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void pext(const Reg32e& r1, const Reg32e& r2, const Operand& op) { opRRO(r1, r2, op, T_APX|T_F3|T_0F38, 0xf5); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void pextrb(const Operand& op, const Xmm& xmm, uint8_t imm) { opExt(op, xmm, 0x14, imm); }
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void pextrd(const Operand& op, const Xmm& xmm, uint8_t imm) { opExt(op, xmm, 0x16, imm); }
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void pextrw(const Operand& op, const Mmx& xmm, uint8_t imm) { opExt(op, xmm, 0x15, imm, true); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void phaddd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x02, T_0F38, T_66); }
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void phaddsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x03, T_0F38, T_66); }
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void phaddw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x01, T_0F38, T_66); }
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void phminposuw(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38, 0x41, isXMM_XMMorMEM, NONE); }
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void phsubd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x06, T_0F38, T_66); }
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void phsubsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x07, T_0F38, T_66); }
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void phsubw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x05, T_0F38, T_66); }
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void pinsrb(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x20, isXMM_REG32orMEM, imm); }
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void pinsrd(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x22, isXMM_REG32orMEM, imm); }
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void pinsrw(const Mmx& mmx, const Operand& op, int imm) { if (!op.isREG(32) && !op.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opSSE(mmx, op, T_0F | (mmx.isXMM() ? T_66 : T_NONE), 0xC4, 0, imm); }
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void pmaddubsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x04, T_0F38, T_66); }
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2020-04-22 20:25:57 +01:00
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void pmaddwd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF5); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void pmaxsb(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3C, isXMM_XMMorMEM); }
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void pmaxsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3D, isXMM_XMMorMEM); }
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2020-04-22 20:25:57 +01:00
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void pmaxsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xEE); }
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void pmaxub(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xDE); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void pmaxud(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3F, isXMM_XMMorMEM); }
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void pmaxuw(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3E, isXMM_XMMorMEM); }
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void pminsb(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x38, isXMM_XMMorMEM); }
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void pminsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x39, isXMM_XMMorMEM); }
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2020-04-22 20:25:57 +01:00
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void pminsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xEA); }
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void pminub(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xDA); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void pminud(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3B, isXMM_XMMorMEM); }
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void pminuw(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x3A, isXMM_XMMorMEM); }
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void pmovmskb(const Reg32e& reg, const Mmx& mmx) { if (mmx.isXMM()) db(0x66); opRR(reg, mmx, T_0F, 0xD7); }
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void pmovsxbd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x21, isXMM_XMMorMEM, NONE); }
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void pmovsxbq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N2|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x22, isXMM_XMMorMEM, NONE); }
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void pmovsxbw(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x20, isXMM_XMMorMEM, NONE); }
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void pmovsxdq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_EW0|T_YMM|T_EVEX, 0x25, isXMM_XMMorMEM, NONE); }
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void pmovsxwd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x23, isXMM_XMMorMEM, NONE); }
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void pmovsxwq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x24, isXMM_XMMorMEM, NONE); }
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void pmovzxbd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x31, isXMM_XMMorMEM, NONE); }
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void pmovzxbq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N2|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x32, isXMM_XMMorMEM, NONE); }
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void pmovzxbw(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x30, isXMM_XMMorMEM, NONE); }
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void pmovzxdq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_EW0|T_YMM|T_EVEX, 0x35, isXMM_XMMorMEM, NONE); }
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void pmovzxwd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x33, isXMM_XMMorMEM, NONE); }
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void pmovzxwq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x34, isXMM_XMMorMEM, NONE); }
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void pmuldq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x28, isXMM_XMMorMEM); }
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void pmulhrsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x0B, T_0F38, T_66); }
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2020-04-22 20:25:57 +01:00
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void pmulhuw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE4); }
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void pmulhw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE5); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void pmulld(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66 | T_0F38, 0x40, isXMM_XMMorMEM); }
|
2020-04-22 20:25:57 +01:00
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|
|
void pmullw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD5); }
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|
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void pmuludq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF4); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void popcnt(const Reg®, const Operand& op) { opCnt(reg, op, 0xB8); }
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2020-04-22 20:25:57 +01:00
|
|
|
void popf() { db(0x9D); }
|
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void por(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xEB); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void prefetchit0(const Address& addr) { opMR(addr, Reg32(7), T_0F, 0x18); }
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void prefetchit1(const Address& addr) { opMR(addr, Reg32(6), T_0F, 0x18); }
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void prefetchnta(const Address& addr) { opMR(addr, Reg32(0), T_0F, 0x18); }
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void prefetcht0(const Address& addr) { opMR(addr, Reg32(1), T_0F, 0x18); }
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void prefetcht1(const Address& addr) { opMR(addr, Reg32(2), T_0F, 0x18); }
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void prefetcht2(const Address& addr) { opMR(addr, Reg32(3), T_0F, 0x18); }
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void prefetchw(const Address& addr) { opMR(addr, Reg32(1), T_0F, 0x0D); }
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void prefetchwt1(const Address& addr) { opMR(addr, Reg32(2), T_0F, 0x0D); }
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2020-04-22 20:25:57 +01:00
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void psadbw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF6); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void pshufb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x00, T_0F38, T_66); }
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void pshufd(const Mmx& mmx, const Operand& op, uint8_t imm8) { opMMX(mmx, op, 0x70, T_0F, T_66, imm8); }
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void pshufhw(const Mmx& mmx, const Operand& op, uint8_t imm8) { opMMX(mmx, op, 0x70, T_0F, T_F3, imm8); }
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void pshuflw(const Mmx& mmx, const Operand& op, uint8_t imm8) { opMMX(mmx, op, 0x70, T_0F, T_F2, imm8); }
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void pshufw(const Mmx& mmx, const Operand& op, uint8_t imm8) { opMMX(mmx, op, 0x70, T_0F, T_NONE, imm8); }
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void psignb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x08, T_0F38, T_66); }
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void psignd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x0A, T_0F38, T_66); }
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void psignw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x09, T_0F38, T_66); }
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2020-04-22 20:25:57 +01:00
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void pslld(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF2); }
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void pslld(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x72, 6); }
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void pslldq(const Xmm& xmm, int imm8) { opMMX_IMM(xmm, imm8, 0x73, 7); }
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void psllq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF3); }
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void psllq(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x73, 6); }
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void psllw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF1); }
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void psllw(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x71, 6); }
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void psrad(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE2); }
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void psrad(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x72, 4); }
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void psraw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE1); }
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void psraw(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x71, 4); }
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void psrld(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD2); }
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void psrld(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x72, 2); }
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void psrldq(const Xmm& xmm, int imm8) { opMMX_IMM(xmm, imm8, 0x73, 3); }
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void psrlq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD3); }
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void psrlq(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x73, 2); }
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void psrlw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD1); }
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void psrlw(const Mmx& mmx, int imm8) { opMMX_IMM(mmx, imm8, 0x71, 2); }
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void psubb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF8); }
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void psubd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xFA); }
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void psubq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xFB); }
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void psubsb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE8); }
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void psubsw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xE9); }
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void psubusb(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD8); }
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void psubusw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xD9); }
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void psubw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xF9); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void ptest(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F38|T_YMM, 0x17, isXMM_XMMorMEM, NONE); }
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2020-04-22 20:25:57 +01:00
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void punpckhbw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x68); }
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void punpckhdq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x6A); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void punpckhqdq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x6D, isXMM_XMMorMEM); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void punpckhwd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x69); }
|
|
|
|
void punpcklbw(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x60); }
|
|
|
|
void punpckldq(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x62); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void punpcklqdq(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x6C, isXMM_XMMorMEM); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void punpcklwd(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0x61); }
|
|
|
|
void pushf() { db(0x9C); }
|
|
|
|
void pxor(const Mmx& mmx, const Operand& op) { opMMX(mmx, op, 0xEF); }
|
|
|
|
void rcl(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 2); }
|
|
|
|
void rcl(const Operand& op, int imm) { opShift(op, imm, 2); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void rcl(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 2, &d); }
|
|
|
|
void rcl(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 2, &d); }
|
|
|
|
void rcpps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x53, isXMM_XMMorMEM); }
|
|
|
|
void rcpss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x53, isXMM_XMMorMEM); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void rcr(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 3); }
|
|
|
|
void rcr(const Operand& op, int imm) { opShift(op, imm, 3); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void rcr(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 3, &d); }
|
|
|
|
void rcr(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 3, &d); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void rdmsr() { db(0x0F); db(0x32); }
|
|
|
|
void rdpmc() { db(0x0F); db(0x33); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void rdrand(const Reg& r) { if (r.isBit(8)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) opRR(Reg(6, Operand::REG, r.getBit()), r, T_0F, 0xC7); }
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void rdseed(const Reg& r) { if (r.isBit(8)) XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) opRR(Reg(7, Operand::REG, r.getBit()), r, T_0F, 0xC7); }
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2020-04-22 20:25:57 +01:00
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void rdtsc() { db(0x0F); db(0x31); }
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void rdtscp() { db(0x0F); db(0x01); db(0xF9); }
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void rep() { db(0xF3); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void repe() { db(0xF3); }
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void repne() { db(0xF2); }
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void repnz() { db(0xF2); }
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void repz() { db(0xF3); }
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2020-04-22 20:25:57 +01:00
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void ret(int imm = 0) { if (imm) { db(0xC2); dw(imm); } else { db(0xC3); } }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void retf(int imm = 0) { if (imm) { db(0xCA); dw(imm); } else { db(0xCB); } }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void rol(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 8); }
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void rol(const Operand& op, int imm) { opShift(op, imm, 8); }
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void rol(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 8, &d); }
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void rol(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 8, &d); }
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void ror(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 9); }
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void ror(const Operand& op, int imm) { opShift(op, imm, 9); }
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void ror(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 9, &d); }
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void ror(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 9, &d); }
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void rorx(const Reg32e& r, const Operand& op, uint8_t imm) { opRRO(r, Reg32e(0, r.getBit()), op, T_0F3A|T_F2|T_APX, 0xF0, imm); }
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void roundpd(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A|T_YMM, 0x09, isXMM_XMMorMEM, imm); }
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void roundps(const Xmm& xmm, const Operand& op, uint8_t imm) { opSSE(xmm, op, T_66|T_0F3A|T_YMM, 0x08, isXMM_XMMorMEM, imm); }
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void roundsd(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0B, isXMM_XMMorMEM, static_cast<uint8_t>(imm)); }
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void roundss(const Xmm& xmm, const Operand& op, int imm) { opSSE(xmm, op, T_66 | T_0F3A, 0x0A, isXMM_XMMorMEM, static_cast<uint8_t>(imm)); }
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void rsqrtps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x52, isXMM_XMMorMEM); }
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void rsqrtss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x52, isXMM_XMMorMEM); }
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2020-04-22 20:25:57 +01:00
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void sahf() { db(0x9E); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void sal(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 12); }
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void sal(const Operand& op, int imm) { opShift(op, imm, 12); }
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void sal(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 12, &d); }
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void sal(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 12, &d); }
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void sar(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 15); }
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void sar(const Operand& op, int imm) { opShift(op, imm, 15); }
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void sar(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 15, &d); }
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void sar(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 15, &d); }
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void sarx(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_APX|T_F3|T_0F38, 0xf7); }
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void sbb(const Operand& op, uint32_t imm) { opOI(op, imm, 0x18, 3); }
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void sbb(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x18); }
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void sbb(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NONE, 3); }
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void sbb(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NONE, 0x18); }
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2020-04-22 20:51:10 +01:00
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void scasb() { db(0xAE); }
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void scasd() { db(0xAF); }
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void scasw() { db(0x66); db(0xAF); }
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2022-12-30 23:05:02 +00:00
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void serialize() { db(0x0F); db(0x01); db(0xE8); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void seta(const Operand& op) { opSetCC(op, 7); }//-V524
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void setae(const Operand& op) { opSetCC(op, 3); }//-V524
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void setb(const Operand& op) { opSetCC(op, 2); }//-V524
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void setbe(const Operand& op) { opSetCC(op, 6); }//-V524
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void setc(const Operand& op) { opSetCC(op, 2); }//-V524
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void sete(const Operand& op) { opSetCC(op, 4); }//-V524
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void setg(const Operand& op) { opSetCC(op, 15); }//-V524
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void setge(const Operand& op) { opSetCC(op, 13); }//-V524
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void setl(const Operand& op) { opSetCC(op, 12); }//-V524
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void setle(const Operand& op) { opSetCC(op, 14); }//-V524
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void setna(const Operand& op) { opSetCC(op, 6); }//-V524
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void setnae(const Operand& op) { opSetCC(op, 2); }//-V524
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void setnb(const Operand& op) { opSetCC(op, 3); }//-V524
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void setnbe(const Operand& op) { opSetCC(op, 7); }//-V524
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void setnc(const Operand& op) { opSetCC(op, 3); }//-V524
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void setne(const Operand& op) { opSetCC(op, 5); }//-V524
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void setng(const Operand& op) { opSetCC(op, 14); }//-V524
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void setnge(const Operand& op) { opSetCC(op, 12); }//-V524
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void setnl(const Operand& op) { opSetCC(op, 13); }//-V524
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void setnle(const Operand& op) { opSetCC(op, 15); }//-V524
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void setno(const Operand& op) { opSetCC(op, 1); }//-V524
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void setnp(const Operand& op) { opSetCC(op, 11); }//-V524
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void setns(const Operand& op) { opSetCC(op, 9); }//-V524
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void setnz(const Operand& op) { opSetCC(op, 5); }//-V524
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void seto(const Operand& op) { opSetCC(op, 0); }//-V524
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void setp(const Operand& op) { opSetCC(op, 10); }//-V524
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void setpe(const Operand& op) { opSetCC(op, 10); }//-V524
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void setpo(const Operand& op) { opSetCC(op, 11); }//-V524
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void sets(const Operand& op) { opSetCC(op, 8); }//-V524
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void setz(const Operand& op) { opSetCC(op, 4); }//-V524
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2020-04-22 20:25:57 +01:00
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void sfence() { db(0x0F); db(0xAE); db(0xF8); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void sha1msg1(const Xmm& x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xC9, T_MUST_EVEX, 0xD9); }
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void sha1msg2(const Xmm& x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xCA, T_MUST_EVEX, 0xDA); }
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void sha1nexte(const Xmm& x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xC8, T_MUST_EVEX, 0xD8); }
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void sha1rnds4(const Xmm& x, const Operand& op, uint8_t imm) { opSSE_APX(x, op, T_0F3A, 0xCC, T_MUST_EVEX, 0xD4, imm); }
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void sha256msg1(const Xmm& x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xCC, T_MUST_EVEX, 0xDC); }
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void sha256msg2(const Xmm& x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xCD, T_MUST_EVEX, 0xDD); }
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void sha256rnds2(const Xmm& x, const Operand& op) { opSSE_APX(x, op, T_0F38, 0xCB, T_MUST_EVEX, 0xDB); }
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void shl(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 12); }
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void shl(const Operand& op, int imm) { opShift(op, imm, 12); }
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void shl(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 12, &d); }
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void shl(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 12, &d); }
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void shld(const Operand& op, const Reg& reg, const Reg8& _cl) { opShxd(Reg(), op, reg, 0, 0xA4, 0x24, &_cl); }
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void shld(const Operand& op, const Reg& reg, uint8_t imm) { opShxd(Reg(), op, reg, imm, 0xA4, 0x24); }
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void shld(const Reg& d, const Operand& op, const Reg& reg, const Reg8& _cl) { opShxd(d, op, reg, 0, 0xA4, 0x24, &_cl); }
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void shld(const Reg& d, const Operand& op, const Reg& reg, uint8_t imm) { opShxd(d, op, reg, imm, 0xA4, 0x24); }
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void shlx(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_APX|T_66|T_0F38, 0xf7); }
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void shr(const Operand& op, const Reg8& _cl) { opShift(op, _cl, 13); }
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void shr(const Operand& op, int imm) { opShift(op, imm, 13); }
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void shr(const Reg& d, const Operand& op, const Reg8& _cl) { opShift(op, _cl, 13, &d); }
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void shr(const Reg& d, const Operand& op, int imm) { opShift(op, imm, 13, &d); }
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void shrd(const Operand& op, const Reg& reg, const Reg8& _cl) { opShxd(Reg(), op, reg, 0, 0xAC, 0x2C, &_cl); }
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void shrd(const Operand& op, const Reg& reg, uint8_t imm) { opShxd(Reg(), op, reg, imm, 0xAC, 0x2C); }
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void shrd(const Reg& d, const Operand& op, const Reg& reg, const Reg8& _cl) { opShxd(d, op, reg, 0, 0xAC, 0x2C, &_cl); }
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void shrd(const Reg& d, const Operand& op, const Reg& reg, uint8_t imm) { opShxd(d, op, reg, imm, 0xAC, 0x2C); }
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void shrx(const Reg32e& r1, const Operand& op, const Reg32e& r2) { opRRO(r1, r2, op, T_APX|T_F2|T_0F38, 0xf7); }
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void shufpd(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F | T_66, 0xC6, isXMM_XMMorMEM, imm8); }
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void shufps(const Xmm& xmm, const Operand& op, uint8_t imm8) { opSSE(xmm, op, T_0F, 0xC6, isXMM_XMMorMEM, imm8); }
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void sqrtpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x51, isXMM_XMMorMEM); }
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void sqrtps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x51, isXMM_XMMorMEM); }
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void sqrtsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x51, isXMM_XMMorMEM); }
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void sqrtss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x51, isXMM_XMMorMEM); }
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2020-04-22 20:25:57 +01:00
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void stac() { db(0x0F); db(0x01); db(0xCB); }
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void stc() { db(0xF9); }
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void std() { db(0xFD); }
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void sti() { db(0xFB); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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|
|
void stmxcsr(const Address& addr) { opMR(addr, Reg32(3), T_0F, 0xAE); }
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2020-04-22 20:51:10 +01:00
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void stosb() { db(0xAA); }
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void stosd() { db(0xAB); }
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void stosw() { db(0x66); db(0xAB); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void sub(const Operand& op, uint32_t imm) { opOI(op, imm, 0x28, 5); }
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void sub(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x28); }
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void sub(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 5); }
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void sub(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x28); }
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void subpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x5C, isXMM_XMMorMEM); }
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void subps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x5C, isXMM_XMMorMEM); }
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void subsd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F2, 0x5C, isXMM_XMMorMEM); }
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void subss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_F3, 0x5C, isXMM_XMMorMEM); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void sysenter() { db(0x0F); db(0x34); }
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void sysexit() { db(0x0F); db(0x35); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void tpause(const Reg32& r) { int idx = r.getIdx(); if (idx > 7) XBYAK_THROW(ERR_BAD_PARAMETER) db(0x66); db(0x0F); db(0xAE); setModRM(3, 6, idx); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void tzcnt(const Reg®, const Operand& op) { if (opROO(Reg(), op, reg, T_APX|T_NF, 0xF4)) return; opCnt(reg, op, 0xBC); }
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void ucomisd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_66|T_0F, 0x2E, isXMM_XMMorMEM); }
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void ucomiss(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x2E, isXMM_XMMorMEM); }
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2020-04-22 20:25:57 +01:00
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void ud2() { db(0x0F); db(0x0B); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void umonitor(const Reg& r) { int idx = r.getIdx(); if (idx > 7) XBYAK_THROW(ERR_BAD_PARAMETER) int bit = r.getBit(); if (BIT != bit) { if ((BIT == 32 && bit == 16) || (BIT == 64 && bit == 32)) { db(0x67); } else { XBYAK_THROW(ERR_BAD_SIZE_OF_REGISTER) } } db(0xF3); db(0x0F); db(0xAE); setModRM(3, 6, idx); }
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void umwait(const Reg32& r) { int idx = r.getIdx(); if (idx > 7) XBYAK_THROW(ERR_BAD_PARAMETER) db(0xF2); db(0x0F); db(0xAE); setModRM(3, 6, idx); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void unpckhpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x15, isXMM_XMMorMEM); }
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void unpckhps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x15, isXMM_XMMorMEM); }
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void unpcklpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x14, isXMM_XMMorMEM); }
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void unpcklps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x14, isXMM_XMMorMEM); }
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2020-04-22 20:25:57 +01:00
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void vaddpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x58); }
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void vaddps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_EW0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x58); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vaddsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x58); }
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void vaddss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_EW0 | T_EVEX | T_ER_X | T_N4, 0x58); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vaddsubpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F|T_YMM, 0xD0); }
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void vaddsubps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_F2|T_0F|T_YMM, 0xD0); }
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void vaesdec(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F38|T_YMM|T_EVEX, 0xDE); }
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void vaesdeclast(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F38|T_YMM|T_EVEX, 0xDF); }
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void vaesenc(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F38|T_YMM|T_EVEX, 0xDC); }
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void vaesenclast(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F38|T_YMM|T_EVEX, 0xDD); }
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void vaesimc(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_W0, 0xDB); }
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void vaeskeygenassist(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0xDF, imm); }
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2020-04-22 20:25:57 +01:00
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void vandnpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x55); }
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void vandnps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_EW0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x55); }
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void vandpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x54); }
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void vandps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_EW0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x54); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vbcstnebf162ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_F3|T_0F38|T_W0|T_YMM|T_B16, 0xB1); }
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void vbcstnesh2ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_66|T_0F38|T_W0|T_YMM|T_B16, 0xB1); }
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void vblendpd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x0D, imm); }
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void vblendps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x0C, imm); }
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2020-04-22 20:25:57 +01:00
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void vblendvpd(const Xmm& x1, const Xmm& x2, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x2, op, T_0F3A | T_66 | T_YMM, 0x4B, x4.getIdx() << 4); }
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void vblendvps(const Xmm& x1, const Xmm& x2, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x2, op, T_0F3A | T_66 | T_YMM, 0x4A, x4.getIdx() << 4); }
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void vbroadcastf128(const Ymm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x1A); }
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void vbroadcasti128(const Ymm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x5A); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vbroadcastsd(const Ymm& y, const Operand& op) { if (!op.isMEM() && !(y.isYMM() && op.isXMM()) && !(y.isZMM() && op.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(y, op, T_0F38 | T_66 | T_W0 | T_YMM | T_EVEX | T_EW1 | T_N8, 0x19); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vbroadcastss(const Xmm& x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x18); }
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2020-04-22 20:25:57 +01:00
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void vcmpeq_ospd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 16); }
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void vcmpeq_osps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 16); }
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void vcmpeq_ossd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 16); }
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void vcmpeq_osss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 16); }
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void vcmpeq_uqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 8); }
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void vcmpeq_uqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 8); }
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void vcmpeq_uqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 8); }
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void vcmpeq_uqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 8); }
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void vcmpeq_uspd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 24); }
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void vcmpeq_usps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 24); }
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void vcmpeq_ussd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 24); }
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void vcmpeq_usss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 24); }
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void vcmpeqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 0); }
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void vcmpeqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 0); }
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void vcmpeqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 0); }
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void vcmpeqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 0); }
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void vcmpfalse_ospd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 27); }
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void vcmpfalse_osps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 27); }
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void vcmpfalse_ossd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 27); }
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void vcmpfalse_osss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 27); }
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void vcmpfalsepd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 11); }
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void vcmpfalseps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 11); }
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void vcmpfalsesd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 11); }
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void vcmpfalsess(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 11); }
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void vcmpge_oqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 29); }
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void vcmpge_oqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 29); }
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void vcmpge_oqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 29); }
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void vcmpge_oqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 29); }
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void vcmpgepd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 13); }
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void vcmpgeps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 13); }
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void vcmpgesd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 13); }
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void vcmpgess(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 13); }
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void vcmpgt_oqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 30); }
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void vcmpgt_oqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 30); }
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void vcmpgt_oqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 30); }
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void vcmpgt_oqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 30); }
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void vcmpgtpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 14); }
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void vcmpgtps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 14); }
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void vcmpgtsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 14); }
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void vcmpgtss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 14); }
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void vcmple_oqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 18); }
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void vcmple_oqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 18); }
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void vcmple_oqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 18); }
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void vcmple_oqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 18); }
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void vcmplepd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 2); }
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void vcmpleps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 2); }
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void vcmplesd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 2); }
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void vcmpless(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 2); }
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void vcmplt_oqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 17); }
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void vcmplt_oqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 17); }
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void vcmplt_oqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 17); }
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void vcmplt_oqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 17); }
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void vcmpltpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 1); }
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void vcmpltps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 1); }
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void vcmpltsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 1); }
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void vcmpltss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 1); }
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void vcmpneq_oqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 12); }
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void vcmpneq_oqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 12); }
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void vcmpneq_oqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 12); }
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void vcmpneq_oqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 12); }
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void vcmpneq_ospd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 28); }
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void vcmpneq_osps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 28); }
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void vcmpneq_ossd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 28); }
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void vcmpneq_osss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 28); }
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void vcmpneq_uspd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 20); }
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void vcmpneq_usps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 20); }
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void vcmpneq_ussd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 20); }
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void vcmpneq_usss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 20); }
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void vcmpneqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 4); }
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void vcmpneqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 4); }
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void vcmpneqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 4); }
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void vcmpneqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 4); }
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void vcmpnge_uqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 25); }
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void vcmpnge_uqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 25); }
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void vcmpnge_uqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 25); }
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void vcmpnge_uqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 25); }
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void vcmpngepd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 9); }
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void vcmpngeps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 9); }
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void vcmpngesd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 9); }
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void vcmpngess(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 9); }
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void vcmpngt_uqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 26); }
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void vcmpngt_uqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 26); }
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void vcmpngt_uqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 26); }
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void vcmpngt_uqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 26); }
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void vcmpngtpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 10); }
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void vcmpngtps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 10); }
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void vcmpngtsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 10); }
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void vcmpngtss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 10); }
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void vcmpnle_uqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 22); }
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void vcmpnle_uqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 22); }
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void vcmpnle_uqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 22); }
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void vcmpnle_uqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 22); }
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void vcmpnlepd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 6); }
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void vcmpnleps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 6); }
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void vcmpnlesd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 6); }
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void vcmpnless(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 6); }
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void vcmpnlt_uqpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 21); }
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void vcmpnlt_uqps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 21); }
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void vcmpnlt_uqsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 21); }
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void vcmpnlt_uqss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 21); }
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void vcmpnltpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 5); }
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void vcmpnltps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 5); }
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void vcmpnltsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 5); }
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void vcmpnltss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 5); }
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void vcmpord_spd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 23); }
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void vcmpord_sps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 23); }
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void vcmpord_ssd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 23); }
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void vcmpord_sss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 23); }
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void vcmpordpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 7); }
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void vcmpordps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 7); }
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void vcmpordsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 7); }
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void vcmpordss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 7); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vcmppd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xC2, imm); }
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void vcmpps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_0F|T_YMM, 0xC2, imm); }
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void vcmpsd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F, 0xC2, imm); }
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void vcmpss(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F, 0xC2, imm); }
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2020-04-22 20:25:57 +01:00
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void vcmptrue_uspd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 31); }
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void vcmptrue_usps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 31); }
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void vcmptrue_ussd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 31); }
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void vcmptrue_usss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 31); }
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void vcmptruepd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 15); }
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void vcmptrueps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 15); }
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void vcmptruesd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 15); }
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void vcmptruess(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 15); }
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void vcmpunord_spd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 19); }
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void vcmpunord_sps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 19); }
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void vcmpunord_ssd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 19); }
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void vcmpunord_sss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 19); }
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void vcmpunordpd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmppd(x1, x2, op, 3); }
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void vcmpunordps(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpps(x1, x2, op, 3); }
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void vcmpunordsd(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpsd(x1, x2, op, 3); }
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void vcmpunordss(const Xmm& x1, const Xmm& x2, const Operand& op) { vcmpss(x1, x2, op, 3); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vcomisd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_66|T_0F|T_EW1|T_EVEX|T_SAE_X, 0x2F); }
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void vcomiss(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_0F|T_EW0|T_EVEX|T_SAE_X, 0x2F); }
|
2020-04-22 20:25:57 +01:00
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|
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void vcvtdq2pd(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_0F | T_F3 | T_YMM | T_EVEX | T_EW0 | T_B32 | T_N8 | T_N_VL, 0xE6); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
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void vcvtdq2ps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_EW0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x5B); }
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void vcvtneebf162ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_F3|T_0F38|T_W0|T_YMM, 0xB0); }
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void vcvtneeph2ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_66|T_0F38|T_W0|T_YMM, 0xB0); }
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void vcvtneobf162ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_F2|T_0F38|T_W0|T_YMM, 0xB0); }
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void vcvtneoph2ps(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_0F38|T_W0|T_YMM, 0xB0); }
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void vcvtneps2bf16(const Xmm& x, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opCvt2(x, op, T_F3|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_B32|orEvexIf(encoding), 0x72); }
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2020-04-22 20:25:57 +01:00
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void vcvtpd2dq(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F | T_F2 | T_YMM | T_EVEX | T_EW1 | T_B64 | T_ER_Z, 0xE6); }
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void vcvtpd2ps(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F | T_66 | T_YMM | T_EVEX | T_EW1 | T_B64 | T_ER_Z, 0x5A); }
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void vcvtph2ps(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_0F38 | T_66 | T_W0 | T_EVEX | T_EW0 | T_N8 | T_N_VL | T_SAE_Y, 0x13); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vcvtps2dq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_EW0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x5B); }
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2020-04-22 20:25:57 +01:00
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void vcvtps2pd(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_0F | T_YMM | T_EVEX | T_EW0 | T_B32 | T_N8 | T_N_VL | T_SAE_Y, 0x5A); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vcvtps2ph(const Operand& op, const Xmm& x, uint8_t imm) { checkCvt1(x, op); opVex(x, 0, op, T_0F3A | T_66 | T_W0 | T_EVEX | T_EW0 | T_N8 | T_N_VL | T_SAE_Y | T_M_K, 0x1D, imm); }
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2020-04-22 20:25:57 +01:00
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void vcvtsd2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F2 | T_W0 | T_EVEX | T_EW0 | T_N4 | T_ER_X, 0x2D); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vcvtsd2ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_F2|T_0F|T_EW1|T_EVEX|T_ER_X, 0x5A); }
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2020-04-22 20:25:57 +01:00
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void vcvtsi2sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt3(x1, x2, op, T_0F | T_F2 | T_EVEX, T_W1 | T_EW1 | T_ER_X | T_N8, T_W0 | T_EW0 | T_N4, 0x2A); }
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void vcvtsi2ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt3(x1, x2, op, T_0F | T_F3 | T_EVEX | T_ER_X, T_W1 | T_EW1 | T_N8, T_W0 | T_EW0 | T_N4, 0x2A); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vcvtss2sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_F3|T_0F|T_EW0|T_EVEX|T_SAE_X, 0x5A); }
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2020-04-22 20:25:57 +01:00
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void vcvtss2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F3 | T_W0 | T_EVEX | T_EW0 | T_ER_X | T_N8, 0x2D); }
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void vcvttpd2dq(const Xmm& x, const Operand& op) { opCvt2(x, op, T_66 | T_0F | T_YMM | T_EVEX |T_EW1 | T_B64 | T_ER_Z, 0xE6); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vcvttps2dq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_EW0|T_YMM|T_EVEX|T_SAE_Z|T_B32, 0x5B); }
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2020-04-22 20:25:57 +01:00
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void vcvttsd2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F2 | T_W0 | T_EVEX | T_EW0 | T_N4 | T_SAE_X, 0x2C); }
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void vcvttss2si(const Reg32& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F3 | T_W0 | T_EVEX | T_EW0 | T_SAE_X | T_N8, 0x2C); }
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void vdivpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x5E); }
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void vdivps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_EW0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x5E); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vdivsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x5E); }
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void vdivss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_EW0 | T_EVEX | T_ER_X | T_N4, 0x5E); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vdppd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0, 0x41, imm); }
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void vdpps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x40, imm); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vextractf128(const Operand& op, const Ymm& y, uint8_t imm) { if (!(op.isXMEM() && y.isYMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y, 0, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x19, imm); }
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void vextracti128(const Operand& op, const Ymm& y, uint8_t imm) { if (!(op.isXMEM() && y.isYMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y, 0, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x39, imm); }
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void vextractps(const Operand& op, const Xmm& x, uint8_t imm) { if (!((op.isREG(32) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x, 0, op, T_0F3A | T_66 | T_W0 | T_EVEX | T_N4, 0x17, imm); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vfmadd132pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x98); }
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void vfmadd132ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0x98); }
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void vfmadd132sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0x99); }
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void vfmadd132ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EW0|T_EVEX|T_ER_X, 0x99); }
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void vfmadd213pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0xA8); }
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void vfmadd213ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0xA8); }
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void vfmadd213sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xA9); }
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void vfmadd213ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EW0|T_EVEX|T_ER_X, 0xA9); }
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void vfmadd231pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0xB8); }
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void vfmadd231ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0xB8); }
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void vfmadd231sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xB9); }
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void vfmadd231ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EW0|T_EVEX|T_ER_X, 0xB9); }
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void vfmaddsub132pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x96); }
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void vfmaddsub132ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0x96); }
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void vfmaddsub213pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0xA6); }
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void vfmaddsub213ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0xA6); }
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void vfmaddsub231pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0xB6); }
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void vfmaddsub231ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0xB6); }
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void vfmsub132pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x9A); }
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void vfmsub132ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0x9A); }
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void vfmsub132sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0x9B); }
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void vfmsub132ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EW0|T_EVEX|T_ER_X, 0x9B); }
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void vfmsub213pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0xAA); }
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void vfmsub213ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0xAA); }
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void vfmsub213sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xAB); }
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void vfmsub213ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EW0|T_EVEX|T_ER_X, 0xAB); }
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void vfmsub231pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0xBA); }
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void vfmsub231ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0xBA); }
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void vfmsub231sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xBB); }
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void vfmsub231ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EW0|T_EVEX|T_ER_X, 0xBB); }
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void vfmsubadd132pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x97); }
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void vfmsubadd132ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0x97); }
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void vfmsubadd213pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0xA7); }
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void vfmsubadd213ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0xA7); }
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void vfmsubadd231pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0xB7); }
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void vfmsubadd231ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0xB7); }
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void vfnmadd132pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x9C); }
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void vfnmadd132ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0x9C); }
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void vfnmadd132sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0x9D); }
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void vfnmadd132ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EW0|T_EVEX|T_ER_X, 0x9D); }
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void vfnmadd213pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0xAC); }
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void vfnmadd213ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0xAC); }
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void vfnmadd213sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xAD); }
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void vfnmadd213ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EW0|T_EVEX|T_ER_X, 0xAD); }
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void vfnmadd231pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0xBC); }
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void vfnmadd231ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0xBC); }
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void vfnmadd231sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xBD); }
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void vfnmadd231ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EW0|T_EVEX|T_ER_X, 0xBD); }
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void vfnmsub132pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x9E); }
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void vfnmsub132ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0x9E); }
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void vfnmsub132sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0x9F); }
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void vfnmsub132ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EW0|T_EVEX|T_ER_X, 0x9F); }
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void vfnmsub213pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0xAE); }
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void vfnmsub213ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0xAE); }
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void vfnmsub213sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xAF); }
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void vfnmsub213ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EW0|T_EVEX|T_ER_X, 0xAF); }
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void vfnmsub231pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0xBE); }
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void vfnmsub231ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0xBE); }
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void vfnmsub231sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_W1|T_EW1|T_EVEX|T_ER_X, 0xBF); }
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void vfnmsub231ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_W0|T_EW0|T_EVEX|T_ER_X, 0xBF); }
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2020-04-22 20:51:10 +01:00
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void vgatherdpd(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W1, 0x92, 0); }
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void vgatherdps(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W0, 0x92, 1); }
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void vgatherqpd(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W1, 0x93, 1); }
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void vgatherqps(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W0, 0x93, 2); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vgf2p8affineinvqb(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W1|T_EW1|T_YMM|T_EVEX|T_SAE_Z|T_B64, 0xCF, imm); }
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void vgf2p8affineqb(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W1|T_EW1|T_YMM|T_EVEX|T_SAE_Z|T_B64, 0xCE, imm); }
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void vgf2p8mulb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_SAE_Z, 0xCF); }
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void vhaddpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F|T_YMM, 0x7C); }
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void vhaddps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_F2|T_0F|T_YMM, 0x7C); }
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void vhsubpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_66|T_0F|T_YMM, 0x7D); }
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void vhsubps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_F2|T_0F|T_YMM, 0x7D); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vinsertf128(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { if (!(y1.isYMM() && y2.isYMM() && op.isXMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y1, &y2, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x18, imm); }
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void vinserti128(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { if (!(y1.isYMM() && y2.isYMM() && op.isXMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y1, &y2, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x38, imm); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vinsertps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_W0|T_EW0|T_EVEX, 0x21, imm); }
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2020-04-22 20:25:57 +01:00
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void vlddqu(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, cvtIdx0(x), addr, T_0F | T_F2 | T_W0 | T_YMM, 0xF0); }
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void vldmxcsr(const Address& addr) { opAVX_X_X_XM(xm2, xm0, addr, T_0F, 0xAE); }
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void vmaskmovdqu(const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x1, xm0, x2, T_0F | T_66, 0xF7); }
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void vmaskmovpd(const Address& addr, const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x2, x1, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x2F); }
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void vmaskmovpd(const Xmm& x1, const Xmm& x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x2D); }
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void vmaskmovps(const Address& addr, const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x2, x1, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x2E); }
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void vmaskmovps(const Xmm& x1, const Xmm& x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x2C); }
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void vmaxpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x5F); }
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void vmaxps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_EW0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x5F); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vmaxsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x5F); }
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void vmaxss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_EW0 | T_EVEX | T_ER_X | T_N4, 0x5F); }
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2020-04-22 20:25:57 +01:00
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void vminpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x5D); }
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void vminps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_EW0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x5D); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vminsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x5D); }
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void vminss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_EW0 | T_EVEX | T_ER_X | T_N4, 0x5D); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vmovapd(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_M_K, 0x29); }
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void vmovapd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX, 0x28); }
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void vmovaps(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, T_0F|T_EW0|T_YMM|T_EVEX|T_M_K, 0x29); }
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void vmovaps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_EW0|T_YMM|T_EVEX, 0x28); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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|
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void vmovd(const Operand& op, const Xmm& x) { if (!op.isREG(32) && !op.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, xm0, op, T_0F | T_66 | T_W0 | T_EVEX | T_N4, 0x7E); }
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void vmovd(const Xmm& x, const Operand& op) { if (!op.isREG(32) && !op.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, xm0, op, T_0F | T_66 | T_W0 | T_EVEX | T_N4, 0x6E); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vmovddup(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_DUP|T_F2|T_0F|T_EW1|T_YMM|T_EVEX|T_ER_X|T_ER_Y|T_ER_Z, 0x12); }
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void vmovdqa(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, T_66|T_0F|T_YMM, 0x7F); }
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void vmovdqa(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_YMM, 0x6F); }
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void vmovdqu(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, T_F3|T_0F|T_YMM, 0x7F); }
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void vmovdqu(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_YMM, 0x6F); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vmovhlps(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x1, x2, op, T_0F | T_EVEX | T_EW0, 0x12); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vmovhpd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_66|T_0F|T_EW1|T_EVEX, 0x17); }
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void vmovhpd(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, op1, op2, T_N8|T_66|T_0F|T_EW1|T_EVEX, 0x16); }
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void vmovhps(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_0F|T_EW0|T_EVEX, 0x17); }
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void vmovhps(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, op1, op2, T_N8|T_0F|T_EW0|T_EVEX, 0x16); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vmovlhps(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x1, x2, op, T_0F | T_EVEX | T_EW0, 0x16); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vmovlpd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_66|T_0F|T_EW1|T_EVEX, 0x13); }
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void vmovlpd(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, op1, op2, T_N8|T_66|T_0F|T_EW1|T_EVEX, 0x12); }
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void vmovlps(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_0F|T_EW0|T_EVEX, 0x13); }
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void vmovlps(const Xmm& x, const Operand& op1, const Operand& op2 = Operand()) { if (!op2.isNone() && !op2.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, op1, op2, T_N8|T_0F|T_EW0|T_EVEX, 0x12); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vmovmskpd(const Reg& r, const Xmm& x) { if (!r.isBit(i32e)) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x.isXMM() ? Xmm(r.getIdx()) : Ymm(r.getIdx()), cvtIdx0(x), x, T_0F | T_66 | T_W0 | T_YMM, 0x50); }
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void vmovmskps(const Reg& r, const Xmm& x) { if (!r.isBit(i32e)) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x.isXMM() ? Xmm(r.getIdx()) : Ymm(r.getIdx()), cvtIdx0(x), x, T_0F | T_W0 | T_YMM, 0x50); }
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2020-04-22 20:25:57 +01:00
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void vmovntdq(const Address& addr, const Xmm& x) { opVex(x, 0, addr, T_0F | T_66 | T_YMM | T_EVEX | T_EW0, 0xE7); }
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void vmovntdqa(const Xmm& x, const Address& addr) { opVex(x, 0, addr, T_0F38 | T_66 | T_YMM | T_EVEX | T_EW0, 0x2A); }
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void vmovntpd(const Address& addr, const Xmm& x) { opVex(x, 0, addr, T_0F | T_66 | T_YMM | T_EVEX | T_EW1, 0x2B); }
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void vmovntps(const Address& addr, const Xmm& x) { opVex(x, 0, addr, T_0F | T_YMM | T_EVEX | T_EW0, 0x2B); }
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void vmovq(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_0F | T_66 | T_EVEX | T_EW1 | T_N8, x.getIdx() < 16 ? 0xD6 : 0x7E); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vmovq(const Xmm& x, const Address& addr) { uint64_t type; uint8_t code; if (x.getIdx() < 16) { type = T_0F | T_F3; code = 0x7E; } else { type = T_0F | T_66 | T_EVEX | T_EW1 | T_N8; code = 0x6E; } opAVX_X_X_XM(x, xm0, addr, type, code); }
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2020-04-22 20:25:57 +01:00
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void vmovq(const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x1, xm0, x2, T_0F | T_F3 | T_EVEX | T_EW1 | T_N8, 0x7E); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vmovsd(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_F2|T_0F|T_EW1|T_EVEX | T_M_K, 0x11); }
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void vmovsd(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, T_N8|T_F2|T_0F|T_EW1|T_EVEX, 0x10); }
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void vmovsd(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x1, x2, op, T_N8|T_F2|T_0F|T_EW1|T_EVEX, 0x10); }
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void vmovshdup(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_EW0|T_YMM|T_EVEX, 0x16); }
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void vmovsldup(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_EW0|T_YMM|T_EVEX, 0x12); }
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void vmovss(const Address& addr, const Xmm& x) { opAVX_X_X_XM(x, xm0, addr, T_N4|T_F3|T_0F|T_EW0|T_EVEX | T_M_K, 0x11); }
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void vmovss(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, T_N4|T_F3|T_0F|T_EW0|T_EVEX, 0x10); }
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void vmovss(const Xmm& x1, const Xmm& x2, const Operand& op = Operand()) { if (!op.isNone() && !op.isXMM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x1, x2, op, T_N4|T_F3|T_0F|T_EW0|T_EVEX, 0x10); }
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void vmovupd(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_M_K, 0x11); }
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void vmovupd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX, 0x10); }
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void vmovups(const Address& addr, const Xmm& xmm) { opAVX_X_XM_IMM(xmm, addr, T_0F|T_EW0|T_YMM|T_EVEX|T_M_K, 0x11); }
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void vmovups(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_EW0|T_YMM|T_EVEX, 0x10); }
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void vmpsadbw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x42, imm); }
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2020-04-22 20:25:57 +01:00
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void vmulpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x59); }
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void vmulps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_EW0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x59); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vmulsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x59); }
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void vmulss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_EW0 | T_EVEX | T_ER_X | T_N4, 0x59); }
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2020-04-22 20:25:57 +01:00
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void vorpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x56); }
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void vorps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_EW0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x56); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vpabsb(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM|T_EVEX, 0x1C); }
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void vpabsd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_EW0|T_YMM|T_EVEX|T_B32, 0x1E); }
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void vpabsw(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM|T_EVEX, 0x1D); }
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void vpackssdw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW0|T_YMM|T_EVEX|T_B32, 0x6B); }
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void vpacksswb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x63); }
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void vpackusdw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_EVEX|T_B32, 0x2B); }
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void vpackuswb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x67); }
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void vpaddb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xFC); }
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void vpaddd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW0|T_YMM|T_EVEX|T_B32, 0xFE); }
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void vpaddq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0xD4); }
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void vpaddsb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xEC); }
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void vpaddsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xED); }
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void vpaddusb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xDC); }
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void vpaddusw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xDD); }
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void vpaddw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xFD); }
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void vpalignr(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_YMM|T_EVEX, 0x0F, imm); }
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void vpand(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xDB); }
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void vpandn(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xDF); }
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void vpavgb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE0); }
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void vpavgw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE3); }
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void vpblendd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x02, imm); }
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2020-04-22 20:25:57 +01:00
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void vpblendvb(const Xmm& x1, const Xmm& x2, const Operand& op, const Xmm& x4) { opAVX_X_X_XM(x1, x2, op, T_0F3A | T_66 | T_YMM, 0x4C, x4.getIdx() << 4); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vpblendw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM, 0x0E, imm); }
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void vpbroadcastb(const Xmm& x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N1|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x78); }
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void vpbroadcastd(const Xmm& x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x58); }
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void vpbroadcastq(const Xmm& x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_W0|T_EW1|T_YMM|T_EVEX, 0x59); }
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void vpbroadcastw(const Xmm& x, const Operand& op) { if (!(op.isXMM() || op.isMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_XM_IMM(x, op, T_N2|T_66|T_0F38|T_W0|T_YMM|T_EVEX, 0x79); }
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void vpclmulhqhqdq(const Xmm& x1, const Xmm& x2, const Operand& op) { vpclmulqdq(x1, x2, op, 0x11); }
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void vpclmulhqlqdq(const Xmm& x1, const Xmm& x2, const Operand& op) { vpclmulqdq(x1, x2, op, 0x01); }
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void vpclmullqhqdq(const Xmm& x1, const Xmm& x2, const Operand& op) { vpclmulqdq(x1, x2, op, 0x10); }
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void vpclmullqlqdq(const Xmm& x1, const Xmm& x2, const Operand& op) { vpclmulqdq(x1, x2, op, 0x00); }
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void vpclmulqdq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_YMM|T_EVEX, 0x44, imm); }
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void vpcmpeqb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x74); }
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void vpcmpeqd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x76); }
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void vpcmpeqq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x29); }
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void vpcmpeqw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x75); }
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void vpcmpestri(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0x61, imm); }
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void vpcmpestrm(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0x60, imm); }
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void vpcmpgtb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x64); }
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void vpcmpgtd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x66); }
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void vpcmpgtq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x37); }
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void vpcmpgtw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0x65); }
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void vpcmpistri(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0x63, imm); }
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void vpcmpistrm(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A, 0x62, imm); }
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void vpdpbssd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F38|T_W0|T_YMM, 0x50); }
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void vpdpbssds(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F38|T_W0|T_YMM, 0x51); }
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void vpdpbsud(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM, 0x50); }
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void vpdpbsuds(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM, 0x51); }
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void vpdpbusd(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_B32, 0x50, encoding); }
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void vpdpbusds(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_B32, 0x51, encoding); }
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void vpdpbuud(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38|T_W0|T_YMM, 0x50); }
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void vpdpbuuds(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38|T_W0|T_YMM, 0x51); }
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void vpdpwssd(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_B32, 0x52, encoding); }
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void vpdpwssds(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_B32, 0x53, encoding); }
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void vpdpwsud(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM, 0xD2); }
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void vpdpwsuds(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F38|T_W0|T_YMM, 0xD3); }
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void vpdpwusd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM, 0xD2); }
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void vpdpwusds(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_YMM, 0xD3); }
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void vpdpwuud(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38|T_W0|T_YMM, 0xD2); }
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void vpdpwuuds(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38|T_W0|T_YMM, 0xD3); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vperm2f128(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { if (!(y1.isYMM() && y2.isYMM() && op.isYMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y1, &y2, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x06, imm); }
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void vperm2i128(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { if (!(y1.isYMM() && y2.isYMM() && op.isYMEM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(y1, &y2, op, T_0F3A | T_66 | T_W0 | T_YMM, 0x46, imm); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vpermd(const Ymm& y1, const Ymm& y2, const Operand& op) { opAVX_X_X_XM(y1, y2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0x36); }
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void vpermilpd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW1|T_YMM|T_EVEX|T_B64, 0x0D); }
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void vpermilpd(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A|T_EW1|T_YMM|T_EVEX|T_B64, 0x05, imm); }
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void vpermilps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0x0C); }
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void vpermilps(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A|T_EW0|T_YMM|T_EVEX|T_B32, 0x04, imm); }
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void vpermpd(const Ymm& y, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(y, op, T_66|T_0F3A|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x01, imm); }
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void vpermpd(const Ymm& y1, const Ymm& y2, const Operand& op) { opAVX_X_X_XM(y1, y2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x16); }
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void vpermps(const Ymm& y1, const Ymm& y2, const Operand& op) { opAVX_X_X_XM(y1, y2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0x16); }
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void vpermq(const Ymm& y, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(y, op, T_66|T_0F3A|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x00, imm); }
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void vpermq(const Ymm& y1, const Ymm& y2, const Operand& op) { opAVX_X_X_XM(y1, y2, op, T_66|T_0F38|T_W0|T_EW1|T_YMM|T_EVEX|T_B64, 0x36); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vpextrb(const Operand& op, const Xmm& x, uint8_t imm) { if (!((op.isREG(8|16|i32e) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x, 0, op, T_0F3A | T_66 | T_EVEX | T_N1, 0x14, imm); }
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void vpextrd(const Operand& op, const Xmm& x, uint8_t imm) { if (!((op.isREG(32) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x, 0, op, T_0F3A | T_66 | T_W0 | T_EVEX | T_EW0 | T_N4, 0x16, imm); }
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void vpextrq(const Operand& op, const Xmm& x, uint8_t imm) { if (!((op.isREG(64) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x, 0, op, T_0F3A | T_66 | T_W1 | T_EVEX | T_EW1 | T_N8, 0x16, imm); }
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void vpextrw(const Operand& op, const Xmm& x, uint8_t imm) { if (!((op.isREG(16|i32e) || op.isMEM()) && x.isXMM())) XBYAK_THROW(ERR_BAD_COMBINATION) if (op.isREG() && x.getIdx() < 16) { opAVX_X_X_XM(Xmm(op.getIdx()), xm0, x, T_0F | T_66, 0xC5, imm); } else { opVex(x, 0, op, T_0F3A | T_66 | T_EVEX | T_N2, 0x15, imm); } }
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2020-04-22 20:51:10 +01:00
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void vpgatherdd(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W0, 0x90, 1); }
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void vpgatherdq(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W1, 0x90, 0); }
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void vpgatherqd(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W0, 0x91, 2); }
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void vpgatherqq(const Xmm& x1, const Address& addr, const Xmm& x2) { opGather(x1, addr, x2, T_0F38 | T_66 | T_YMM | T_VSIB | T_W1, 0x91, 1); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vphaddd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x02); }
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void vphaddsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x03); }
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void vphaddw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x01); }
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void vphminposuw(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38, 0x41); }
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void vphsubd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x06); }
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void vphsubsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x07); }
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void vphsubw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x05); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vpinsrb(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { if (!(x1.isXMM() && x2.isXMM() && (op.isREG(32) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x1, &x2, op, T_0F3A | T_66 | T_EVEX | T_N1, 0x20, imm); }
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void vpinsrd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { if (!(x1.isXMM() && x2.isXMM() && (op.isREG(32) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x1, &x2, op, T_0F3A | T_66 | T_W0 | T_EVEX | T_EW0 | T_N4, 0x22, imm); }
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void vpinsrq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { if (!(x1.isXMM() && x2.isXMM() && (op.isREG(64) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x1, &x2, op, T_0F3A | T_66 | T_W1 | T_EVEX | T_EW1 | T_N8, 0x22, imm); }
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void vpinsrw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { if (!(x1.isXMM() && x2.isXMM() && (op.isREG(32) || op.isMEM()))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x1, &x2, op, T_0F | T_66 | T_EVEX | T_N2, 0xC4, imm); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vpmadd52huq(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_B64, 0xB5, encoding); }
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void vpmadd52luq(const Xmm& x1, const Xmm& x2, const Operand& op, PreferredEncoding encoding = DefaultEncoding) { opEncoding(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_B64, 0xB4, encoding); }
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void vpmaddubsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x04); }
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void vpmaddwd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xF5); }
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2020-04-22 20:25:57 +01:00
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void vpmaskmovd(const Address& addr, const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x2, x1, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x8E); }
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void vpmaskmovd(const Xmm& x1, const Xmm& x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_66 | T_W0 | T_YMM, 0x8C); }
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void vpmaskmovq(const Address& addr, const Xmm& x1, const Xmm& x2) { opAVX_X_X_XM(x2, x1, addr, T_0F38 | T_66 | T_W1 | T_YMM, 0x8E); }
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void vpmaskmovq(const Xmm& x1, const Xmm& x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_66 | T_W1 | T_YMM, 0x8C); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vpmaxsb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x3C); }
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void vpmaxsd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_EVEX|T_B32, 0x3D); }
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void vpmaxsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xEE); }
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void vpmaxub(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xDE); }
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void vpmaxud(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_EVEX|T_B32, 0x3F); }
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void vpmaxuw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x3E); }
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void vpminsb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x38); }
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void vpminsd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_EVEX|T_B32, 0x39); }
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void vpminsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xEA); }
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void vpminub(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xDA); }
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void vpminud(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_EVEX|T_B32, 0x3B); }
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void vpminuw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x3A); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vpmovmskb(const Reg32e& r, const Xmm& x) { if (!x.is(Operand::XMM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(x.isYMM() ? Ymm(r.getIdx()) : Xmm(r.getIdx()), 0, x, T_0F | T_66 | T_YMM, 0xD7); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vpmovsxbd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x21); }
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void vpmovsxbq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N2|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x22); }
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void vpmovsxbw(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x20); }
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void vpmovsxdq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_EW0|T_YMM|T_EVEX, 0x25); }
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void vpmovsxwd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x23); }
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void vpmovsxwq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x24); }
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void vpmovzxbd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x31); }
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void vpmovzxbq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N2|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x32); }
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void vpmovzxbw(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x30); }
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void vpmovzxdq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_EW0|T_YMM|T_EVEX, 0x35); }
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void vpmovzxwd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x33); }
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void vpmovzxwq(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_N_VL|T_66|T_0F38|T_YMM|T_EVEX, 0x34); }
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void vpmuldq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_EVEX|T_B64, 0x28); }
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void vpmulhrsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x0B); }
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void vpmulhuw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE4); }
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void vpmulhw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE5); }
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void vpmulld(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_EVEX|T_B32, 0x40); }
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void vpmullw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xD5); }
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void vpmuludq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0xF4); }
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void vpor(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xEB); }
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void vpsadbw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xF6); }
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void vpshufb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM|T_EVEX, 0x00); }
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void vpshufd(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_EW0|T_YMM|T_EVEX|T_B32, 0x70, imm); }
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void vpshufhw(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_F3|T_0F|T_YMM|T_EVEX, 0x70, imm); }
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void vpshuflw(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_F2|T_0F|T_YMM|T_EVEX, 0x70, imm); }
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void vpsignb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x08); }
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void vpsignd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x0A); }
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void vpsignw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_YMM, 0x09); }
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void vpslld(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 6), x, op, T_66|T_0F|T_EW0|T_YMM|T_EVEX|T_B32|T_MEM_EVEX, 0x72, imm); }
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void vpslld(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_EW0|T_YMM|T_EVEX, 0xF2); }
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void vpslldq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 7), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x73, imm); }
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void vpsllq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 6), x, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64|T_MEM_EVEX, 0x73, imm); }
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void vpsllq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_EW1|T_YMM|T_EVEX, 0xF3); }
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void vpsllvd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0x47); }
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void vpsllvq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x47); }
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void vpsllw(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 6), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x71, imm); }
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void vpsllw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_YMM|T_EVEX, 0xF1); }
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void vpsrad(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 4), x, op, T_66|T_0F|T_EW0|T_YMM|T_EVEX|T_B32|T_MEM_EVEX, 0x72, imm); }
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void vpsrad(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_EW0|T_YMM|T_EVEX, 0xE2); }
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void vpsravd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0x46); }
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void vpsraw(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 4), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x71, imm); }
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void vpsraw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_YMM|T_EVEX, 0xE1); }
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void vpsrld(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 2), x, op, T_66|T_0F|T_EW0|T_YMM|T_EVEX|T_B32|T_MEM_EVEX, 0x72, imm); }
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void vpsrld(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_EW0|T_YMM|T_EVEX, 0xD2); }
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void vpsrldq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 3), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x73, imm); }
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void vpsrlq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 2), x, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64|T_MEM_EVEX, 0x73, imm); }
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void vpsrlq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_EW1|T_YMM|T_EVEX, 0xD3); }
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void vpsrlvd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_YMM|T_EVEX|T_B32, 0x45); }
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void vpsrlvq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W1|T_EW1|T_YMM|T_EVEX|T_B64, 0x45); }
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void vpsrlw(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 2), x, op, T_66|T_0F|T_YMM|T_EVEX|T_MEM_EVEX, 0x71, imm); }
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void vpsrlw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_YMM|T_EVEX, 0xD1); }
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void vpsubb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xF8); }
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void vpsubd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW0|T_YMM|T_EVEX|T_B32, 0xFA); }
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void vpsubq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0xFB); }
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void vpsubsb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE8); }
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void vpsubsw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xE9); }
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void vpsubusb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xD8); }
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void vpsubusw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xD9); }
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void vpsubw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0xF9); }
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void vptest(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM, 0x17); }
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void vpunpckhbw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x68); }
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void vpunpckhdq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW0|T_YMM|T_EVEX|T_B32, 0x6A); }
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void vpunpckhqdq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0x6D); }
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void vpunpckhwd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x69); }
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void vpunpcklbw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x60); }
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void vpunpckldq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW0|T_YMM|T_EVEX|T_B32, 0x62); }
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void vpunpcklqdq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0x6C); }
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void vpunpcklwd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM|T_EVEX, 0x61); }
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void vpxor(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_YMM, 0xEF); }
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void vrcpps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_YMM, 0x53); }
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void vrcpss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F, 0x53); }
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void vroundpd(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A|T_YMM, 0x09, imm); }
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void vroundps(const Xmm& xm, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(xm, op, T_66|T_0F3A|T_YMM, 0x08, imm); }
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void vroundsd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0, 0x0B, imm); }
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void vroundss(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0, 0x0A, imm); }
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void vrsqrtps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_YMM, 0x52); }
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void vrsqrtss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F, 0x52); }
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void vsha512msg1(const Ymm& y, const Xmm& x) { if (!(y.isYMM() && x.isXMM())) XBYAK_THROW(ERR_BAD_PARAMETER) opVex(y, 0, x, T_F2 | T_0F38 | T_W0 | T_YMM, 0xCC); }
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void vsha512msg2(const Ymm& y1, const Ymm& y2) { if (!(y1.isYMM() && y2.isYMM())) XBYAK_THROW(ERR_BAD_PARAMETER) opVex(y1, 0, y2, T_F2 | T_0F38 | T_W0 | T_YMM, 0xCD); }
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void vsha512rnds2(const Ymm& y1, const Ymm& y2, const Xmm& x) { if (!(y1.isYMM() && y2.isYMM() && x.isXMM())) XBYAK_THROW(ERR_BAD_PARAMETER) opVex(y1, &y2, x, T_F2 | T_0F38 | T_W0 | T_YMM, 0xCB); }
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void vshufpd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0xC6, imm); }
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void vshufps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_0F|T_EW0|T_YMM|T_EVEX|T_B32, 0xC6, imm); }
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void vsm3msg1(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F38|T_W0|T_EW0|T_EVEX, 0xDA); }
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void vsm3msg2(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_W0|T_EW0|T_EVEX, 0xDA); }
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void vsm3rnds2(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_W0|T_EW0|T_EVEX, 0xDE, imm); }
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void vsm4key4(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F38|T_W0|T_EW0|T_EVEX, 0xDA); }
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void vsm4rnds4(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F38|T_W0|T_EW0|T_EVEX, 0xDA); }
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void vsqrtpd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_ER_Z|T_B64, 0x51); }
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void vsqrtps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_0F|T_EW0|T_YMM|T_EVEX|T_ER_Z|T_B32, 0x51); }
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void vsqrtsd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_F2|T_0F|T_EW1|T_EVEX|T_ER_X, 0x51); }
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void vsqrtss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_F3|T_0F|T_EW0|T_EVEX|T_ER_X, 0x51); }
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2020-04-22 20:25:57 +01:00
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void vstmxcsr(const Address& addr) { opAVX_X_X_XM(xm3, xm0, addr, T_0F, 0xAE); }
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void vsubpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x5C); }
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void vsubps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_EW0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x5C); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vsubsd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F2 | T_EW1 | T_EVEX | T_ER_X | T_N8, 0x5C); }
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void vsubss(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_F3 | T_EW0 | T_EVEX | T_ER_X | T_N4, 0x5C); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vtestpd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM, 0x0F); }
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void vtestps(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_66|T_0F38|T_YMM, 0x0E); }
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void vucomisd(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N8|T_66|T_0F|T_EW1|T_EVEX|T_SAE_X, 0x2E); }
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void vucomiss(const Xmm& xm, const Operand& op) { opAVX_X_XM_IMM(xm, op, T_N4|T_0F|T_EW0|T_EVEX|T_SAE_X, 0x2E); }
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void vunpckhpd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0x15); }
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void vunpckhps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F|T_EW0|T_YMM|T_EVEX|T_B32, 0x15); }
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void vunpcklpd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_EVEX|T_B64, 0x14); }
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void vunpcklps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_0F|T_EW0|T_YMM|T_EVEX|T_B32, 0x14); }
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2020-04-22 20:25:57 +01:00
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void vxorpd(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_66 | T_EW1 | T_YMM | T_EVEX | T_ER_Z | T_B64, 0x57); }
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void vxorps(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_0F | T_EW0 | T_YMM | T_EVEX | T_ER_Z | T_B32, 0x57); }
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void vzeroall() { db(0xC5); db(0xFC); db(0x77); }
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void vzeroupper() { db(0xC5); db(0xF8); db(0x77); }
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void wait() { db(0x9B); }
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void wbinvd() { db(0x0F); db(0x09); }
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void wrmsr() { db(0x0F); db(0x30); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void xabort(uint8_t imm) { db(0xC6); db(0xF8); db(imm); }
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void xadd(const Operand& op, const Reg& reg) { opRO(reg, op, T_0F, 0xC0 | (reg.isBit(8) ? 0 : 1), op.getBit() == reg.getBit()); }
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void xbegin(uint32_t rel) { db(0xC7); db(0xF8); dd(rel); }
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void xend() { db(0x0F); db(0x01); db(0xD5); }
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2020-04-22 20:25:57 +01:00
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void xgetbv() { db(0x0F); db(0x01); db(0xD0); }
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void xlatb() { db(0xD7); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void xor_(const Operand& op, uint32_t imm) { opOI(op, imm, 0x30, 6); }
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void xor_(const Operand& op1, const Operand& op2) { opRO_MR(op1, op2, 0x30); }
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void xor_(const Reg& d, const Operand& op, uint32_t imm) { opROI(d, op, imm, T_NF|T_CODE1_IF1, 6); }
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void xor_(const Reg& d, const Operand& op1, const Operand& op2) { opROO(d, op1, op2, T_NF|T_CODE1_IF1, 0x30); }
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void xorpd(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F | T_66, 0x57, isXMM_XMMorMEM); }
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void xorps(const Xmm& xmm, const Operand& op) { opSSE(xmm, op, T_0F, 0x57, isXMM_XMMorMEM); }
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2020-04-22 20:25:57 +01:00
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#ifdef XBYAK_ENABLE_OMITTED_OPERAND
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vblendpd(const Xmm& x, const Operand& op, uint8_t imm) { vblendpd(x, x, op, imm); }
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void vblendps(const Xmm& x, const Operand& op, uint8_t imm) { vblendps(x, x, op, imm); }
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2020-04-22 20:25:57 +01:00
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void vblendvpd(const Xmm& x1, const Operand& op, const Xmm& x4) { vblendvpd(x1, x1, op, x4); }
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void vblendvps(const Xmm& x1, const Operand& op, const Xmm& x4) { vblendvps(x1, x1, op, x4); }
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void vcmpeq_ospd(const Xmm& x, const Operand& op) { vcmpeq_ospd(x, x, op); }
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void vcmpeq_osps(const Xmm& x, const Operand& op) { vcmpeq_osps(x, x, op); }
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void vcmpeq_ossd(const Xmm& x, const Operand& op) { vcmpeq_ossd(x, x, op); }
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void vcmpeq_osss(const Xmm& x, const Operand& op) { vcmpeq_osss(x, x, op); }
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void vcmpeq_uqpd(const Xmm& x, const Operand& op) { vcmpeq_uqpd(x, x, op); }
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void vcmpeq_uqps(const Xmm& x, const Operand& op) { vcmpeq_uqps(x, x, op); }
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void vcmpeq_uqsd(const Xmm& x, const Operand& op) { vcmpeq_uqsd(x, x, op); }
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void vcmpeq_uqss(const Xmm& x, const Operand& op) { vcmpeq_uqss(x, x, op); }
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void vcmpeq_uspd(const Xmm& x, const Operand& op) { vcmpeq_uspd(x, x, op); }
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void vcmpeq_usps(const Xmm& x, const Operand& op) { vcmpeq_usps(x, x, op); }
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void vcmpeq_ussd(const Xmm& x, const Operand& op) { vcmpeq_ussd(x, x, op); }
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void vcmpeq_usss(const Xmm& x, const Operand& op) { vcmpeq_usss(x, x, op); }
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void vcmpeqpd(const Xmm& x, const Operand& op) { vcmpeqpd(x, x, op); }
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void vcmpeqps(const Xmm& x, const Operand& op) { vcmpeqps(x, x, op); }
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void vcmpeqsd(const Xmm& x, const Operand& op) { vcmpeqsd(x, x, op); }
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void vcmpeqss(const Xmm& x, const Operand& op) { vcmpeqss(x, x, op); }
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void vcmpfalse_ospd(const Xmm& x, const Operand& op) { vcmpfalse_ospd(x, x, op); }
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void vcmpfalse_osps(const Xmm& x, const Operand& op) { vcmpfalse_osps(x, x, op); }
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void vcmpfalse_ossd(const Xmm& x, const Operand& op) { vcmpfalse_ossd(x, x, op); }
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void vcmpfalse_osss(const Xmm& x, const Operand& op) { vcmpfalse_osss(x, x, op); }
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void vcmpfalsepd(const Xmm& x, const Operand& op) { vcmpfalsepd(x, x, op); }
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void vcmpfalseps(const Xmm& x, const Operand& op) { vcmpfalseps(x, x, op); }
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void vcmpfalsesd(const Xmm& x, const Operand& op) { vcmpfalsesd(x, x, op); }
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void vcmpfalsess(const Xmm& x, const Operand& op) { vcmpfalsess(x, x, op); }
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void vcmpge_oqpd(const Xmm& x, const Operand& op) { vcmpge_oqpd(x, x, op); }
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void vcmpge_oqps(const Xmm& x, const Operand& op) { vcmpge_oqps(x, x, op); }
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void vcmpge_oqsd(const Xmm& x, const Operand& op) { vcmpge_oqsd(x, x, op); }
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void vcmpge_oqss(const Xmm& x, const Operand& op) { vcmpge_oqss(x, x, op); }
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void vcmpgepd(const Xmm& x, const Operand& op) { vcmpgepd(x, x, op); }
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void vcmpgeps(const Xmm& x, const Operand& op) { vcmpgeps(x, x, op); }
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void vcmpgesd(const Xmm& x, const Operand& op) { vcmpgesd(x, x, op); }
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void vcmpgess(const Xmm& x, const Operand& op) { vcmpgess(x, x, op); }
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void vcmpgt_oqpd(const Xmm& x, const Operand& op) { vcmpgt_oqpd(x, x, op); }
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void vcmpgt_oqps(const Xmm& x, const Operand& op) { vcmpgt_oqps(x, x, op); }
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void vcmpgt_oqsd(const Xmm& x, const Operand& op) { vcmpgt_oqsd(x, x, op); }
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void vcmpgt_oqss(const Xmm& x, const Operand& op) { vcmpgt_oqss(x, x, op); }
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void vcmpgtpd(const Xmm& x, const Operand& op) { vcmpgtpd(x, x, op); }
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void vcmpgtps(const Xmm& x, const Operand& op) { vcmpgtps(x, x, op); }
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void vcmpgtsd(const Xmm& x, const Operand& op) { vcmpgtsd(x, x, op); }
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void vcmpgtss(const Xmm& x, const Operand& op) { vcmpgtss(x, x, op); }
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void vcmple_oqpd(const Xmm& x, const Operand& op) { vcmple_oqpd(x, x, op); }
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void vcmple_oqps(const Xmm& x, const Operand& op) { vcmple_oqps(x, x, op); }
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void vcmple_oqsd(const Xmm& x, const Operand& op) { vcmple_oqsd(x, x, op); }
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void vcmple_oqss(const Xmm& x, const Operand& op) { vcmple_oqss(x, x, op); }
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void vcmplepd(const Xmm& x, const Operand& op) { vcmplepd(x, x, op); }
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void vcmpleps(const Xmm& x, const Operand& op) { vcmpleps(x, x, op); }
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void vcmplesd(const Xmm& x, const Operand& op) { vcmplesd(x, x, op); }
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void vcmpless(const Xmm& x, const Operand& op) { vcmpless(x, x, op); }
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void vcmplt_oqpd(const Xmm& x, const Operand& op) { vcmplt_oqpd(x, x, op); }
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void vcmplt_oqps(const Xmm& x, const Operand& op) { vcmplt_oqps(x, x, op); }
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void vcmplt_oqsd(const Xmm& x, const Operand& op) { vcmplt_oqsd(x, x, op); }
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void vcmplt_oqss(const Xmm& x, const Operand& op) { vcmplt_oqss(x, x, op); }
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void vcmpltpd(const Xmm& x, const Operand& op) { vcmpltpd(x, x, op); }
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void vcmpltps(const Xmm& x, const Operand& op) { vcmpltps(x, x, op); }
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void vcmpltsd(const Xmm& x, const Operand& op) { vcmpltsd(x, x, op); }
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void vcmpltss(const Xmm& x, const Operand& op) { vcmpltss(x, x, op); }
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void vcmpneq_oqpd(const Xmm& x, const Operand& op) { vcmpneq_oqpd(x, x, op); }
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void vcmpneq_oqps(const Xmm& x, const Operand& op) { vcmpneq_oqps(x, x, op); }
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void vcmpneq_oqsd(const Xmm& x, const Operand& op) { vcmpneq_oqsd(x, x, op); }
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void vcmpneq_oqss(const Xmm& x, const Operand& op) { vcmpneq_oqss(x, x, op); }
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void vcmpneq_ospd(const Xmm& x, const Operand& op) { vcmpneq_ospd(x, x, op); }
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void vcmpneq_osps(const Xmm& x, const Operand& op) { vcmpneq_osps(x, x, op); }
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void vcmpneq_ossd(const Xmm& x, const Operand& op) { vcmpneq_ossd(x, x, op); }
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void vcmpneq_osss(const Xmm& x, const Operand& op) { vcmpneq_osss(x, x, op); }
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void vcmpneq_uspd(const Xmm& x, const Operand& op) { vcmpneq_uspd(x, x, op); }
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void vcmpneq_usps(const Xmm& x, const Operand& op) { vcmpneq_usps(x, x, op); }
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void vcmpneq_ussd(const Xmm& x, const Operand& op) { vcmpneq_ussd(x, x, op); }
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void vcmpneq_usss(const Xmm& x, const Operand& op) { vcmpneq_usss(x, x, op); }
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void vcmpneqpd(const Xmm& x, const Operand& op) { vcmpneqpd(x, x, op); }
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void vcmpneqps(const Xmm& x, const Operand& op) { vcmpneqps(x, x, op); }
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void vcmpneqsd(const Xmm& x, const Operand& op) { vcmpneqsd(x, x, op); }
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void vcmpneqss(const Xmm& x, const Operand& op) { vcmpneqss(x, x, op); }
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void vcmpnge_uqpd(const Xmm& x, const Operand& op) { vcmpnge_uqpd(x, x, op); }
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void vcmpnge_uqps(const Xmm& x, const Operand& op) { vcmpnge_uqps(x, x, op); }
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void vcmpnge_uqsd(const Xmm& x, const Operand& op) { vcmpnge_uqsd(x, x, op); }
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void vcmpnge_uqss(const Xmm& x, const Operand& op) { vcmpnge_uqss(x, x, op); }
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void vcmpngepd(const Xmm& x, const Operand& op) { vcmpngepd(x, x, op); }
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void vcmpngeps(const Xmm& x, const Operand& op) { vcmpngeps(x, x, op); }
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|
void vcmpngesd(const Xmm& x, const Operand& op) { vcmpngesd(x, x, op); }
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void vcmpngess(const Xmm& x, const Operand& op) { vcmpngess(x, x, op); }
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void vcmpngt_uqpd(const Xmm& x, const Operand& op) { vcmpngt_uqpd(x, x, op); }
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void vcmpngt_uqps(const Xmm& x, const Operand& op) { vcmpngt_uqps(x, x, op); }
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void vcmpngt_uqsd(const Xmm& x, const Operand& op) { vcmpngt_uqsd(x, x, op); }
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|
void vcmpngt_uqss(const Xmm& x, const Operand& op) { vcmpngt_uqss(x, x, op); }
|
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|
|
void vcmpngtpd(const Xmm& x, const Operand& op) { vcmpngtpd(x, x, op); }
|
|
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|
void vcmpngtps(const Xmm& x, const Operand& op) { vcmpngtps(x, x, op); }
|
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|
void vcmpngtsd(const Xmm& x, const Operand& op) { vcmpngtsd(x, x, op); }
|
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|
|
void vcmpngtss(const Xmm& x, const Operand& op) { vcmpngtss(x, x, op); }
|
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void vcmpnle_uqpd(const Xmm& x, const Operand& op) { vcmpnle_uqpd(x, x, op); }
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void vcmpnle_uqps(const Xmm& x, const Operand& op) { vcmpnle_uqps(x, x, op); }
|
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|
|
void vcmpnle_uqsd(const Xmm& x, const Operand& op) { vcmpnle_uqsd(x, x, op); }
|
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|
|
void vcmpnle_uqss(const Xmm& x, const Operand& op) { vcmpnle_uqss(x, x, op); }
|
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|
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void vcmpnlepd(const Xmm& x, const Operand& op) { vcmpnlepd(x, x, op); }
|
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void vcmpnleps(const Xmm& x, const Operand& op) { vcmpnleps(x, x, op); }
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void vcmpnlesd(const Xmm& x, const Operand& op) { vcmpnlesd(x, x, op); }
|
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void vcmpnless(const Xmm& x, const Operand& op) { vcmpnless(x, x, op); }
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void vcmpnlt_uqpd(const Xmm& x, const Operand& op) { vcmpnlt_uqpd(x, x, op); }
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void vcmpnlt_uqps(const Xmm& x, const Operand& op) { vcmpnlt_uqps(x, x, op); }
|
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void vcmpnlt_uqsd(const Xmm& x, const Operand& op) { vcmpnlt_uqsd(x, x, op); }
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void vcmpnlt_uqss(const Xmm& x, const Operand& op) { vcmpnlt_uqss(x, x, op); }
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void vcmpnltpd(const Xmm& x, const Operand& op) { vcmpnltpd(x, x, op); }
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void vcmpnltps(const Xmm& x, const Operand& op) { vcmpnltps(x, x, op); }
|
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void vcmpnltsd(const Xmm& x, const Operand& op) { vcmpnltsd(x, x, op); }
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void vcmpnltss(const Xmm& x, const Operand& op) { vcmpnltss(x, x, op); }
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void vcmpord_spd(const Xmm& x, const Operand& op) { vcmpord_spd(x, x, op); }
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|
void vcmpord_sps(const Xmm& x, const Operand& op) { vcmpord_sps(x, x, op); }
|
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|
void vcmpord_ssd(const Xmm& x, const Operand& op) { vcmpord_ssd(x, x, op); }
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|
void vcmpord_sss(const Xmm& x, const Operand& op) { vcmpord_sss(x, x, op); }
|
|
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|
void vcmpordpd(const Xmm& x, const Operand& op) { vcmpordpd(x, x, op); }
|
|
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|
void vcmpordps(const Xmm& x, const Operand& op) { vcmpordps(x, x, op); }
|
|
|
|
void vcmpordsd(const Xmm& x, const Operand& op) { vcmpordsd(x, x, op); }
|
|
|
|
void vcmpordss(const Xmm& x, const Operand& op) { vcmpordss(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vcmppd(const Xmm& x, const Operand& op, uint8_t imm) { vcmppd(x, x, op, imm); }
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void vcmpps(const Xmm& x, const Operand& op, uint8_t imm) { vcmpps(x, x, op, imm); }
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void vcmpsd(const Xmm& x, const Operand& op, uint8_t imm) { vcmpsd(x, x, op, imm); }
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void vcmpss(const Xmm& x, const Operand& op, uint8_t imm) { vcmpss(x, x, op, imm); }
|
2020-04-22 20:25:57 +01:00
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|
void vcmptrue_uspd(const Xmm& x, const Operand& op) { vcmptrue_uspd(x, x, op); }
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void vcmptrue_usps(const Xmm& x, const Operand& op) { vcmptrue_usps(x, x, op); }
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void vcmptrue_ussd(const Xmm& x, const Operand& op) { vcmptrue_ussd(x, x, op); }
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void vcmptrue_usss(const Xmm& x, const Operand& op) { vcmptrue_usss(x, x, op); }
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void vcmptruepd(const Xmm& x, const Operand& op) { vcmptruepd(x, x, op); }
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void vcmptrueps(const Xmm& x, const Operand& op) { vcmptrueps(x, x, op); }
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|
void vcmptruesd(const Xmm& x, const Operand& op) { vcmptruesd(x, x, op); }
|
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|
void vcmptruess(const Xmm& x, const Operand& op) { vcmptruess(x, x, op); }
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|
void vcmpunord_spd(const Xmm& x, const Operand& op) { vcmpunord_spd(x, x, op); }
|
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|
void vcmpunord_sps(const Xmm& x, const Operand& op) { vcmpunord_sps(x, x, op); }
|
|
|
|
void vcmpunord_ssd(const Xmm& x, const Operand& op) { vcmpunord_ssd(x, x, op); }
|
|
|
|
void vcmpunord_sss(const Xmm& x, const Operand& op) { vcmpunord_sss(x, x, op); }
|
|
|
|
void vcmpunordpd(const Xmm& x, const Operand& op) { vcmpunordpd(x, x, op); }
|
|
|
|
void vcmpunordps(const Xmm& x, const Operand& op) { vcmpunordps(x, x, op); }
|
|
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|
void vcmpunordsd(const Xmm& x, const Operand& op) { vcmpunordsd(x, x, op); }
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|
void vcmpunordss(const Xmm& x, const Operand& op) { vcmpunordss(x, x, op); }
|
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|
void vcvtsd2ss(const Xmm& x, const Operand& op) { vcvtsd2ss(x, x, op); }
|
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|
|
void vcvtsi2sd(const Xmm& x, const Operand& op) { vcvtsi2sd(x, x, op); }
|
|
|
|
void vcvtsi2ss(const Xmm& x, const Operand& op) { vcvtsi2ss(x, x, op); }
|
|
|
|
void vcvtss2sd(const Xmm& x, const Operand& op) { vcvtss2sd(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vdppd(const Xmm& x, const Operand& op, uint8_t imm) { vdppd(x, x, op, imm); }
|
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|
|
void vdpps(const Xmm& x, const Operand& op, uint8_t imm) { vdpps(x, x, op, imm); }
|
|
|
|
void vinsertps(const Xmm& x, const Operand& op, uint8_t imm) { vinsertps(x, x, op, imm); }
|
|
|
|
void vmpsadbw(const Xmm& x, const Operand& op, uint8_t imm) { vmpsadbw(x, x, op, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vpackssdw(const Xmm& x, const Operand& op) { vpackssdw(x, x, op); }
|
|
|
|
void vpacksswb(const Xmm& x, const Operand& op) { vpacksswb(x, x, op); }
|
|
|
|
void vpackusdw(const Xmm& x, const Operand& op) { vpackusdw(x, x, op); }
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|
void vpackuswb(const Xmm& x, const Operand& op) { vpackuswb(x, x, op); }
|
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|
void vpaddb(const Xmm& x, const Operand& op) { vpaddb(x, x, op); }
|
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|
void vpaddd(const Xmm& x, const Operand& op) { vpaddd(x, x, op); }
|
|
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|
void vpaddq(const Xmm& x, const Operand& op) { vpaddq(x, x, op); }
|
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|
void vpaddsb(const Xmm& x, const Operand& op) { vpaddsb(x, x, op); }
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|
void vpaddsw(const Xmm& x, const Operand& op) { vpaddsw(x, x, op); }
|
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|
void vpaddusb(const Xmm& x, const Operand& op) { vpaddusb(x, x, op); }
|
|
|
|
void vpaddusw(const Xmm& x, const Operand& op) { vpaddusw(x, x, op); }
|
|
|
|
void vpaddw(const Xmm& x, const Operand& op) { vpaddw(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vpalignr(const Xmm& x, const Operand& op, uint8_t imm) { vpalignr(x, x, op, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vpand(const Xmm& x, const Operand& op) { vpand(x, x, op); }
|
|
|
|
void vpandn(const Xmm& x, const Operand& op) { vpandn(x, x, op); }
|
|
|
|
void vpavgb(const Xmm& x, const Operand& op) { vpavgb(x, x, op); }
|
|
|
|
void vpavgw(const Xmm& x, const Operand& op) { vpavgw(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vpblendd(const Xmm& x, const Operand& op, uint8_t imm) { vpblendd(x, x, op, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vpblendvb(const Xmm& x1, const Operand& op, const Xmm& x4) { vpblendvb(x1, x1, op, x4); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vpblendw(const Xmm& x, const Operand& op, uint8_t imm) { vpblendw(x, x, op, imm); }
|
|
|
|
void vpclmulqdq(const Xmm& x, const Operand& op, uint8_t imm) { vpclmulqdq(x, x, op, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vpcmpeqb(const Xmm& x, const Operand& op) { vpcmpeqb(x, x, op); }
|
|
|
|
void vpcmpeqd(const Xmm& x, const Operand& op) { vpcmpeqd(x, x, op); }
|
|
|
|
void vpcmpeqq(const Xmm& x, const Operand& op) { vpcmpeqq(x, x, op); }
|
|
|
|
void vpcmpeqw(const Xmm& x, const Operand& op) { vpcmpeqw(x, x, op); }
|
|
|
|
void vpcmpgtb(const Xmm& x, const Operand& op) { vpcmpgtb(x, x, op); }
|
|
|
|
void vpcmpgtd(const Xmm& x, const Operand& op) { vpcmpgtd(x, x, op); }
|
|
|
|
void vpcmpgtq(const Xmm& x, const Operand& op) { vpcmpgtq(x, x, op); }
|
|
|
|
void vpcmpgtw(const Xmm& x, const Operand& op) { vpcmpgtw(x, x, op); }
|
|
|
|
void vphaddd(const Xmm& x, const Operand& op) { vphaddd(x, x, op); }
|
|
|
|
void vphaddsw(const Xmm& x, const Operand& op) { vphaddsw(x, x, op); }
|
|
|
|
void vphaddw(const Xmm& x, const Operand& op) { vphaddw(x, x, op); }
|
|
|
|
void vphsubd(const Xmm& x, const Operand& op) { vphsubd(x, x, op); }
|
|
|
|
void vphsubsw(const Xmm& x, const Operand& op) { vphsubsw(x, x, op); }
|
|
|
|
void vphsubw(const Xmm& x, const Operand& op) { vphsubw(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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|
|
void vpinsrb(const Xmm& x, const Operand& op, uint8_t imm) { vpinsrb(x, x, op, imm); }
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void vpinsrd(const Xmm& x, const Operand& op, uint8_t imm) { vpinsrd(x, x, op, imm); }
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void vpinsrq(const Xmm& x, const Operand& op, uint8_t imm) { vpinsrq(x, x, op, imm); }
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void vpinsrw(const Xmm& x, const Operand& op, uint8_t imm) { vpinsrw(x, x, op, imm); }
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2020-04-22 20:25:57 +01:00
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void vpmaddubsw(const Xmm& x, const Operand& op) { vpmaddubsw(x, x, op); }
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void vpmaddwd(const Xmm& x, const Operand& op) { vpmaddwd(x, x, op); }
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void vpmaxsb(const Xmm& x, const Operand& op) { vpmaxsb(x, x, op); }
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void vpmaxsd(const Xmm& x, const Operand& op) { vpmaxsd(x, x, op); }
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void vpmaxsw(const Xmm& x, const Operand& op) { vpmaxsw(x, x, op); }
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void vpmaxub(const Xmm& x, const Operand& op) { vpmaxub(x, x, op); }
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void vpmaxud(const Xmm& x, const Operand& op) { vpmaxud(x, x, op); }
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void vpmaxuw(const Xmm& x, const Operand& op) { vpmaxuw(x, x, op); }
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void vpminsb(const Xmm& x, const Operand& op) { vpminsb(x, x, op); }
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void vpminsd(const Xmm& x, const Operand& op) { vpminsd(x, x, op); }
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void vpminsw(const Xmm& x, const Operand& op) { vpminsw(x, x, op); }
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void vpminub(const Xmm& x, const Operand& op) { vpminub(x, x, op); }
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void vpminud(const Xmm& x, const Operand& op) { vpminud(x, x, op); }
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void vpminuw(const Xmm& x, const Operand& op) { vpminuw(x, x, op); }
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void vpmuldq(const Xmm& x, const Operand& op) { vpmuldq(x, x, op); }
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void vpmulhrsw(const Xmm& x, const Operand& op) { vpmulhrsw(x, x, op); }
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void vpmulhuw(const Xmm& x, const Operand& op) { vpmulhuw(x, x, op); }
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void vpmulhw(const Xmm& x, const Operand& op) { vpmulhw(x, x, op); }
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void vpmulld(const Xmm& x, const Operand& op) { vpmulld(x, x, op); }
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void vpmullw(const Xmm& x, const Operand& op) { vpmullw(x, x, op); }
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void vpmuludq(const Xmm& x, const Operand& op) { vpmuludq(x, x, op); }
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void vpor(const Xmm& x, const Operand& op) { vpor(x, x, op); }
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void vpsadbw(const Xmm& x, const Operand& op) { vpsadbw(x, x, op); }
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void vpsignb(const Xmm& x, const Operand& op) { vpsignb(x, x, op); }
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void vpsignd(const Xmm& x, const Operand& op) { vpsignd(x, x, op); }
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void vpsignw(const Xmm& x, const Operand& op) { vpsignw(x, x, op); }
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void vpslld(const Xmm& x, const Operand& op) { vpslld(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vpslld(const Xmm& x, uint8_t imm) { vpslld(x, x, imm); }
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|
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void vpslldq(const Xmm& x, uint8_t imm) { vpslldq(x, x, imm); }
|
2020-04-22 20:25:57 +01:00
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|
|
void vpsllq(const Xmm& x, const Operand& op) { vpsllq(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vpsllq(const Xmm& x, uint8_t imm) { vpsllq(x, x, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vpsllw(const Xmm& x, const Operand& op) { vpsllw(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vpsllw(const Xmm& x, uint8_t imm) { vpsllw(x, x, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vpsrad(const Xmm& x, const Operand& op) { vpsrad(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vpsrad(const Xmm& x, uint8_t imm) { vpsrad(x, x, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vpsraw(const Xmm& x, const Operand& op) { vpsraw(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vpsraw(const Xmm& x, uint8_t imm) { vpsraw(x, x, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vpsrld(const Xmm& x, const Operand& op) { vpsrld(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vpsrld(const Xmm& x, uint8_t imm) { vpsrld(x, x, imm); }
|
|
|
|
void vpsrldq(const Xmm& x, uint8_t imm) { vpsrldq(x, x, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vpsrlq(const Xmm& x, const Operand& op) { vpsrlq(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vpsrlq(const Xmm& x, uint8_t imm) { vpsrlq(x, x, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vpsrlw(const Xmm& x, const Operand& op) { vpsrlw(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vpsrlw(const Xmm& x, uint8_t imm) { vpsrlw(x, x, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vpsubb(const Xmm& x, const Operand& op) { vpsubb(x, x, op); }
|
|
|
|
void vpsubd(const Xmm& x, const Operand& op) { vpsubd(x, x, op); }
|
|
|
|
void vpsubq(const Xmm& x, const Operand& op) { vpsubq(x, x, op); }
|
|
|
|
void vpsubsb(const Xmm& x, const Operand& op) { vpsubsb(x, x, op); }
|
|
|
|
void vpsubsw(const Xmm& x, const Operand& op) { vpsubsw(x, x, op); }
|
|
|
|
void vpsubusb(const Xmm& x, const Operand& op) { vpsubusb(x, x, op); }
|
|
|
|
void vpsubusw(const Xmm& x, const Operand& op) { vpsubusw(x, x, op); }
|
|
|
|
void vpsubw(const Xmm& x, const Operand& op) { vpsubw(x, x, op); }
|
|
|
|
void vpunpckhbw(const Xmm& x, const Operand& op) { vpunpckhbw(x, x, op); }
|
|
|
|
void vpunpckhdq(const Xmm& x, const Operand& op) { vpunpckhdq(x, x, op); }
|
|
|
|
void vpunpckhqdq(const Xmm& x, const Operand& op) { vpunpckhqdq(x, x, op); }
|
|
|
|
void vpunpckhwd(const Xmm& x, const Operand& op) { vpunpckhwd(x, x, op); }
|
|
|
|
void vpunpcklbw(const Xmm& x, const Operand& op) { vpunpcklbw(x, x, op); }
|
|
|
|
void vpunpckldq(const Xmm& x, const Operand& op) { vpunpckldq(x, x, op); }
|
|
|
|
void vpunpcklqdq(const Xmm& x, const Operand& op) { vpunpcklqdq(x, x, op); }
|
|
|
|
void vpunpcklwd(const Xmm& x, const Operand& op) { vpunpcklwd(x, x, op); }
|
|
|
|
void vpxor(const Xmm& x, const Operand& op) { vpxor(x, x, op); }
|
|
|
|
void vrcpss(const Xmm& x, const Operand& op) { vrcpss(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vroundsd(const Xmm& x, const Operand& op, uint8_t imm) { vroundsd(x, x, op, imm); }
|
|
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|
void vroundss(const Xmm& x, const Operand& op, uint8_t imm) { vroundss(x, x, op, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vrsqrtss(const Xmm& x, const Operand& op) { vrsqrtss(x, x, op); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vshufpd(const Xmm& x, const Operand& op, uint8_t imm) { vshufpd(x, x, op, imm); }
|
|
|
|
void vshufps(const Xmm& x, const Operand& op, uint8_t imm) { vshufps(x, x, op, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void vsqrtsd(const Xmm& x, const Operand& op) { vsqrtsd(x, x, op); }
|
|
|
|
void vsqrtss(const Xmm& x, const Operand& op) { vsqrtss(x, x, op); }
|
|
|
|
void vunpckhpd(const Xmm& x, const Operand& op) { vunpckhpd(x, x, op); }
|
|
|
|
void vunpckhps(const Xmm& x, const Operand& op) { vunpckhps(x, x, op); }
|
|
|
|
void vunpcklpd(const Xmm& x, const Operand& op) { vunpcklpd(x, x, op); }
|
|
|
|
void vunpcklps(const Xmm& x, const Operand& op) { vunpcklps(x, x, op); }
|
|
|
|
#endif
|
|
|
|
#ifdef XBYAK64
|
|
|
|
void jecxz(std::string label) { db(0x67); opJmp(label, T_SHORT, 0xe3, 0, 0); }
|
|
|
|
void jecxz(const Label& label) { db(0x67); opJmp(label, T_SHORT, 0xe3, 0, 0); }
|
|
|
|
void jrcxz(std::string label) { opJmp(label, T_SHORT, 0xe3, 0, 0); }
|
|
|
|
void jrcxz(const Label& label) { opJmp(label, T_SHORT, 0xe3, 0, 0); }
|
|
|
|
void cdqe() { db(0x48); db(0x98); }
|
|
|
|
void cqo() { db(0x48); db(0x99); }
|
2020-04-22 20:51:10 +01:00
|
|
|
void cmpsq() { db(0x48); db(0xA7); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void popfq() { db(0x9D); }
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void pushfq() { db(0x9C); }
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void lodsq() { db(0x48); db(0xAD); }
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2020-04-22 20:25:57 +01:00
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void movsq() { db(0x48); db(0xA5); }
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2020-04-22 20:51:10 +01:00
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void scasq() { db(0x48); db(0xAF); }
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void stosq() { db(0x48); db(0xAB); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void syscall() { db(0x0F); db(0x05); }
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void sysret() { db(0x0F); db(0x07); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void clui() { db(0xF3); db(0x0F); db(0x01); db(0xEE); }
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void stui() { db(0xF3); db(0x0F); db(0x01); db(0xEF); }
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void testui() { db(0xF3); db(0x0F); db(0x01); db(0xED); }
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void uiret() { db(0xF3); db(0x0F); db(0x01); db(0xEC); }
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void cmpxchg16b(const Address& addr) { opMR(addr, Reg64(1), T_0F, 0xC7); }
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void fxrstor64(const Address& addr) { opMR(addr, Reg64(1), T_0F, 0xAE); }
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void movq(const Reg64& reg, const Mmx& mmx) { if (mmx.isXMM()) db(0x66); opRR(mmx, reg, T_0F, 0x7E); }
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void movq(const Mmx& mmx, const Reg64& reg) { if (mmx.isXMM()) db(0x66); opRR(mmx, reg, T_0F, 0x6E); }
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void movsxd(const Reg64& reg, const Operand& op) { if (!op.isBit(32)) XBYAK_THROW(ERR_BAD_COMBINATION) opRO(reg, op, 0, 0x63); }
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void pextrq(const Operand& op, const Xmm& xmm, uint8_t imm) { if (!op.isREG(64) && !op.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opSSE(Reg64(xmm.getIdx()), op, T_66 | T_0F3A, 0x16, 0, imm); }
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void pinsrq(const Xmm& xmm, const Operand& op, uint8_t imm) { if (!op.isREG(64) && !op.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opSSE(Reg64(xmm.getIdx()), op, T_66 | T_0F3A, 0x22, 0, imm); }
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void senduipi(const Reg64& r) { opRR(Reg32(6), r.cvt32(), T_F3 | T_0F, 0xC7); }
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2020-04-22 20:25:57 +01:00
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void vcvtss2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F3 | T_W1 | T_EVEX | T_EW1 | T_ER_X | T_N8, 0x2D); }
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void vcvttss2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F3 | T_W1 | T_EVEX | T_EW1 | T_SAE_X | T_N8, 0x2C); }
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void vcvtsd2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F2 | T_W1 | T_EVEX | T_EW1 | T_N4 | T_ER_X, 0x2D); }
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void vcvttsd2si(const Reg64& r, const Operand& op) { opAVX_X_X_XM(Xmm(r.getIdx()), xm0, op, T_0F | T_F2 | T_W1 | T_EVEX | T_EW1 | T_N4 | T_SAE_X, 0x2C); }
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void vmovq(const Xmm& x, const Reg64& r) { opAVX_X_X_XM(x, xm0, Xmm(r.getIdx()), T_66 | T_0F | T_W1 | T_EVEX | T_EW1, 0x6E); }
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void vmovq(const Reg64& r, const Xmm& x) { opAVX_X_X_XM(x, xm0, Xmm(r.getIdx()), T_66 | T_0F | T_W1 | T_EVEX | T_EW1, 0x7E); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void jmpabs(uint64_t addr) { db(0xD5); db(0x00); db(0xA1); dq(addr); }
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void push2(const Reg64& r1, const Reg64& r2) { opROO(r1, r2, Reg64(6), T_APX|T_ND1|T_W0, 0xFF); }
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void push2p(const Reg64& r1, const Reg64& r2) { opROO(r1, r2, Reg64(6), T_APX|T_ND1|T_W1, 0xFF); }
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void pop2(const Reg64& r1, const Reg64& r2) { opROO(r1, r2, Reg64(0), T_APX|T_ND1|T_W0, 0x8F); }
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void pop2p(const Reg64& r1, const Reg64& r2) { opROO(r1, r2, Reg64(0), T_APX|T_ND1|T_W1, 0x8F); }
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void cmpbexadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE6); }
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void cmpbxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE2); }
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void cmplexadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEE); }
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void cmplxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEC); }
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void cmpnbexadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE7); }
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void cmpnbxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE3); }
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void cmpnlexadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEF); }
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void cmpnlxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xED); }
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void cmpnoxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE1); }
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void cmpnpxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEB); }
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void cmpnsxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE9); }
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void cmpnzxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE5); }
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void cmpoxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE0); }
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void cmppxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xEA); }
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void cmpsxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE8); }
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void cmpzxadd(const Address& addr, const Reg32e& r1, const Reg32e& r2) { opRRO(r1, r2, addr, T_APX|T_66|T_0F38, 0xE4); }
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void aesdec128kl(const Xmm& x, const Address& addr) { opSSE_APX(x, addr, T_F3|T_0F38, 0xDD, T_F3|T_MUST_EVEX, 0xDD); }
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void aesdec256kl(const Xmm& x, const Address& addr) { opSSE_APX(x, addr, T_F3|T_0F38, 0xDF, T_F3|T_MUST_EVEX, 0xDF); }
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void aesdecwide128kl(const Address& addr) { opSSE_APX(xmm1, addr, T_F3|T_0F38, 0xD8, T_F3|T_MUST_EVEX, 0xD8); }
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void aesdecwide256kl(const Address& addr) { opSSE_APX(xmm3, addr, T_F3|T_0F38, 0xD8, T_F3|T_MUST_EVEX, 0xD8); }
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void aesenc128kl(const Xmm& x, const Address& addr) { opSSE_APX(x, addr, T_F3|T_0F38, 0xDC, T_F3|T_MUST_EVEX, 0xDC); }
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void aesenc256kl(const Xmm& x, const Address& addr) { opSSE_APX(x, addr, T_F3|T_0F38, 0xDE, T_F3|T_MUST_EVEX, 0xDE); }
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void aesencwide128kl(const Address& addr) { opSSE_APX(xmm0, addr, T_F3|T_0F38, 0xD8, T_F3|T_MUST_EVEX, 0xD8); }
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void aesencwide256kl(const Address& addr) { opSSE_APX(xmm2, addr, T_F3|T_0F38, 0xD8, T_F3|T_MUST_EVEX, 0xD8); }
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void encodekey128(const Reg32& r1, const Reg32& r2) { opEncodeKey(r1, r2, 0xFA, 0xDA); }
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void encodekey256(const Reg32& r1, const Reg32& r2) { opEncodeKey(r1, r2, 0xFB, 0xDB); }
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void ldtilecfg(const Address& addr) { if (opROO(Reg(), addr, tmm0, T_APX|T_0F38|T_W0, 0x49)) return; opVex(tmm0, &tmm0, addr, T_0F38|T_W0, 0x49); }
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void sttilecfg(const Address& addr) { if (opROO(Reg(), addr, tmm0, T_APX|T_66|T_0F38|T_W0, 0x49)) return; opVex(tmm0, &tmm0, addr, T_66|T_0F38 | T_W0, 0x49); }
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void tileloadd(const Tmm& tm, const Address& addr) { opAMX(tm, addr, T_F2|T_0F38|T_W0, 0x4B); }
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void tileloaddt1(const Tmm& tm, const Address& addr) { opAMX(tm, addr, T_66|T_0F38|T_W0, 0x4B); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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|
|
void tilerelease() { db(0xc4); db(0xe2); db(0x78); db(0x49); db(0xc0); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void tilestored(const Address& addr, const Tmm& tm) { if (opROO(Reg(), addr, tm, T_APX|T_F3|T_0F38|T_W0, 0x4B)) return; opVex(tm, &tmm0, addr, T_F3|T_0F38|T_W0, 0x4B); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void tilezero(const Tmm& Tmm) { opVex(Tmm, &tmm0, tmm0, T_F2 | T_0F38 | T_W0, 0x49); }
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void tdpbssd(const Tmm& x1, const Tmm& x2, const Tmm& x3) { opVex(x1, &x3, x2, T_F2 | T_0F38 | T_W0, 0x5e); }
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void tdpbsud(const Tmm& x1, const Tmm& x2, const Tmm& x3) { opVex(x1, &x3, x2, T_F3 | T_0F38 | T_W0, 0x5e); }
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void tdpbusd(const Tmm& x1, const Tmm& x2, const Tmm& x3) { opVex(x1, &x3, x2, T_66 | T_0F38 | T_W0, 0x5e); }
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void tdpbuud(const Tmm& x1, const Tmm& x2, const Tmm& x3) { opVex(x1, &x3, x2, T_0F38 | T_W0, 0x5e); }
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2022-12-30 23:05:02 +00:00
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void tdpfp16ps(const Tmm &x1, const Tmm &x2, const Tmm &x3) { opVex(x1, &x3, x2, T_F2 | T_0F38 | T_W0, 0x5c); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void tdpbf16ps(const Tmm& x1, const Tmm& x2, const Tmm& x3) { opVex(x1, &x3, x2, T_F3 | T_0F38 | T_W0, 0x5c); }
|
2020-04-22 20:25:57 +01:00
|
|
|
#else
|
|
|
|
void jcxz(std::string label) { db(0x67); opJmp(label, T_SHORT, 0xe3, 0, 0); }
|
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|
|
void jcxz(const Label& label) { db(0x67); opJmp(label, T_SHORT, 0xe3, 0, 0); }
|
|
|
|
void jecxz(std::string label) { opJmp(label, T_SHORT, 0xe3, 0, 0); }
|
|
|
|
void jecxz(const Label& label) { opJmp(label, T_SHORT, 0xe3, 0, 0); }
|
|
|
|
void aaa() { db(0x37); }
|
|
|
|
void aad() { db(0xD5); db(0x0A); }
|
|
|
|
void aam() { db(0xD4); db(0x0A); }
|
|
|
|
void aas() { db(0x3F); }
|
|
|
|
void daa() { db(0x27); }
|
|
|
|
void das() { db(0x2F); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void into() { db(0xCE); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void popad() { db(0x61); }
|
|
|
|
void popfd() { db(0x9D); }
|
|
|
|
void pusha() { db(0x60); }
|
|
|
|
void pushad() { db(0x60); }
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|
|
|
void pushfd() { db(0x9C); }
|
|
|
|
void popa() { db(0x61); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
|
|
|
void lds(const Reg& reg, const Address& addr) { opLoadSeg(addr, reg, T_NONE, 0xC5); }
|
|
|
|
void les(const Reg& reg, const Address& addr) { opLoadSeg(addr, reg, T_NONE, 0xC4); }
|
2020-04-22 20:25:57 +01:00
|
|
|
#endif
|
|
|
|
#ifndef XBYAK_NO_OP_NAMES
|
|
|
|
void and(const Operand& op1, const Operand& op2) { and_(op1, op2); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void and(const Operand& op, uint32_t imm) { and_(op, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void or(const Operand& op1, const Operand& op2) { or_(op1, op2); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void or(const Operand& op, uint32_t imm) { or_(op, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void xor(const Operand& op1, const Operand& op2) { xor_(op1, op2); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void xor(const Operand& op, uint32_t imm) { xor_(op, imm); }
|
2020-04-22 20:25:57 +01:00
|
|
|
void not(const Operand& op) { not_(op); }
|
|
|
|
#endif
|
|
|
|
#ifndef XBYAK_DISABLE_AVX512
|
|
|
|
void kaddb(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W0, 0x4A); }
|
|
|
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void kaddd(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W1, 0x4A); }
|
|
|
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void kaddq(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W1, 0x4A); }
|
|
|
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void kaddw(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W0, 0x4A); }
|
|
|
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void kandb(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W0, 0x41); }
|
|
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void kandd(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W1, 0x41); }
|
|
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void kandnb(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W0, 0x42); }
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|
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void kandnd(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W1, 0x42); }
|
|
|
|
void kandnq(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W1, 0x42); }
|
|
|
|
void kandnw(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W0, 0x42); }
|
|
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void kandq(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W1, 0x41); }
|
|
|
|
void kandw(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W0, 0x41); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void kmovb(const Address& addr, const Opmask& k) { opKmov(k, addr, true, 8); }
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void kmovb(const Opmask& k, const Operand& op) { opKmov(k, op, false, 8); }
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void kmovb(const Reg32& r, const Opmask& k) { opKmov(k, r, true, 8); }
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void kmovd(const Address& addr, const Opmask& k) { opKmov(k, addr, true, 32); }
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void kmovd(const Opmask& k, const Operand& op) { opKmov(k, op, false, 32); }
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void kmovd(const Reg32& r, const Opmask& k) { opKmov(k, r, true, 32); }
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void kmovq(const Address& addr, const Opmask& k) { opKmov(k, addr, true, 64); }
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void kmovq(const Opmask& k, const Operand& op) { opKmov(k, op, false, 64); }
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void kmovw(const Address& addr, const Opmask& k) { opKmov(k, addr, true, 16); }
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void kmovw(const Opmask& k, const Operand& op) { opKmov(k, op, false, 16); }
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void kmovw(const Reg32& r, const Opmask& k) { opKmov(k, r, true, 16); }
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2020-04-22 20:25:57 +01:00
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void knotb(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_66 | T_W0, 0x44); }
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void knotd(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_66 | T_W1, 0x44); }
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void knotq(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_W1, 0x44); }
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void knotw(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_W0, 0x44); }
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void korb(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W0, 0x45); }
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void kord(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W1, 0x45); }
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void korq(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W1, 0x45); }
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void kortestb(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_66 | T_W0, 0x98); }
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void kortestd(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_66 | T_W1, 0x98); }
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void kortestq(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_W1, 0x98); }
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void kortestw(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_W0, 0x98); }
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void korw(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W0, 0x45); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void kshiftlb(const Opmask& r1, const Opmask& r2, uint8_t imm) { opVex(r1, 0, r2, T_66 | T_0F3A | T_W0, 0x32, imm); }
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void kshiftld(const Opmask& r1, const Opmask& r2, uint8_t imm) { opVex(r1, 0, r2, T_66 | T_0F3A | T_W0, 0x33, imm); }
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void kshiftlq(const Opmask& r1, const Opmask& r2, uint8_t imm) { opVex(r1, 0, r2, T_66 | T_0F3A | T_W1, 0x33, imm); }
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void kshiftlw(const Opmask& r1, const Opmask& r2, uint8_t imm) { opVex(r1, 0, r2, T_66 | T_0F3A | T_W1, 0x32, imm); }
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void kshiftrb(const Opmask& r1, const Opmask& r2, uint8_t imm) { opVex(r1, 0, r2, T_66 | T_0F3A | T_W0, 0x30, imm); }
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void kshiftrd(const Opmask& r1, const Opmask& r2, uint8_t imm) { opVex(r1, 0, r2, T_66 | T_0F3A | T_W0, 0x31, imm); }
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void kshiftrq(const Opmask& r1, const Opmask& r2, uint8_t imm) { opVex(r1, 0, r2, T_66 | T_0F3A | T_W1, 0x31, imm); }
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void kshiftrw(const Opmask& r1, const Opmask& r2, uint8_t imm) { opVex(r1, 0, r2, T_66 | T_0F3A | T_W1, 0x30, imm); }
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2020-04-22 20:25:57 +01:00
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void ktestb(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_66 | T_W0, 0x99); }
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void ktestd(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_66 | T_W1, 0x99); }
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void ktestq(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_W1, 0x99); }
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void ktestw(const Opmask& r1, const Opmask& r2) { opVex(r1, 0, r2, T_0F | T_W0, 0x99); }
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void kunpckbw(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W0, 0x4B); }
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void kunpckdq(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W1, 0x4B); }
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void kunpckwd(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W0, 0x4B); }
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void kxnorb(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W0, 0x46); }
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void kxnord(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W1, 0x46); }
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void kxnorq(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W1, 0x46); }
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void kxnorw(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W0, 0x46); }
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void kxorb(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W0, 0x47); }
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void kxord(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_66 | T_W1, 0x47); }
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void kxorq(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W1, 0x47); }
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void kxorw(const Opmask& r1, const Opmask& r2, const Opmask& r3) { opVex(r1, &r2, r3, T_L1 | T_0F | T_W0, 0x47); }
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void v4fmaddps(const Zmm& z1, const Zmm& z2, const Address& addr) { opAVX_X_X_XM(z1, z2, addr, T_0F38 | T_F2 | T_EW0 | T_YMM | T_MUST_EVEX | T_N16, 0x9A); }
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void v4fmaddss(const Xmm& x1, const Xmm& x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_F2 | T_EW0 | T_MUST_EVEX | T_N16, 0x9B); }
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void v4fnmaddps(const Zmm& z1, const Zmm& z2, const Address& addr) { opAVX_X_X_XM(z1, z2, addr, T_0F38 | T_F2 | T_EW0 | T_YMM | T_MUST_EVEX | T_N16, 0xAA); }
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void v4fnmaddss(const Xmm& x1, const Xmm& x2, const Address& addr) { opAVX_X_X_XM(x1, x2, addr, T_0F38 | T_F2 | T_EW0 | T_MUST_EVEX | T_N16, 0xAB); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vaddph(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_EW0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x58); }
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void vaddsh(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_EW0 | T_MUST_EVEX | T_ER_X | T_N2, 0x58); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void valignd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX, 0x03, imm); }
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void valignq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x03, imm); }
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void vblendmpd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x65); }
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void vblendmps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x65); }
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2020-04-22 20:25:57 +01:00
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void vbroadcastf32x2(const Ymm& y, const Operand& op) { opAVX_X_XM_IMM(y, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW0 | T_N8, 0x19); }
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void vbroadcastf32x4(const Ymm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW0 | T_N16, 0x1A); }
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void vbroadcastf32x8(const Zmm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW0 | T_N32, 0x1B); }
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void vbroadcastf64x2(const Ymm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1 | T_N16, 0x1A); }
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void vbroadcastf64x4(const Zmm& y, const Address& addr) { opAVX_X_XM_IMM(y, addr, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1 | T_N32, 0x1B); }
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void vbroadcasti32x2(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW0 | T_N8, 0x59); }
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void vbroadcasti32x4(const Ymm& y, const Operand& op) { opAVX_X_XM_IMM(y, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW0 | T_N16, 0x5A); }
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void vbroadcasti32x8(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW0 | T_N32, 0x5B); }
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void vbroadcasti64x2(const Ymm& y, const Operand& op) { opAVX_X_XM_IMM(y, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1 | T_N16, 0x5A); }
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void vbroadcasti64x4(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1 | T_N32, 0x5B); }
|
Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vcmpeq_ospd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 16); }
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void vcmpeq_osps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 16); }
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void vcmpeq_ossd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 16); }
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void vcmpeq_osss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 16); }
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void vcmpeq_uqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 8); }
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void vcmpeq_uqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 8); }
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void vcmpeq_uqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 8); }
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void vcmpeq_uqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 8); }
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void vcmpeq_uspd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 24); }
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void vcmpeq_usps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 24); }
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void vcmpeq_ussd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 24); }
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void vcmpeq_usss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 24); }
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void vcmpeqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 0); }
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void vcmpeqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 0); }
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void vcmpeqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 0); }
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void vcmpeqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 0); }
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void vcmpfalse_ospd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 27); }
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void vcmpfalse_osps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 27); }
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void vcmpfalse_ossd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 27); }
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void vcmpfalse_osss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 27); }
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void vcmpfalsepd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 11); }
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void vcmpfalseps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 11); }
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void vcmpfalsesd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 11); }
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void vcmpfalsess(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 11); }
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void vcmpge_oqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 29); }
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void vcmpge_oqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 29); }
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void vcmpge_oqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 29); }
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void vcmpge_oqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 29); }
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void vcmpgepd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 13); }
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void vcmpgeps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 13); }
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void vcmpgesd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 13); }
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void vcmpgess(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 13); }
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void vcmpgt_oqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 30); }
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void vcmpgt_oqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 30); }
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void vcmpgt_oqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 30); }
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void vcmpgt_oqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 30); }
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void vcmpgtpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 14); }
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void vcmpgtps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 14); }
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void vcmpgtsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 14); }
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void vcmpgtss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 14); }
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void vcmple_oqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 18); }
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void vcmple_oqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 18); }
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void vcmple_oqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 18); }
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void vcmple_oqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 18); }
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void vcmplepd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 2); }
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void vcmpleps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 2); }
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void vcmplesd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 2); }
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void vcmpless(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 2); }
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void vcmplt_oqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 17); }
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void vcmplt_oqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 17); }
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void vcmplt_oqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 17); }
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void vcmplt_oqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 17); }
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void vcmpltpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 1); }
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void vcmpltps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 1); }
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void vcmpltsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 1); }
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void vcmpltss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 1); }
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void vcmpneq_oqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 12); }
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void vcmpneq_oqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 12); }
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void vcmpneq_oqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 12); }
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void vcmpneq_oqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 12); }
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void vcmpneq_ospd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 28); }
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void vcmpneq_osps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 28); }
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void vcmpneq_ossd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 28); }
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void vcmpneq_osss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 28); }
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void vcmpneq_uspd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 20); }
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void vcmpneq_usps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 20); }
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void vcmpneq_ussd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 20); }
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void vcmpneq_usss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 20); }
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void vcmpneqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 4); }
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void vcmpneqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 4); }
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void vcmpneqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 4); }
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void vcmpneqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 4); }
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void vcmpnge_uqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 25); }
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void vcmpnge_uqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 25); }
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void vcmpnge_uqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 25); }
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void vcmpnge_uqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 25); }
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void vcmpngepd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 9); }
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void vcmpngeps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 9); }
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void vcmpngesd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 9); }
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void vcmpngess(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 9); }
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void vcmpngt_uqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 26); }
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void vcmpngt_uqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 26); }
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void vcmpngt_uqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 26); }
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void vcmpngt_uqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 26); }
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void vcmpngtpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 10); }
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void vcmpngtps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 10); }
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void vcmpngtsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 10); }
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void vcmpngtss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 10); }
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void vcmpnle_uqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 22); }
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void vcmpnle_uqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 22); }
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void vcmpnle_uqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 22); }
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void vcmpnle_uqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 22); }
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void vcmpnlepd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 6); }
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void vcmpnleps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 6); }
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void vcmpnlesd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 6); }
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void vcmpnless(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 6); }
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void vcmpnlt_uqpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 21); }
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void vcmpnlt_uqps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 21); }
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void vcmpnlt_uqsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 21); }
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void vcmpnlt_uqss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 21); }
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void vcmpnltpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 5); }
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void vcmpnltps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 5); }
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void vcmpnltsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 5); }
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void vcmpnltss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 5); }
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void vcmpord_spd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 23); }
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void vcmpord_sps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 23); }
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void vcmpord_ssd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 23); }
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void vcmpord_sss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 23); }
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void vcmpordpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 7); }
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void vcmpordps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 7); }
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void vcmpordsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 7); }
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void vcmpordss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 7); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vcmppd(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0xC2, imm); }
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void vcmpph(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_0F3A|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0xC2, imm); }
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void vcmpps(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_0F|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0xC2, imm); }
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void vcmpsd(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_N8|T_F2|T_0F|T_EW1|T_SAE_Z|T_MUST_EVEX, 0xC2, imm); }
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void vcmpsh(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_N2|T_F3|T_0F3A|T_EW0|T_SAE_X|T_MUST_EVEX, 0xC2, imm); }
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void vcmpss(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_N4|T_F3|T_0F|T_EW0|T_SAE_Z|T_MUST_EVEX, 0xC2, imm); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vcmptrue_uspd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 31); }
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void vcmptrue_usps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 31); }
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void vcmptrue_ussd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 31); }
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void vcmptrue_usss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 31); }
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void vcmptruepd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 15); }
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void vcmptrueps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 15); }
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void vcmptruesd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 15); }
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void vcmptruess(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 15); }
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void vcmpunord_spd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 19); }
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void vcmpunord_sps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 19); }
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void vcmpunord_ssd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 19); }
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void vcmpunord_sss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 19); }
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void vcmpunordpd(const Opmask& k, const Xmm& x, const Operand& op) { vcmppd(k, x, op, 3); }
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void vcmpunordps(const Opmask& k, const Xmm& x, const Operand& op) { vcmpps(k, x, op, 3); }
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void vcmpunordsd(const Opmask& k, const Xmm& x, const Operand& op) { vcmpsd(k, x, op, 3); }
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void vcmpunordss(const Opmask& k, const Xmm& x, const Operand& op) { vcmpss(k, x, op, 3); }
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void vcomish(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5 | T_MUST_EVEX | T_EW0 | T_SAE_X | T_N2, 0x2F); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vcompressb(const Operand& op, const Xmm& x) { opAVX_X_XM_IMM(x, op, T_N1|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x63); }
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void vcompresspd(const Operand& op, const Xmm& x) { opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x8A); }
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void vcompressps(const Operand& op, const Xmm& x) { opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x8A); }
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void vcompressw(const Operand& op, const Xmm& x) { opAVX_X_XM_IMM(x, op, T_N2|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x63); }
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void vcvtdq2ph(const Xmm& x, const Operand& op) { checkCvt4(x, op); opCvt(x, op, T_N16|T_N_VL|T_MAP5|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x5B); }
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void vcvtne2ps2bf16(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x72); }
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void vcvtpd2ph(const Xmm& x, const Operand& op) { opCvt5(x, op, T_N16|T_N_VL|T_66|T_MAP5|T_EW1|T_ER_Z|T_MUST_EVEX|T_B64, 0x5A); }
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void vcvtpd2qq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x7B); }
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void vcvtpd2udq(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x79); }
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void vcvtpd2uqq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x79); }
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void vcvtph2dq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_MAP5|T_EW0|T_YMM|T_ER_Y|T_MUST_EVEX|T_B16, 0x5B); }
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void vcvtph2pd(const Xmm& x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_MAP5|T_EW0|T_YMM|T_SAE_X|T_MUST_EVEX|T_B16, 0x5A); }
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void vcvtph2psx(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_MAP6|T_EW0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B16, 0x13); }
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void vcvtph2qq(const Xmm& x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_66|T_MAP5|T_EW0|T_YMM|T_ER_X|T_MUST_EVEX|T_B16, 0x7B); }
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void vcvtph2udq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_MAP5|T_EW0|T_YMM|T_ER_Y|T_MUST_EVEX|T_B16, 0x79); }
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void vcvtph2uqq(const Xmm& x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_66|T_MAP5|T_EW0|T_YMM|T_ER_X|T_MUST_EVEX|T_B16, 0x79); }
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void vcvtph2uw(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x7D); }
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void vcvtph2w(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x7D); }
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void vcvtps2phx(const Xmm& x, const Operand& op) { checkCvt4(x, op); opCvt(x, op, T_N16|T_N_VL|T_66|T_MAP5|T_EW0|T_ER_Z|T_MUST_EVEX|T_B32, 0x1D); }
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void vcvtps2qq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_0F|T_EW0|T_YMM|T_ER_Y|T_MUST_EVEX|T_B32, 0x7B); }
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void vcvtps2udq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_0F|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x79); }
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void vcvtps2uqq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_0F|T_EW0|T_YMM|T_ER_Y|T_MUST_EVEX|T_B32, 0x79); }
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void vcvtqq2pd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0xE6); }
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void vcvtqq2ph(const Xmm& x, const Operand& op) { opCvt5(x, op, T_N16|T_N_VL|T_MAP5|T_EW1|T_ER_Z|T_MUST_EVEX|T_B64, 0x5B); }
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void vcvtqq2ps(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x5B); }
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void vcvtsd2sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_F2|T_MAP5|T_EW1|T_ER_X|T_MUST_EVEX, 0x5A); }
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void vcvtsd2usi(const Reg32e& r, const Operand& op) { uint64_t type = (T_N8|T_F2|T_0F|T_ER_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x79); }
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void vcvtsh2sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_F3|T_MAP5|T_EW0|T_SAE_X|T_MUST_EVEX, 0x5A); }
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void vcvtsh2si(const Reg32e& r, const Operand& op) { uint64_t type = (T_N2|T_F3|T_MAP5|T_ER_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x2D); }
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void vcvtsh2ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_MAP6|T_EW0|T_SAE_X|T_MUST_EVEX, 0x13); }
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void vcvtsh2usi(const Reg32e& r, const Operand& op) { uint64_t type = (T_N2|T_F3|T_MAP5|T_ER_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x79); }
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void vcvtsi2sh(const Xmm& x1, const Xmm& x2, const Operand& op) { if (!(x1.isXMM() && x2.isXMM() && op.isBit(32|64))) XBYAK_THROW(ERR_BAD_COMBINATION) uint64_t type = (T_F3|T_MAP5|T_ER_R|T_MUST_EVEX|T_M_K) | (op.isBit(32) ? (T_EW0 | T_N4) : (T_EW1 | T_N8)); opVex(x1, &x2, op, type, 0x2A); }
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void vcvtss2sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_MAP5|T_EW0|T_ER_X|T_MUST_EVEX, 0x1D); }
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void vcvtss2usi(const Reg32e& r, const Operand& op) { uint64_t type = (T_N4|T_F3|T_0F|T_ER_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x79); }
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void vcvttpd2qq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x7A); }
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void vcvttpd2udq(const Xmm& x, const Operand& op) { opCvt2(x, op, T_0F|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x78); }
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void vcvttpd2uqq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x78); }
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void vcvttph2dq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_F3|T_MAP5|T_EW0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B16, 0x5B); }
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void vcvttph2qq(const Xmm& x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_66|T_MAP5|T_EW0|T_YMM|T_SAE_X|T_MUST_EVEX|T_B16, 0x7A); }
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void vcvttph2udq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_MAP5|T_EW0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B16, 0x78); }
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void vcvttph2uqq(const Xmm& x, const Operand& op) { if (!op.isXMM() && !op.isMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(x, 0, op, T_N4|T_N_VL|T_66|T_MAP5|T_EW0|T_YMM|T_SAE_X|T_MUST_EVEX|T_B16, 0x78); }
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void vcvttph2uw(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x7C); }
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void vcvttph2w(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP5|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x7C); }
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void vcvttps2qq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_0F|T_EW0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B32, 0x7A); }
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void vcvttps2udq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_0F|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x78); }
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void vcvttps2uqq(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_66|T_0F|T_EW0|T_YMM|T_SAE_Y|T_MUST_EVEX|T_B32, 0x78); }
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void vcvttsd2usi(const Reg32e& r, const Operand& op) { uint64_t type = (T_N8|T_F2|T_0F|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x78); }
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void vcvttsh2si(const Reg32e& r, const Operand& op) { uint64_t type = (T_N2|T_F3|T_MAP5|T_EW0|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x2C); }
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void vcvttsh2usi(const Reg32e& r, const Operand& op) { uint64_t type = (T_N2|T_F3|T_MAP5|T_EW0|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x78); }
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void vcvttss2usi(const Reg32e& r, const Operand& op) { uint64_t type = (T_N4|T_F3|T_0F|T_SAE_X|T_MUST_EVEX) | (r.isREG(64) ? T_EW1 : T_EW0); opVex(r, &xm0, op, type, 0x78); }
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void vcvtudq2pd(const Xmm& x, const Operand& op) { checkCvt1(x, op); opVex(x, 0, op, T_N8|T_N_VL|T_F3|T_0F|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x7A); }
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void vcvtudq2ph(const Xmm& x, const Operand& op) { checkCvt4(x, op); opCvt(x, op, T_N16|T_N_VL|T_F2|T_MAP5|T_EW0|T_ER_Z|T_MUST_EVEX|T_B32, 0x7A); }
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void vcvtudq2ps(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_0F|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x7A); }
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void vcvtuqq2pd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x7A); }
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void vcvtuqq2ph(const Xmm& x, const Operand& op) { opCvt5(x, op, T_N16|T_N_VL|T_F2|T_MAP5|T_EW1|T_ER_Z|T_MUST_EVEX|T_B64, 0x7A); }
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void vcvtuqq2ps(const Xmm& x, const Operand& op) { opCvt2(x, op, T_F2|T_0F|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x7A); }
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2020-04-22 20:25:57 +01:00
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void vcvtusi2sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt3(x1, x2, op, T_F2 | T_0F | T_MUST_EVEX, T_W1 | T_EW1 | T_ER_X | T_N8, T_W0 | T_EW0 | T_N4, 0x7B); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vcvtusi2sh(const Xmm& x1, const Xmm& x2, const Operand& op) { if (!(x1.isXMM() && x2.isXMM() && op.isBit(32|64))) XBYAK_THROW(ERR_BAD_COMBINATION) uint64_t type = (T_F3|T_MAP5|T_ER_R|T_MUST_EVEX|T_M_K) | (op.isBit(32) ? (T_EW0 | T_N4) : (T_EW1 | T_N8)); opVex(x1, &x2, op, type, 0x7B); }
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2020-04-22 20:25:57 +01:00
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void vcvtusi2ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opCvt3(x1, x2, op, T_F3 | T_0F | T_MUST_EVEX | T_ER_X, T_W1 | T_EW1 | T_N8, T_W0 | T_EW0 | T_N4, 0x7B); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vcvtuw2ph(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_MAP5|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x7D); }
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void vcvtw2ph(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_MAP5|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x7D); }
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void vdbpsadbw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX, 0x42, imm); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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|
|
void vdivph(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_EW0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x5E); }
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void vdivsh(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_EW0 | T_MUST_EVEX | T_ER_X | T_N2, 0x5E); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vdpbf16ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x52); }
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2020-04-22 20:25:57 +01:00
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void vexp2pd(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1 | T_B64 | T_SAE_Z, 0xC8); }
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void vexp2ps(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW0 | T_B32 | T_SAE_Z, 0xC8); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vexpandpd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x88); }
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void vexpandps(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x88); }
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void vextractf32x4(const Operand& op, const Ymm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::XMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N16|T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX, 0x19, imm); }
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void vextractf32x8(const Operand& op, const Zmm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N32|T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX, 0x1B, imm); }
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void vextractf64x2(const Operand& op, const Ymm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::XMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N16|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x19, imm); }
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void vextractf64x4(const Operand& op, const Zmm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N32|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x1B, imm); }
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void vextracti32x4(const Operand& op, const Ymm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::XMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N16|T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX, 0x39, imm); }
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void vextracti32x8(const Operand& op, const Zmm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N32|T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX, 0x3B, imm); }
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void vextracti64x2(const Operand& op, const Ymm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::XMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N16|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x39, imm); }
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void vextracti64x4(const Operand& op, const Zmm& r, uint8_t imm) { if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r, 0, op, T_N32|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x3B, imm); }
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void vfcmaddcph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x56); }
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void vfcmulcph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F2|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0xD6); }
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void vfixupimmpd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x54, imm); }
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void vfixupimmps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x54, imm); }
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void vfixupimmsd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_Z|T_MUST_EVEX, 0x55, imm); }
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void vfixupimmss(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_EW0|T_SAE_Z|T_MUST_EVEX, 0x55, imm); }
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void vfmadd132ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x98); }
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void vfmadd132sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0x99); }
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void vfmadd213ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xA8); }
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void vfmadd213sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0xA9); }
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void vfmadd231ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xB8); }
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void vfmadd231sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0xB9); }
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void vfmaddcph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x56); }
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void vfmaddsub132ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x96); }
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void vfmaddsub213ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xA6); }
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void vfmaddsub231ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xB6); }
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void vfmsub132ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x9A); }
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void vfmsub132sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0x9B); }
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void vfmsub213ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xAA); }
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void vfmsub213sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0xAB); }
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void vfmsub231ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xBA); }
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void vfmsub231sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0xBB); }
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void vfmsubadd132ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x97); }
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void vfmsubadd213ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xA7); }
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void vfmsubadd231ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xB7); }
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void vfmulcph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_F3|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0xD6); }
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void vfnmadd132ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x9C); }
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void vfnmadd132sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0x9D); }
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void vfnmadd213ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xAC); }
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void vfnmadd213sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0xAD); }
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void vfnmadd231ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xBC); }
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void vfnmadd231sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0xBD); }
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void vfnmsub132ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x9E); }
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void vfnmsub132sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0x9F); }
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void vfnmsub213ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xAE); }
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void vfnmsub213sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0xAF); }
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void vfnmsub231ph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0xBE); }
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void vfnmsub231sh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0xBF); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
|
|
|
void vfpclasspd(const Opmask& k, const Operand& op, uint8_t imm) { if (!op.isBit(128|256|512)) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(k.changeBit(op.getBit()), 0, op, T_66 | T_0F3A | T_MUST_EVEX | T_YMM | T_EW1 | T_B64, 0x66, imm); }
|
Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vfpclassph(const Opmask& k, const Operand& op, uint8_t imm) { if (!op.isBit(128|256|512)) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(k.changeBit(op.getBit()), 0, op, T_0F3A | T_MUST_EVEX | T_YMM | T_EW0 | T_B16, 0x66, imm); }
|
Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vfpclassps(const Opmask& k, const Operand& op, uint8_t imm) { if (!op.isBit(128|256|512)) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(k.changeBit(op.getBit()), 0, op, T_66 | T_0F3A | T_MUST_EVEX | T_YMM | T_EW0 | T_B32, 0x66, imm); }
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void vfpclasssd(const Opmask& k, const Operand& op, uint8_t imm) { if (!op.isXMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(k, 0, op, T_66 | T_0F3A | T_MUST_EVEX | T_EW1 | T_N8, 0x67, imm); }
|
Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vfpclasssh(const Opmask& k, const Operand& op, uint8_t imm) { if (!op.isXMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(k, 0, op, T_0F3A | T_MUST_EVEX | T_EW0 | T_N2, 0x67, imm); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vfpclassss(const Opmask& k, const Operand& op, uint8_t imm) { if (!op.isXMEM()) XBYAK_THROW(ERR_BAD_MEM_SIZE) opVex(k, 0, op, T_66 | T_0F3A | T_MUST_EVEX | T_EW0 | T_N4, 0x67, imm); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vgatherdpd(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_VSIB, 0x92, 1); }
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void vgatherdps(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_VSIB, 0x92, 0); }
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void vgatherpf0dpd(const Address& addr) { opGatherFetch(addr, zm1, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::YMM); }
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void vgatherpf0dps(const Address& addr) { opGatherFetch(addr, zm1, T_N4|T_66|T_0F38|T_EW0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::ZMM); }
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void vgatherpf0qpd(const Address& addr) { opGatherFetch(addr, zm1, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); }
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void vgatherpf0qps(const Address& addr) { opGatherFetch(addr, zm1, T_N4|T_66|T_0F38|T_EW0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); }
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void vgatherpf1dpd(const Address& addr) { opGatherFetch(addr, zm2, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::YMM); }
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void vgatherpf1dps(const Address& addr) { opGatherFetch(addr, zm2, T_N4|T_66|T_0F38|T_EW0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::ZMM); }
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void vgatherpf1qpd(const Address& addr) { opGatherFetch(addr, zm2, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); }
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void vgatherpf1qps(const Address& addr) { opGatherFetch(addr, zm2, T_N4|T_66|T_0F38|T_EW0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); }
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void vgatherqpd(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_VSIB, 0x93, 0); }
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void vgatherqps(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_VSIB, 0x93, 2); }
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void vgetexppd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x42); }
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void vgetexpph(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP6|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x42); }
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void vgetexpps(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x42); }
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void vgetexpsd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_SAE_X|T_MUST_EVEX, 0x43); }
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void vgetexpsh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_SAE_X|T_MUST_EVEX, 0x43); }
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void vgetexpss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_EW0|T_SAE_X|T_MUST_EVEX, 0x43); }
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void vgetmantpd(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x26, imm); }
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void vgetmantph(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_0F3A|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x26, imm); }
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void vgetmantps(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x26, imm); }
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void vgetmantsd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x27, imm); }
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void vgetmantsh(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N2|T_0F3A|T_EW0|T_SAE_X|T_MUST_EVEX, 0x27, imm); }
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void vgetmantss(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_EW0|T_SAE_X|T_MUST_EVEX, 0x27, imm); }
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void vinsertf32x4(const Ymm& r1, const Ymm& r2, const Operand& op, uint8_t imm) {if (!(r1.getKind() == r2.getKind() && op.is(Operand::MEM | Operand::XMM))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N16|T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX, 0x18, imm); }
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void vinsertf32x8(const Zmm& r1, const Zmm& r2, const Operand& op, uint8_t imm) {if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N32|T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX, 0x1A, imm); }
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void vinsertf64x2(const Ymm& r1, const Ymm& r2, const Operand& op, uint8_t imm) {if (!(r1.getKind() == r2.getKind() && op.is(Operand::MEM | Operand::XMM))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N16|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x18, imm); }
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void vinsertf64x4(const Zmm& r1, const Zmm& r2, const Operand& op, uint8_t imm) {if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N32|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x1A, imm); }
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void vinserti32x4(const Ymm& r1, const Ymm& r2, const Operand& op, uint8_t imm) {if (!(r1.getKind() == r2.getKind() && op.is(Operand::MEM | Operand::XMM))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N16|T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX, 0x38, imm); }
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void vinserti32x8(const Zmm& r1, const Zmm& r2, const Operand& op, uint8_t imm) {if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N32|T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX, 0x3A, imm); }
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void vinserti64x2(const Ymm& r1, const Ymm& r2, const Operand& op, uint8_t imm) {if (!(r1.getKind() == r2.getKind() && op.is(Operand::MEM | Operand::XMM))) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N16|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x38, imm); }
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void vinserti64x4(const Zmm& r1, const Zmm& r2, const Operand& op, uint8_t imm) {if (!op.is(Operand::MEM | Operand::YMM)) XBYAK_THROW(ERR_BAD_COMBINATION) opVex(r1, &r2, op, T_N32|T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x3A, imm); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vmaxph(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_EW0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x5F); }
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void vmaxsh(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_EW0 | T_MUST_EVEX | T_ER_X | T_N2, 0x5F); }
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void vminph(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_EW0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x5D); }
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void vminsh(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_EW0 | T_MUST_EVEX | T_ER_X | T_N2, 0x5D); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vmovdqa32(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_66|T_0F|T_EW0|T_YMM|T_ER_X|T_ER_Y|T_ER_Z|T_MUST_EVEX|T_M_K, 0x7F); }
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void vmovdqa32(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW0|T_YMM|T_ER_X|T_ER_Y|T_ER_Z|T_MUST_EVEX, 0x6F); }
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void vmovdqa64(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_66|T_0F|T_EW1|T_YMM|T_ER_X|T_ER_Y|T_ER_Z|T_MUST_EVEX|T_M_K, 0x7F); }
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void vmovdqa64(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F|T_EW1|T_YMM|T_ER_X|T_ER_Y|T_ER_Z|T_MUST_EVEX, 0x6F); }
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void vmovdqu16(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_F2|T_0F|T_EW1|T_YMM|T_ER_X|T_ER_Y|T_ER_Z|T_MUST_EVEX|T_M_K, 0x7F); }
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void vmovdqu16(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_0F|T_EW1|T_YMM|T_ER_X|T_ER_Y|T_ER_Z|T_MUST_EVEX, 0x6F); }
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void vmovdqu32(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_F3|T_0F|T_EW0|T_YMM|T_ER_X|T_ER_Y|T_ER_Z|T_MUST_EVEX|T_M_K, 0x7F); }
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void vmovdqu32(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_0F|T_EW0|T_YMM|T_ER_X|T_ER_Y|T_ER_Z|T_MUST_EVEX, 0x6F); }
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void vmovdqu64(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_F3|T_0F|T_EW1|T_YMM|T_ER_X|T_ER_Y|T_ER_Z|T_MUST_EVEX|T_M_K, 0x7F); }
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void vmovdqu64(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F3|T_0F|T_EW1|T_YMM|T_ER_X|T_ER_Y|T_ER_Z|T_MUST_EVEX, 0x6F); }
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void vmovdqu8(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_F2|T_0F|T_EW0|T_YMM|T_ER_X|T_ER_Y|T_ER_Z|T_MUST_EVEX|T_M_K, 0x7F); }
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void vmovdqu8(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_F2|T_0F|T_EW0|T_YMM|T_ER_X|T_ER_Y|T_ER_Z|T_MUST_EVEX, 0x6F); }
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void vmovsh(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_N2|T_F3|T_MAP5|T_EW0|T_MUST_EVEX|T_M_K, 0x11); }
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void vmovsh(const Xmm& x, const Address& addr) { opAVX_X_X_XM(x, xm0, addr, T_N2|T_F3|T_MAP5|T_EW0|T_MUST_EVEX, 0x10); }
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void vmovsh(const Xmm& x1, const Xmm& x2, const Xmm& x3) { opAVX_X_X_XM(x1, x2, x3, T_N2|T_F3|T_MAP5|T_EW0|T_MUST_EVEX, 0x10); }
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void vmovw(const Address& addr, const Xmm& x) { opAVX_X_XM_IMM(x, addr, T_N2|T_66|T_MAP5|T_MUST_EVEX, 0x7E); }
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void vmovw(const Reg32e& r, const Xmm& x) { opAVX_X_X_XM(x, xm0, r, T_N2|T_66|T_MAP5|T_MUST_EVEX, 0x7E); }
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void vmovw(const Xmm& x, const Operand& op) { if (!op.isREG(32|64) && !op.isMEM()) XBYAK_THROW(ERR_BAD_COMBINATION) opAVX_X_X_XM(x, xm0, op, T_N2|T_66|T_MAP5|T_MUST_EVEX, 0x6E); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vmulph(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_EW0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x59); }
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void vmulsh(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_EW0 | T_MUST_EVEX | T_ER_X | T_N2, 0x59); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vp2intersectd(const Opmask& k, const Xmm& x, const Operand& op) { if (k.getOpmaskIdx() != 0) XBYAK_THROW(ERR_OPMASK_IS_ALREADY_SET) opAVX_K_X_XM(k, x, op, T_F2 | T_0F38 | T_YMM | T_EVEX | T_EW0 | T_B32, 0x68); }
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void vp2intersectq(const Opmask& k, const Xmm& x, const Operand& op) { if (k.getOpmaskIdx() != 0) XBYAK_THROW(ERR_OPMASK_IS_ALREADY_SET) opAVX_K_X_XM(k, x, op, T_F2 | T_0F38 | T_YMM | T_EVEX | T_EW1 | T_B64, 0x68); }
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2020-04-22 20:25:57 +01:00
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void vp4dpwssd(const Zmm& z1, const Zmm& z2, const Address& addr) { opAVX_X_X_XM(z1, z2, addr, T_0F38 | T_F2 | T_EW0 | T_YMM | T_MUST_EVEX | T_N16, 0x52); }
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void vp4dpwssds(const Zmm& z1, const Zmm& z2, const Address& addr) { opAVX_X_X_XM(z1, z2, addr, T_0F38 | T_F2 | T_EW0 | T_YMM | T_MUST_EVEX | T_N16, 0x53); }
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void vpabsq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66 | T_0F38 | T_MUST_EVEX | T_EW1 | T_B64 | T_YMM, 0x1F); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vpandd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0xDB); }
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void vpandnd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0xDF); }
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void vpandnq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xDF); }
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void vpandq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xDB); }
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void vpblendmb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x66); }
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void vpblendmd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x64); }
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void vpblendmq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x64); }
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void vpblendmw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x66); }
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void vpbroadcastb(const Xmm& x, const Reg8& r) { opVex(x, 0, r, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x7A); }
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void vpbroadcastd(const Xmm& x, const Reg32& r) { opVex(x, 0, r, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x7C); }
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2020-04-22 20:25:57 +01:00
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void vpbroadcastmb2q(const Xmm& x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW1, 0x2A); }
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void vpbroadcastmw2d(const Xmm& x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_YMM | T_MUST_EVEX | T_EW0, 0x3A); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vpbroadcastw(const Xmm& x, const Reg16& r) { opVex(x, 0, r, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x7B); }
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void vpcmpb(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX, 0x3F, imm); }
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void vpcmpd(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x1F, imm); }
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void vpcmpeqb(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX, 0x74); }
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void vpcmpeqd(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX|T_B32, 0x76); }
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void vpcmpeqq(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x29); }
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void vpcmpeqw(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX, 0x75); }
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void vpcmpgtb(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX, 0x64); }
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void vpcmpgtd(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x66); }
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void vpcmpgtq(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x37); }
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void vpcmpgtw(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F|T_YMM|T_MUST_EVEX, 0x65); }
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void vpcmpq(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x1F, imm); }
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void vpcmpub(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX, 0x3E, imm); }
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void vpcmpud(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x1E, imm); }
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void vpcmpuq(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x1E, imm); }
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void vpcmpuw(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x3E, imm); }
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void vpcmpw(const Opmask& k, const Xmm& x, const Operand& op, uint8_t imm) { opAVX_K_X_XM(k, x, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX, 0x3F, imm); }
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void vpcompressd(const Operand& op, const Xmm& x) { opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x8B); }
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void vpcompressq(const Operand& op, const Xmm& x) { opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x8B); }
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void vpconflictd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0xC4); }
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void vpconflictq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xC4); }
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void vpermb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x8D); }
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void vpermi2b(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x75); }
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void vpermi2d(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x76); }
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void vpermi2pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x77); }
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void vpermi2ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x77); }
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void vpermi2q(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x76); }
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void vpermi2w(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x75); }
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void vpermt2b(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x7D); }
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void vpermt2d(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x7E); }
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void vpermt2pd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x7F); }
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void vpermt2ps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x7F); }
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void vpermt2q(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x7E); }
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void vpermt2w(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x7D); }
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void vpermw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x8D); }
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void vpexpandb(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N1|T_66|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x62); }
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void vpexpandd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x89); }
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void vpexpandq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x89); }
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void vpexpandw(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_N2|T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x62); }
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void vpgatherdd(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_VSIB, 0x90, 0); }
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void vpgatherdq(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_VSIB, 0x90, 1); }
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void vpgatherqd(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_VSIB, 0x91, 2); }
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void vpgatherqq(const Xmm& x, const Address& addr) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_VSIB, 0x91, 0); }
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void vplzcntd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x44); }
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void vplzcntq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x44); }
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void vpmaxsq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x3D); }
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void vpmaxuq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x3F); }
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void vpminsq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x39); }
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void vpminuq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x3B); }
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2020-04-22 20:25:57 +01:00
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void vpmovb2m(const Opmask& k, const Xmm& x) { opVex(k, 0, x, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW0, 0x29); }
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void vpmovd2m(const Opmask& k, const Xmm& x) { opVex(k, 0, x, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW0, 0x39); }
|
Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vpmovdb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x31, false); }
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void vpmovdw(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x33, true); }
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2020-04-22 20:25:57 +01:00
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void vpmovm2b(const Xmm& x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW0, 0x28); }
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void vpmovm2d(const Xmm& x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW0, 0x38); }
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void vpmovm2q(const Xmm& x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1, 0x38); }
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void vpmovm2w(const Xmm& x, const Opmask& k) { opVex(x, 0, k, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1, 0x28); }
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void vpmovq2m(const Opmask& k, const Xmm& x) { opVex(k, 0, x, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1, 0x39); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vpmovqb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N2|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x32, false); }
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void vpmovqd(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x35, true); }
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void vpmovqw(const Operand& op, const Xmm& x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x34, false); }
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void vpmovsdb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x21, false); }
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void vpmovsdw(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x23, true); }
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void vpmovsqb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N2|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x22, false); }
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void vpmovsqd(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x25, true); }
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void vpmovsqw(const Operand& op, const Xmm& x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x24, false); }
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void vpmovswb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x20, true); }
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void vpmovusdb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x11, false); }
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void vpmovusdw(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x13, true); }
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void vpmovusqb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N2|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x12, false); }
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void vpmovusqd(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x15, true); }
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void vpmovusqw(const Operand& op, const Xmm& x) { opVmov(op, x, T_N4|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x14, false); }
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void vpmovuswb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x10, true); }
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2020-04-22 20:25:57 +01:00
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void vpmovw2m(const Opmask& k, const Xmm& x) { opVex(k, 0, x, T_F3 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1, 0x29); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vpmovwb(const Operand& op, const Xmm& x) { opVmov(op, x, T_N8|T_N_VL|T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K, 0x30, true); }
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void vpmullq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x40); }
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void vpmultishiftqb(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x83); }
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void vpopcntb(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x54); }
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void vpopcntd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x55); }
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void vpopcntq(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x55); }
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void vpopcntw(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x54); }
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void vpord(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0xEB); }
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void vporq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xEB); }
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void vprold(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 1), x, op, T_66|T_0F|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x72, imm); }
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void vprolq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 1), x, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x72, imm); }
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void vprolvd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x15); }
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void vprolvq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x15); }
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void vprord(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 0), x, op, T_66|T_0F|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x72, imm); }
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void vprorq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 0), x, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x72, imm); }
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void vprorvd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x14); }
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void vprorvq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x14); }
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void vpscatterdd(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA0, 0); }
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void vpscatterdq(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA0, 1); }
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void vpscatterqd(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA1, 2); }
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void vpscatterqq(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA1, 0); }
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void vpshldd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x71, imm); }
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void vpshldq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x71, imm); }
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void vpshldvd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x71); }
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void vpshldvq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x71); }
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void vpshldvw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x70); }
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void vpshldw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x70, imm); }
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void vpshrdd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x73, imm); }
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void vpshrdq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x73, imm); }
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void vpshrdvd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x73); }
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void vpshrdvq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x73); }
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void vpshrdvw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x72); }
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void vpshrdw(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX, 0x72, imm); }
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Squashed 'externals/xbyak/' changes from d512551e..2794cde7
2794cde7 add xword, yword, etc. in Xbyak::util
fb9c04e4 fix document for vfpclassps
a51be78b fix test dependency
04fdfb1e update version
e6354f8b add vgf2p8mulb
09a12642 add gf2p8affineqb
d171ba0e add gf2p8affineinvqb
457f4fd0 add vpshufbitqmb
5af0ba39 add vpexpand{b,w}
e450f965 vpopcnt{d,q} supports ptr_b
48499eb1 add vpdpbusd(s), vpdpwssd(s)
9c745109 add vpdpbusd, vpdpbusds
0e1a11b4 add vpopcnt{b,w,d,q}
9acfc132 add vpshrd(v){w,d,q}
ac8de850 add vpshld(v){w,d,q}
f181c259 add vcompressb, vcompressw
5a402477 vpclmulqdq supports AVX-512
9e16b40b vaes* supports AVX-512
7fde08e0 add flags for intel's manual 319433-030.pdf
c5da3778 add test of v4fmaddps, vp4dpwssd, etc.
e4fc9d8a fix mpx encoding
d0b2fb62 add bnd(0xf2) prefix for MPX
f12b5678 use db for array
cd74ab44 remove bat file
git-subtree-dir: externals/xbyak
git-subtree-split: 2794cde79eb71e86490061cac9622ad0067b8d15
2020-04-22 20:45:52 +01:00
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void vpshufbitqmb(const Opmask& k, const Xmm& x, const Operand& op) { opVex(k, &x, op, T_66 | T_0F38 | T_EW0 | T_YMM | T_MUST_EVEX, 0x8F); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vpsllvw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x12); }
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void vpsraq(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_X_XM(Xmm(x.getKind(), 4), x, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x72, imm); }
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void vpsraq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N16|T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX, 0xE2); }
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void vpsravq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x46); }
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void vpsravw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x11); }
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void vpsrlvw(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x10); }
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void vpternlogd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x25, imm); }
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void vpternlogq(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x25, imm); }
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void vptestmb(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x26); }
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void vptestmd(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x27); }
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void vptestmq(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x27); }
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void vptestmw(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x26); }
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void vptestnmb(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x26); }
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void vptestnmd(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_F3|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x27); }
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void vptestnmq(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_F3|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x27); }
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void vptestnmw(const Opmask& k, const Xmm& x, const Operand& op) { opAVX_K_X_XM(k, x, op, T_F3|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x26); }
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void vpxord(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0xEF); }
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void vpxorq(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0xEF); }
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void vrangepd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x50, imm); }
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void vrangeps(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F3A|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x50, imm); }
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void vrangesd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x51, imm); }
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void vrangess(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_EW0|T_SAE_X|T_MUST_EVEX, 0x51, imm); }
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void vrcp14pd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x4C); }
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void vrcp14ps(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x4C); }
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void vrcp14sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX, 0x4D); }
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void vrcp14ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_EW0|T_MUST_EVEX, 0x4D); }
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2020-04-22 20:25:57 +01:00
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void vrcp28pd(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1 | T_B64 | T_SAE_Z, 0xCA); }
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void vrcp28ps(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW0 | T_B32 | T_SAE_Z, 0xCA); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vrcp28sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_SAE_X|T_MUST_EVEX, 0xCB); }
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void vrcp28ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_EW0|T_SAE_X|T_MUST_EVEX, 0xCB); }
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void vrcpph(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP6|T_EW0|T_YMM|T_MUST_EVEX|T_B16, 0x4C); }
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void vrcpsh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_MUST_EVEX, 0x4D); }
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void vreducepd(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x56, imm); }
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void vreduceph(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_0F3A|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x56, imm); }
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void vreduceps(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x56, imm); }
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void vreducesd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x57, imm); }
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void vreducesh(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N2|T_0F3A|T_EW0|T_SAE_X|T_MUST_EVEX, 0x57, imm); }
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void vreducess(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_EW0|T_SAE_X|T_MUST_EVEX, 0x57, imm); }
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void vrndscalepd(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_EW1|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B64, 0x09, imm); }
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void vrndscaleph(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_0F3A|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B16, 0x08, imm); }
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void vrndscaleps(const Xmm& x, const Operand& op, uint8_t imm) { opAVX_X_XM_IMM(x, op, T_66|T_0F3A|T_EW0|T_YMM|T_SAE_Z|T_MUST_EVEX|T_B32, 0x08, imm); }
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void vrndscalesd(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F3A|T_EW1|T_SAE_X|T_MUST_EVEX, 0x0B, imm); }
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void vrndscalesh(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N2|T_0F3A|T_EW0|T_SAE_X|T_MUST_EVEX, 0x0A, imm); }
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void vrndscaless(const Xmm& x1, const Xmm& x2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F3A|T_EW0|T_SAE_X|T_MUST_EVEX, 0x0A, imm); }
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void vrsqrt14pd(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_B64, 0x4E); }
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void vrsqrt14ps(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_B32, 0x4E); }
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void vrsqrt14sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x4F); }
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void vrsqrt14ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX, 0x4F); }
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2020-04-22 20:25:57 +01:00
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void vrsqrt28pd(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW1 | T_B64 | T_SAE_Z, 0xCC); }
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void vrsqrt28ps(const Zmm& z, const Operand& op) { opAVX_X_XM_IMM(z, op, T_66 | T_0F38 | T_MUST_EVEX | T_YMM | T_EW0 | T_B32 | T_SAE_Z, 0xCC); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vrsqrt28sd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_SAE_X|T_MUST_EVEX, 0xCD); }
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void vrsqrt28ss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_EW0|T_SAE_X|T_MUST_EVEX, 0xCD); }
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void vrsqrtph(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_66|T_MAP6|T_EW0|T_YMM|T_MUST_EVEX|T_B16, 0x4E); }
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void vrsqrtsh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_MUST_EVEX, 0x4F); }
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void vscalefpd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW1|T_YMM|T_ER_Z|T_MUST_EVEX|T_B64, 0x2C); }
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void vscalefph(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_MAP6|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x2C); }
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void vscalefps(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_66|T_0F38|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B32, 0x2C); }
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void vscalefsd(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N8|T_66|T_0F38|T_EW1|T_ER_X|T_MUST_EVEX, 0x2D); }
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void vscalefsh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_66|T_MAP6|T_EW0|T_ER_X|T_MUST_EVEX, 0x2D); }
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void vscalefss(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N4|T_66|T_0F38|T_EW0|T_ER_X|T_MUST_EVEX, 0x2D); }
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void vscatterdpd(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA2, 1); }
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void vscatterdps(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA2, 0); }
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void vscatterpf0dpd(const Address& addr) { opGatherFetch(addr, zm5, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::YMM); }
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void vscatterpf0dps(const Address& addr) { opGatherFetch(addr, zm5, T_N4|T_66|T_0F38|T_EW0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::ZMM); }
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void vscatterpf0qpd(const Address& addr) { opGatherFetch(addr, zm5, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); }
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void vscatterpf0qps(const Address& addr) { opGatherFetch(addr, zm5, T_N4|T_66|T_0F38|T_EW0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); }
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void vscatterpf1dpd(const Address& addr) { opGatherFetch(addr, zm6, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::YMM); }
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void vscatterpf1dps(const Address& addr) { opGatherFetch(addr, zm6, T_N4|T_66|T_0F38|T_EW0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC6, Operand::ZMM); }
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void vscatterpf1qpd(const Address& addr) { opGatherFetch(addr, zm6, T_N8|T_66|T_0F38|T_EW1|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); }
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void vscatterpf1qps(const Address& addr) { opGatherFetch(addr, zm6, T_N4|T_66|T_0F38|T_EW0|T_MUST_EVEX|T_M_K|T_VSIB, 0xC7, Operand::ZMM); }
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void vscatterqpd(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N8|T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA3, 0); }
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void vscatterqps(const Address& addr, const Xmm& x) { opGather2(x, addr, T_N4|T_66|T_0F38|T_EW0|T_YMM|T_MUST_EVEX|T_M_K|T_VSIB, 0xA3, 2); }
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Squashed 'externals/xbyak/' changes from 73ac5866..0140eeff
0140eeff Merge branch 'dev'
1efe14b2 change the original behavior of SetError
83c89c7a rename and fix indent
8be7ca93 Merge branch 'sbogusev-master' into dev
070b4c09 make l_err() inline with block scope static TLS l_error
9a4e6579 v5.97
d0ced1bc XBYAK_ONLY_CLASS_CPU is for only util::Cpu
bb967ae7 replace uint32 with uint32_t etc.
c306b8e5 update to v5.95
605e4224 use noexcept if C++11 or later
7a17c2c8 remove warning
5dfa4462 use constexpr if c++14 or later
18c9caaa Merge branch 'densamoilov-fix-mov-interface' into dev
3966ba9d fix mov interface
be492be1 change the behavior of push((byte|word), imm) to cast imm to int8_t/int16_t
d9696b54 Merge pull request #102 from igorsafo/master
ea73267f Cpu: make getNumCores constant
ff0b10e9 Merge pull request #101 from densamoilov/use-thread_local-when-supported
0c4eafc3 use thread_local for XBYAK_TLS when supported
c1aea35e CodeGenerator::reset() calls ClearError()
b4df97b1 Merge branch 'cursey-no-winsock2-header'
6a47bb0e v5.94
9a1749e6 define WIN32_LEAN_AND_MEAN for including winsock2.h after xbyak.h
42dddb74 Remove #include <winsock2.h>
615b85fa update doc
9cd796a9 rename XBYAK_NOEXCEPTION to XBYAK_NO_EXCEPTION
7cdf227f use static to avoid multiple instance
38a28dec test_nm.bat supports noexcept
0fdffc6b XBYAK_NOEXCEPTION for -fno-exceptions
eda6e2a3 v5.92
5c26c8bb mov(rax, imm64) on 32-bit env with XBYAK64
6208e3ae throw exception if not supported amx sibmem 2
c6737d14 mov amx insts from avx512
34ea5c16 throw exception if not supported amx sibmem
6f93fe35 fix test of sizeof(Operand)
5b89c3b2 remove T_TMM
5ce32858 gen_amx.cpp is merged into gen_avx512.cpp
fe4f965f remove my alias for tmm registers
92f904d8 bit_ contains 8192
98b51da9 extend mnemonics with Intel(R) AMX ISA
8d1b4c9e add generation of Intel(R) AMX ISA mnemonics
8ded45d1 add support of Intel(R) AMX ISA
b23c4b02 v5.912
ffe32a60 Merge branch 'rsdubtso-master'
e7b7fd2f use MAP_JIT on macOS regardless of Xcode version
82b70e66 v5.911 ; XBYAK_USE_MMAP_ALLOCATOR is defined
2f6d9e34 fix test for mac
a7d10a1e add link to GitHub Sponsor
96076265 accept k0 mask register (it means no mask)
7e3167e4 kmov{b,w,d,q} throws for unsupported reg
f487d7b7 Merge pull request #91 from marcelotrevisani/patch-1
dc9e6a79 Possibility to specify a different PREFIX
5fc69fc8 remove warning of test
e69e0b42 fix typo of type of Zmi
34f797e8 perf does not recognize too short function name
6cc0f4df Consider max defined as a macro on Windows
5722393d fix for zeroed-out 0xb leaf
6a4459a8 Merge branch 'tyfkda-feature/fix-segfault-in-calc'
47922ed9 Fix segmentation fault in calc sample
8f696e93 add test_avx512 to bat
00114d79 add .travis.yml
a29fa27b refactor test
508b543c fix error of vfpclasspd
0d54f1b1 fix for windows
4da8fd4e add setDefaultJmpNEAR
da7f7317 revert to the behavior before v5.84 if -fno-operator-names is defined
7dac9f61 update to v5.85
fe639332 enable MAP_JIT only if mojave or later
4443d791 specify MAP_JIT mmap flag on macOS
20ee4c2d update doc
ca0e8395 [changed] XBYAK_NO_OP_NAMES is defined
f32836da remove exit(1)
a1e9adf2 v5.82
08b8b1ba Support AMD Zen New Instructions.
2501ba9a remove *.user and *.vcproj
5c2ea988 Merge branch 'jrmwng-feature/upgrade-to-vs2017/jrmwng'
35847f7a Merge branch 'feature/upgrade-to-vs2017/jrmwng' of https://github.com/jrmwng/xbyak into jrmwng-feature/upgrade-to-vs2017/jrmwng
ef267775 address "warning LNK4075: ignoring '/EDITANDCONTINUE' due to '/SAFESEH' specification"
4a6c59bb address a conflict of sharing intermediate directory by different projects
9577cbf3 inherit "some output locations" from parent or project defaults
6c5f7186 upgrade projects from VS2018 to VS2017
4ca0434b v5.81
72b4e95d add lds/lss/les/lfs/lgs
cc8f037c fix ; move ERR_INTERNAL to the end
9e9ec1c3 add repe, repne, repne, prez
eea0edc3 add some fpu mnemonics
06235fa6 add loop/loope/loopne
7fc0c2bb add enter/leave
9fa2ef3c add in_, out_
df208648 add lods{b,w,d,q}, outs{b,w,d}
4672d2cb add int3, int_, into
431977cb add pushfq, popfq
81c4749f syscall, sysenter, sysexit, sysret
1f1b53c4 add clflushopt, fldenv, fnstw
b765db33 Profiler uses append mode
44dc3546 add Profiler class
42949334 update version to v5.802
91cb919b Merge branch 'vpirogov-master'
a6452f82 fixed avx512_bf16 detection
f41da5aa tweak ; vcvtneps2bf16 calls opCvt2
b12460ba [sample] fix typo of quantize.cpp
b22f5881 add set_opt.bat for test on Windows
f402faad add vp2intersectd/vp2intersectq
4cfd5208 add avx512_bf16
4033564c fix vcmppd/vcmpps for ptr_b
git-subtree-dir: externals/xbyak
git-subtree-split: 0140eeff1fffcf5069dea3abb57095695320971c
2020-09-19 16:27:42 +01:00
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void vshuff32x4(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(y1, y2, op, T_66 | T_0F3A | T_YMM | T_MUST_EVEX | T_EW0 | T_B32, 0x23, imm); }
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void vshuff64x2(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(y1, y2, op, T_66 | T_0F3A | T_YMM | T_MUST_EVEX | T_EW1 | T_B64, 0x23, imm); }
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void vshufi32x4(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(y1, y2, op, T_66 | T_0F3A | T_YMM | T_MUST_EVEX | T_EW0 | T_B32, 0x43, imm); }
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void vshufi64x2(const Ymm& y1, const Ymm& y2, const Operand& op, uint8_t imm) { opAVX_X_X_XM(y1, y2, op, T_66 | T_0F3A | T_YMM | T_MUST_EVEX | T_EW1 | T_B64, 0x43, imm); }
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void vsqrtph(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5|T_EW0|T_YMM|T_ER_Z|T_MUST_EVEX|T_B16, 0x51); }
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void vsqrtsh(const Xmm& x1, const Xmm& x2, const Operand& op) { opAVX_X_X_XM(x1, x2, op, T_N2|T_F3|T_MAP5|T_EW0|T_ER_X|T_MUST_EVEX, 0x51); }
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Squashed 'externals/xbyak/' changes from 590c10e37..9357732aa
9357732aa v6.06
b161a3eb7 update changelog
e5453b064 Merge branch 'dev'
2a265d9d9 memfd: keep file descriptor open during allocation lifetime
31ff018ed replace unsigned int with uint32_t in xbyak_util.h
e427b2231 move Type into Cpu
8cf41063b refactoring Cpu
66d62968d add -cpuid to test_util
cf7cb744c add comments
028112949 add detection of clzero
c88007b03 update doc
4cb2e77a9 v6.052
015c27cf6 Merge branch 'dev'
d808f9ecb add test of Cpu::has
b48a7bb1b add operator== to Type
1a90f456c v6.051
96cb1d660 update changelog
1f5a77f56 Merge branch 'dev'
87e14f02a add test with noexception
30144f809 fix error when XBYAK_NO_EXCEPTION is defined
ec15751df Merge branch 'dev'
4831b3fb3 v6.05
9ddf251f3 remove debug code
905b31bab fix typo
72d1ac118 add movdir64b
a6665996b add detection of movdir64b
92ddc6dfd remove Type::operator<<() because it's ambiguous
9cdd40f5e add detection of movdiri
379f8bf37 add movdiri
0ad6db138 fix cldemote test for 32-bit
84ab46bb3 add cldemote to Cpu
a84ddc12d support cldemote
3a6cc626e add clwb
38c40c02e detection of clflushopt
c061ac839 avoid unnecessary replacement in readme.md
095ebbff1 extend Cpu::Type to 128 bit
3ea8e45d3 Merge branch 'dev'
f7bfc2634 v6.041
ab4e52d67 update doc
2bef54399 include intrin.h on mingw
621ed0775 Merge branch 'dev'
4f5893e1e memfd_create: disable for ANDROID_API < 30
684d69db0 Merge branch 'dev'
ea88b6d85 disable warning on mingw
7e8923fa5 add colon
9914216bd Merge branch 'dev'
b335602ff [skip ci] tweak doc
25fbb3996 tweak doc
122054dc4 Formatted Supported OS Section
d4fa7e46b Reworked Authors Section
9e4b64a74 Adjusted Spacing
ff9fdb45f Use Github Sponsor Widget
893b31d46 Added Quicklinks
2d2adf78b Added License Badge
335b5941b Formatted Header
70603addf Moved Install / Usage Into Dedicated Files
1659d28fe Moved History Into Dedicated File
fb953284b Merge branch 'dev'
dbd96b277 add news
898c354e6 v6.04
f8e2ad1e9 add waitpkg detection to Cpu
a220fd69a add umwait
64ec053e6 add umonitor
764d54f6f add tpause
c68646e8d remove warning of vc
4e8214ca2 Merge branch 'dev'
360f4b673 test badSSE only for 32-bit mode
a9fddc454 fix typo of readme
250b5dc39 fix typo of readme
c46e92756 Merge branch 'dev'
31b7cd350 v6.03
a2f9ed085 rename isValidXMm to isValidSSE
2bc8fcbd3 add tests to badSSE
6de93fb88 add baseSSE test
e2eda384c update doc
71a7b1773 fix condition to throw error for SSE instructions when using XMM16-XMM31
615b665cc sample/memfd shows /proc/self/maps
2861517f2 add memfd sample
507b0285e apt update at first
452c07f77 typedef for no-MmapAllocator
8af6e2026 minimize diff
0af3b5d07 Allocator: take optional name parameter and use it with memfd
a67e24505 Merge branch 'dev'
b3892c15e Merge pull request #138 from Tachi107/make-cxx-cpp-ld-flags
b4eddaced build(make): honour CXXFLAGS, CPPFLAGS and LDFLAGS
fbe60e590 test generates only a.asm
0a4a7571d Merge branch 'patch-1' of https://github.com/Tachi107/xbyak into Tachi107-patch-1
55b9f131b build(make): fix clean target in test/Makefile
7aef3ff54 Merge branch 'dev'
82e0deb8a v6.02
4d9906a94 fix condition to throw error for invalid displacements
c79311a51 fix test_util.cpp
9b2c175b3 Merge branch 'dev'
06d797e33 Allow parallel feature checks
2a85bba3f Merge branch 'dev'
8d5af80a6 v6.01
df39606fe update doc
08f11817c supprt retf
1abfc3465 support call(mem, T_FAR)
fb158f901 support jmp(mem, T_FAR)
9be47ceb2 Merge branch 'lioncash-hlt' into dev
3162eb16f add test of hlt
bb55725a9 xbyak: Add hlt opcode function
47cf85fdb fix conflict
b29e471ea build(meson): fix CMake Config file include dir
2cc21925f delete the sentences translated into Japanese from COPYRIGHT
dca3930de remove tabs
cecd204a5 Merge pull request #129 from Tachi107/meson-cmake-config
345de8a54 build(meson): generate CMake package config files
e831805cc revert change of the type of Pack::util::operator[]
fc9d953e5 util::Pack has not pointer but instance of Reg64
0868c54a9 use _WIN32 instead of _MSC_VER for mingw64
894a1b14a use original uint8_t
dfc079ca1 add cstrs of Xbyak::util::Pack for 11 or 12 args
06e8f531f Merge branch 'Tachi107-meson' into dev
ef90b6bd2 Makefile updates the version of meson.build
0000938f5 build: add Meson support This allows Meson users to use xbyak more easly, while it also provides a pkg-config file generator, useful to Linux distributions
757e4063f v6.00
b3489f548 add vcvtusi2sh
16d9898ab add vcvtsi2sh
cfc03cb8f unify T_66, T_F3, T_F2 flags
02fa7057d add vcvttph2qq
4e72a9dc4 add vcvttsh2usi
05d08e05b add vcvttsh2si
621e6548c add vcvtsh2usi
34abda5c5 extend vcvtps2ph
facd622b2 add vcvtw2ph
270af1cb2 add vcvtuw2ph
17dc697cd add vcvttph2w
62f022aea vcvttph2uw
836346bfd add vcvtph2w
300edb37b add vcvtph2uw
737904b5a add vcvtuqq2ph
52b2ebf18 add vcvtqq2ph
6761f1e05 add vcvtpd2ph
03f95b7e3 add vcvtudq2ph
64430b2bb add vcvtps2phx
88e426aa4 add vcvtdq2ph
bf28a94a5 add vcvttph2uqq
4c4e665d3 add vcvtph2uqq
2b0099b63 add vcvtph2qq
3ff69a474 add vcvtph2pd
678b52956 add vcvttph2udq
72a5717e4 add vcvttph2dq
524d52bf6 add vcvtph2udq
d1cf4db97 add vcvtph2psx
fccd2c49b add vcvtph2dq
6530f4099 refactor gen-cvt
c51e16156 tweak
ed9f6c72a add vcvtsh2si
ac1407bd1 add vcvtss2sh
2958a19bb add vcvtsh2ss
10d683303 add vcvtsh2sd
3920c950c add vcvtsd2sh
9a1b73932 add vmovw
d86e4882f vmovsh xmm, addr
61f85a204 add vmovsh
847166cef add tests of vgetmant{ph,sh}
c11a21cf4 add vgetmantph
55ab361f0 add tests of vgetexp{ph,sh}
8653f4152 add vgetexpsh
697eeb627 add vgetexpph
ee920a991 add vfpclasssh
7aed436e6 add vfpclassph
56dca14e4 v5.997
b3b1e4e3c fix vrndscale* to support {sae}
681077eb1 add vrndscalesh
2f14eae85 add vrndscaleph
f96870a44 add vreducesh
043c94ae9 add vreduceph
37bf3bb49 add vscalefsh
c16f91c59 add vscalefph
61ad45935 add vsqrtsh
e00b508d5 add vsqrtph
52765d54f add vrsqrtsh
2ec6a7ab4 add vrsqrtph
b1ff7891d add vrcpph, vrcpsh
4f543ca0e add vucomish
412b95f02 add vf{,c}mulcph
9fc53baed add vf{,c}maddcph
0098ce98d add vf{,n}m{sub,add}sh
849dffb10 add vfmadd, vfnmadd, vfnmsub for avx512-fp16
eadb93d0b add vfmsubaddcph
9b8802cba add vfmaddsub{132,213,231}ph
ab9481b4c add vcomish
cd036ea17 fix vcmpsh
b494b321a vcmpsh supports ptr_b
eb2d63c83 vcmpph uses T_B16
a480b3dd9 v5.996
16d18b1d4 fix v{add,sub,mul,...}{sd,ss} to support T_rd_sae etc.
66c6ca1ab support vaddsh with T_rd_sae
6333ec099 add m16bcst
84053c8e7 add vcmpph
5df23d263 move FP16 to AVX-512
d5c7336f8 fix disp scaling of v{add,sub,mul,div,max,min}sh
ebf29542d add vaddsh test
f29689d02 add test of vaddph
2c4b6ac16 add v{add,sub,mul,div,min,max}{ph,sh}
edf3c2f6f remove mask for mmm
2c561aad6 add T_MAP5 and T_MAP6
acd360c38 add Cpu::tAVX512_FP16
1554f479c remove unused flags(tSSE4a and tSSE5) of Cpu
c313a8758 update CMakeLists.txt version
740b39e24 Merge pull request #122 from abouvier/cmake
10a1e5759 v5.995
0a557a099 rename XBYAK_MEMFD_CREATE to XBYAK_USE_MEMFD
0ad9b9bbe Merge branch 'captain5050-master' into dev
c7bb66383 fix for mac and enable it if XBYAK_MEMFD_CREATE is defined
c1e6569f1 fix cmake config files
ccd4130ec Name mmap pages on Linux with memfd_create
2fb843c32 v5.994
413a66b44 add alias of vcmpXX{ps,pd,ss,sd} for mask register
6f4f76890 v5.993
19043cb9a add test for gather/scatter
b5acb1d1c gather test does not generate bad combination of regs
67ec1674a check restriction of gather/scatter regs
ea9814f4f check bad reg combination of gather
a34850b2d add endbr32 and endbr64
git-subtree-dir: externals/xbyak
git-subtree-split: 9357732aa2aa3cf97809027596dfa5c61d1515b2
2022-06-05 13:31:49 +01:00
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void vsubph(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_EW0 | T_YMM | T_MUST_EVEX | T_ER_Z | T_B16, 0x5C); }
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void vsubsh(const Xmm& xmm, const Operand& op1, const Operand& op2 = Operand()) { opAVX_X_X_XM(xmm, op1, op2, T_MAP5 | T_F3 | T_EW0 | T_MUST_EVEX | T_ER_X | T_N2, 0x5C); }
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void vucomish(const Xmm& x, const Operand& op) { opAVX_X_XM_IMM(x, op, T_MAP5 | T_MUST_EVEX | T_EW0 | T_SAE_X | T_N2, 0x2E); }
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2020-04-22 20:25:57 +01:00
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#ifdef XBYAK64
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Squashed 'externals/xbyak/' changes from a1ac3750f..2ce465bbc
2ce465bbc Merge branch 'dev'
0b3f360eb v7.05
66f22b7a4 update doc
13ee4e19f use opSetCC for setCC
383866b42 use opMR with APX
d6e6e6f85 tweak
a7b02ac80 RAO_INT supports APX
26840492c use Address.immSize
e2b40a33e refactor Address class
e1b6896c2 Merge branch 'dev'
c0888cc45 v7.04
7d9c82835 refactor rex
b3e27734b apx supports 0x0f opecode with rex2
2e7b62d78 bswap supports apx
2e93baa6a Merge branch 'dev'
e1864642c unify getMap and getMMM
0750873b7 T_MAP3 is not necessary
ee4984222 T_MAP1 is not necessary
5c95842be tweak
8c44467af add no_flags sample
523cf1ed0 fix comment of sample/ccmp.cpp
5438fc69d Merge branch 'dev'
ee26c094e v7.03
691ce361a [doc] update dfv
8d0e78146 set 0 for the default value of dfv
2255aea0d [doc] add ccmpSCC and ctestSCC
b5e115284 add sample/ccmp.cpp
bacd8d34b add sample/zero_upper.cpp
f17cb9d6b Merge branch 'dev'
c9ce3f8f6 v7.02
3427be298 unify opAESKL and opSHA
bfd14244a update doc
e690a2a47 sha* supports apx
c9765588f Merge branch 'dev'
903f7c02e v7.01
54a1f07f9 update cpuid by sde
223ddfaf8 add detection of sse4a/clwb
ba943b5b6 reorder cpu detection
30c362df5 Merge branch 'Sonicadvance1-missing_checks' into dev
02bc84ad8 renumber of tSSE4a, tCLWB
84fe3ab9d update doc
90fc0151c add encodekey{128,256}
440972b88 add detection of KEYLOCKER, KEYLOCKER_WIDE
68a30b91f add detection of AESKLE, WIDE_KL
e2d36c662 fix detection of AVX10
48551f5cc add aesenc{128,256}kl, aesencwide{128,256}kl
d9c7c992f add aesdecwide{128,256}kl
cd5231de0 add aesdec256kl
fcb3d0dbb add aesdec128kl
85709ace7 mvoe opKmov in private
406199e7a Support cpuid CLWB
1214aad95 Adds back missing SSE4a check
5315658ad add detection of avx10/apx_f
835f6d2e6 Merge pull request #180 from Tachi107/fix-32bit-tests
650b241e3 test: only run apx test when BIT=64
016ce86b6 [doc] add a blank line
df0ebc740 v7.00
1ec2adbbb Merge branch 'apx'
da1818592 update doc
bec145ba9 amx supports apx
944438195 add tests of kmov*
bd85d108c kmov* supports apx
93bd6a0b7 rename T_VEX to T_APX
b063d276f add misc tests
6d21c7389 add evex tests
05a66d2c0 support V4 in evex
33017d4fb support V4 in evex
e228e737d prepare evex extension of evex
45eca7987 update doc
98ce73bb2 add cfcmov tests
e2d9685af add cfcmov
a4ec97ca9 add tests of ctestscc
45711c502 add ctestscc
a1f6c14cc add alias of dfv
facb052a1 avoid r15 on 32-bit mode
c1c15848c remove warnings
be319626b add ccmpscc with imm
c4d05037e add ccmpscc
17f7d279c testing ccmpb
ff01b1e20 setcc supports apx
25ceea2ef add 3-op cmovcc
2f8cfb9a8 CMPccXADD supports APX
a9310deac add tests of push/pop
ec2881bfd push/pop support rex2
114152fed add push2/pop2
1aefdb649 support jmpabs
77eca6d0d add tests of 3-op shift
5e54ffdfa add 3-op shift
426814c50 check v instead of r
3f3d6095c disable rol/ror to support NF
ee572b7eb add tests of ror/rol
186d63ad9 add tests of shr/sar
26be71a12 2-op shl supports apx
83f5bd25e remove some warnings
e43d99762 add crc32 tests
92153b6f8 crc32 supports apx
d7ca6a2dd split T_F2 from T_66|T_F3
fb1fc738f tweak
389d73347 movbe supports apx and append test
3636cde22 tests of 1-byte opcode with rex2
1dd020126 check whether or not it is a 1-byte opcode
083822b52 movdiri supports apx
6703d4344 movdir64b supports apx
ed5dc3516 add tests of shld/shrd
b01c0ed40 shld/shrd support apx
c51c4a6f7 add tests of lzcnt and tzcnt
2cc22ea1b lzcnt and tzcnt support apx
baddec288 tweak
1d3a19a50 update doc of apx
273d8d5b6 add 3-op imul with T_zu
50875294c add tests of 2-op imul
d20142d01 add T_zu
eb9de1392 2-op imul supports apx
dba2c174f add 2op neg/not_
95ad5927f add tests of imul/mul/neg/not_ with 1-op
790afb745 add tests o idiv
045ef31a3 add tests of div
1d7e2a6bb div supports apx
e5fe58231 remove warning on 32-bit
66b3a3042 check all regs of NF
c7dba88df add dec test
f55f596ad add inc test
6f6423899 2-op inc/dec
95c0c4e6f tweak inc/dec
f5fda7ace change detection of pp with type
a18e5aeb5 rorx supports apx
5bb8461b4 blsmsk, blsr support apx
a493dc7b4 blsi supports apx
7c1accedc sarx/shlx/shrx support apx and add tests
125d8e740 test bzhi with apx
78be5afd1 add tests of bextr with apx
e9603b79d bextr supports apx
3a85aadc6 pdep, pext support apx
16f1a5d8a mulx supports apx
82529af93 andn supports APX
637ad7a4a add test of NF
e23f5ad75 fix type for adc
1bcc83303 3-op add supports T_nf
5d46b950b the type of all type is uint64_t
0a8ea9edf fix type
b1f0fef4d add test of 3op apx
9b21727ba remove space
6fa1b4a90 reorder of opRO
2d1f229a0 simplify condR
b220be972 simplify opRO
24b71a1ce use Reg instead of Operand if possible
de1353448 rename opGen with opSSE
4cd8e8eac refactor opGpr as opRRO
01d756917 rename
5037120f7 replace old rex with rexA
45fe94fdd rename opLoadSeg2 with opLoadSeg
253f800bc tweak
4f3939d92 rename opModM2 with opModM
fa731a27c rename opModR2 with opModR
e5db7d0e4 rename opModRM2 to opModRM
dc20fd09b use opModRM2
d4da1561b rename opR_ModM2 with opR_ModM
ef3665274 use opR_ModM2
e5b20e5a5 use opModM2
104941db2 use opModM2
6ae769f21 rename opROO2 with opROO
1521cb7ce rename opGen2 to opGen
f9c6cb5dc all opGen are replaced with opGen2
249d6978a use opGen2
81ae48922 use opGen2
b9e4bb2fc always put prefix as byte code
3374a158f use opGen2
719f81f45 use opGen2
8d037ebd6 use opGen2
6f8bc28e2 use opGen2
303876cac use opGen2
f0b49752a rewrite opMovXMM
5d4c48ffd rewrite opMMX
189c3488b use opMMX2
1361d0946 use opMMX2
32cafcc61 tweak
cf1cfd6c4 add temporary converting code
433bf29e3 replacing opModR with opModR2
ba1d07ed1 senduipi uses opModR2
646da9750 use opModR2 for rdrand, rdseed, movq
ccad6cecd use opModR2 for movdq2q, movq2dq
3c21754b9 use opModR2 for movd, movmskps
4718643ef use opModR2 for bswap, maskmovq, pmovmskb
e1a148707 try to use opModR2
220a5def7 split avx_type_def.h in gen/
87b8c8ed2 adox passes the test
bd8477292 fix detection of adox without apx
6b19515eb add adcx, adox with APX
77d6acea6 increase the room of type
710e39bfe add test of r, r/m
ea9cd9ade tweak
057f09c5b rename T_NF to T_nf
57a0c1935 support NF=1
8f49739da remove cmp of 3-op
e3310344c [doc] about APX
cdc2533c1 add test of adc/3op
9c6b81c4d return value on nothrow mode
8d524b4a4 add op(r, r/m, imm) and op(r, r/m, r/m)
4c62d1fdc test adc2(r, op, mem) and adc2(r, mem, op)
6f593a1cb test of adc2 (3op APX)
61addb9d9 simplify opMIB
575c447f1 remove rex2p
a95bd9cc5 add test of adc/add/and_/cmp/or_/sbb/sub/xor_
f7d3c17e8 tweak
d7a7ea912 refactoring rex
acd797139 use opModM instead of opMIB
ad3334ba6 add modRM with rex2
059d115b5 add test of apx.cpp
873c93a51 add test of regs of apx
e25b1cd62 [not tested] add(r1, r2) with rex2
eb118504d remove warning of VC
6c580b1f7 fix cvt test for extended r16-r31
981fa6f05 add r16 - r31
244623812 Merge branch 'dev'
aafe3cb62 build(cmake): bump minimum required to version 3.5
76d7477d7 Merge branch 'dev'
151c8ab04 v6.73
dd66cfb76 add tests of avx-vnni-int{8,16}
4a6132d66 update cpuid list
bea25541a add detection of AVX_VNNI_INT16
d9e76b1c6 add tests of SM4
e1c4c360b add SM4
d79717dbe add tests of SM3
48f8dbeb6 add SM3
5473d3933 vsha512* check regs
9b3687a68 add detection of SHA512, SM3, SM4
ecdd01ee5 mov crypt test in 64-bit mode
c4550b6a9 sde 9.24.0
5762819de add vsha512{msg1, msg2, rnds2}
3255d606a Merge branch 'dev'
322665e72 v6.72
ad178a219 add xabort/xbegin/xend
0924ff4aa Merge branch 'dev'
8980934c1 v6.71
76292b310 add SystemInfo class for win
3e42709ab ignore space and cr
66b2768a6 disable wrong detection of gcc
1855985e1 remove / for mingw64
5bdccc0b8 64bit only for mingw64
33882d0a0 use sysconf(_SC_PAGESIZE) instead of const value 4096 on linux
33075c2bd add link to other projects
60e71402e reorder
79854aa08 add new cpus
5921e270c update cpuid
ce083a0dc Merge branch 'dev'
b538485f3 v6.70
461dd34ee udpate doc
2149c79e3 add test of alias of vpclmulqdq
2c59c5c91 add alias of vpclmulqdq
729ae4aa3 fix alias of pclmulqdq
3c248d68a define XBYAK_CONSTEXPR if XBYAK_ONLY_CLASS_CPU is defined
c0a932d7b Merge remote-tracking branch 'origin/dev'
ef502b5b4 update doc
ba3db4730 update version
c0d7a704f v6.69.2
c535f4737 update cpuid test list
683249232 change the order of args of diff
e81b95583 Merge branch 'Wunkolo-constexpr-typet' into dev
ab3f40587 Allow constexpr TypeT `operator|`
ad5276fa4 Merge pull request #172 from orz--/patch-1
b4d54f6e1 Update changelog.md
58642e0cd Merge branch 'dev'
3b13d068b v6.69.1
d700f6c35 add detection of xsave
740dff2e8 Merge branch 'dev'
dc048a04c v6.69
ad0dfffd2 add senduipi/stui/testui/uiret
e78f1121b add clui
23b40331a add detection of uintr
98a0f1924 remove warning of sign/unsigned
0afd71a27 add detection of SERIALIZE
363bbaa57 sample shows cpu cache info for AMD
edce72709 Cpu supports AMD
git-subtree-dir: externals/xbyak
git-subtree-split: 2ce465bbca46e92dde9c44bbe7940fd7f70e3b97
2024-01-30 00:36:49 +00:00
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void kmovq(const Reg64& r, const Opmask& k) { opKmov(k, r, true, 64); }
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void vpbroadcastq(const Xmm& x, const Reg64& r) { opVex(x, 0, r, T_66|T_0F38|T_EW1|T_YMM|T_MUST_EVEX, 0x7C); }
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2020-04-22 20:25:57 +01:00
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#endif
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#endif
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