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frontend/ir_emitter: Add half-precision opcode variant for FPVectorRSqrtEstimate

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Lioncash 2019-04-13 18:36:24 -04:00 committed by MerryMage
parent 5dba99b4f4
commit 037acb17b9
4 changed files with 8 additions and 0 deletions
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4
src/backend/x64/emit_x64_vector_floating_point.cpp
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@ -1241,6 +1241,10 @@ static void EmitRSqrtEstimate(BlockOfCode& code, EmitContext& ctx, IR::Inst* ins
}); });
} }
void EmitX64::EmitFPVectorRSqrtEstimate16(EmitContext& ctx, IR::Inst* inst) {
EmitRSqrtEstimate<u16>(code, ctx, inst);
}
void EmitX64::EmitFPVectorRSqrtEstimate32(EmitContext& ctx, IR::Inst* inst) { void EmitX64::EmitFPVectorRSqrtEstimate32(EmitContext& ctx, IR::Inst* inst) {
EmitRSqrtEstimate<u32>(code, ctx, inst); EmitRSqrtEstimate<u32>(code, ctx, inst);
} }

2
src/frontend/ir/ir_emitter.cpp
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@ -2302,6 +2302,8 @@ U128 IREmitter::FPVectorRoundInt(size_t esize, const U128& operand, FP::Rounding
U128 IREmitter::FPVectorRSqrtEstimate(size_t esize, const U128& a) { U128 IREmitter::FPVectorRSqrtEstimate(size_t esize, const U128& a) {
switch (esize) { switch (esize) {
case 16:
return Inst<U128>(Opcode::FPVectorRSqrtEstimate16, a);
case 32: case 32:
return Inst<U128>(Opcode::FPVectorRSqrtEstimate32, a); return Inst<U128>(Opcode::FPVectorRSqrtEstimate32, a);
case 64: case 64:

1
src/frontend/ir/microinstruction.cpp
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@ -343,6 +343,7 @@ bool Inst::ReadsFromAndWritesToFPSRCumulativeExceptionBits() const {
case Opcode::FPVectorRoundInt16: case Opcode::FPVectorRoundInt16:
case Opcode::FPVectorRoundInt32: case Opcode::FPVectorRoundInt32:
case Opcode::FPVectorRoundInt64: case Opcode::FPVectorRoundInt64:
case Opcode::FPVectorRSqrtEstimate16:
case Opcode::FPVectorRSqrtEstimate32: case Opcode::FPVectorRSqrtEstimate32:
case Opcode::FPVectorRSqrtEstimate64: case Opcode::FPVectorRSqrtEstimate64:
case Opcode::FPVectorRSqrtStepFused32: case Opcode::FPVectorRSqrtStepFused32:

1
src/frontend/ir/opcodes.inc
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@ -578,6 +578,7 @@ OPCODE(FPVectorRecipStepFused64, U128, U128
OPCODE(FPVectorRoundInt16, U128, U128, U8, U1 ) OPCODE(FPVectorRoundInt16, U128, U128, U8, U1 )
OPCODE(FPVectorRoundInt32, U128, U128, U8, U1 ) OPCODE(FPVectorRoundInt32, U128, U128, U8, U1 )
OPCODE(FPVectorRoundInt64, U128, U128, U8, U1 ) OPCODE(FPVectorRoundInt64, U128, U128, U8, U1 )
OPCODE(FPVectorRSqrtEstimate16, U128, U128 )
OPCODE(FPVectorRSqrtEstimate32, U128, U128 ) OPCODE(FPVectorRSqrtEstimate32, U128, U128 )
OPCODE(FPVectorRSqrtEstimate64, U128, U128 ) OPCODE(FPVectorRSqrtEstimate64, U128, U128 )
OPCODE(FPVectorRSqrtStepFused32, U128, U128, U128 ) OPCODE(FPVectorRSqrtStepFused32, U128, U128, U128 )