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emit_arm64_a32: Implement A32SetCpsr (temporary implementation)

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Merry 2022-07-30 19:10:17 +01:00 committed by merry
parent 950400fb6b
commit 11b665c027
1 changed files with 12 additions and 5 deletions
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17
src/dynarmic/backend/arm64/emit_arm64_a32.cpp
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@ -247,18 +247,25 @@ void EmitIR<IR::Opcode::A32GetCpsr>(oaknut::CodeGenerator& code, EmitContext& ct
code.ORR(Wcpsr, Wcpsr, Wscratch0, LSL, 5); code.ORR(Wcpsr, Wcpsr, Wscratch0, LSL, 5);
} }
static void SetCpsrImpl(u32 value, A32JitState* jit_state) {
jit_state->SetCpsr(value);
}
template<> template<>
void EmitIR<IR::Opcode::A32SetCpsr>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::A32SetCpsr>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; auto args = ctx.reg_alloc.GetArgumentInfo(inst);
(void)ctx; ctx.reg_alloc.PrepareForCall(nullptr, args[0]);
(void)inst;
ASSERT_FALSE("Unimplemented"); // TODO: Inline
code.MOV(X1, Xstate);
code.MOV(Xscratch0, reinterpret_cast<u64>(&SetCpsrImpl));
code.BLR(Xscratch0);
} }
template<> template<>
void EmitIR<IR::Opcode::A32SetCpsrNZCV>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::A32SetCpsrNZCV>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto args = ctx.reg_alloc.GetArgumentInfo(inst);
auto Wnzcv = ctx.reg_alloc.ReadW(args[0]); auto Wnzcv = ctx.reg_alloc.ReadW(args[0]);
RegAlloc::Realize(Wnzcv); RegAlloc::Realize(Wnzcv);