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A64: Implement SHA1SU0

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Lioncash 2018-04-13 20:22:02 -04:00 committed by MerryMage
parent 3b6db59850
commit 16a001b9ff
2 changed files with 21 additions and 1 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -325,7 +325,7 @@ INST(AESIMC, "AESIMC", "01001
//INST(SHA1C, "SHA1C", "01011110000mmmmm000000nnnnnddddd")
//INST(SHA1P, "SHA1P", "01011110000mmmmm000100nnnnnddddd")
//INST(SHA1M, "SHA1M", "01011110000mmmmm001000nnnnnddddd")
//INST(SHA1SU0, "SHA1SU0", "01011110000mmmmm001100nnnnnddddd")
INST(SHA1SU0, "SHA1SU0", "01011110000mmmmm001100nnnnnddddd")
//INST(SHA256H, "SHA256H", "01011110000mmmmm010000nnnnnddddd")
//INST(SHA256H2, "SHA256H2", "01011110000mmmmm010100nnnnnddddd")
//INST(SHA256SU1, "SHA256SU1", "01011110000mmmmm011000nnnnnddddd")

20
src/frontend/A64/translate/impl/simd_sha.cpp
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@ -8,6 +8,26 @@
namespace Dynarmic::A64 {
bool TranslatorVisitor::SHA1SU0(Vec Vm, Vec Vn, Vec Vd) {
const IR::U128 d = ir.GetQ(Vd);
const IR::U128 m = ir.GetQ(Vm);
const IR::U128 n = ir.GetQ(Vn);
IR::U128 result = [&] {
const IR::U64 d_high = ir.VectorGetElement(64, d, 1);
const IR::U64 n_low = ir.VectorGetElement(64, n, 0);
const IR::U128 zero = ir.ZeroVector();
const IR::U128 tmp1 = ir.VectorSetElement(64, zero, 0, d_high);
return ir.VectorSetElement(64, tmp1, 1, n_low);
}();
result = ir.VectorEor(ir.VectorEor(result, d), m);
ir.SetQ(Vd, result);
return true;
}
bool TranslatorVisitor::SHA1H(Vec Vn, Vec Vd) {
const IR::U128 data = ir.GetS(Vn);