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emit_arm64_saturation: Implement UnsignedSaturation

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Merry 2022-07-26 09:02:16 +01:00 committed by merry
parent 02d3a5a242
commit 179137be5a
1 changed files with 21 additions and 4 deletions
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src/dynarmic/backend/arm64/emit_arm64_saturation.cpp
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@ -172,10 +172,27 @@ void EmitIR<IR::Opcode::UnsignedSaturatedSub64>(oaknut::CodeGenerator& code, Emi
template<> template<>
void EmitIR<IR::Opcode::UnsignedSaturation>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) { void EmitIR<IR::Opcode::UnsignedSaturation>(oaknut::CodeGenerator& code, EmitContext& ctx, IR::Inst* inst) {
(void)code; const auto overflow_inst = inst->GetAssociatedPseudoOperation(IR::Opcode::GetOverflowFromOp);
(void)ctx;
(void)inst; auto args = ctx.reg_alloc.GetArgumentInfo(inst);
ASSERT_FALSE("Unimplemented"); auto Wresult = ctx.reg_alloc.WriteW(inst);
auto Woperand = ctx.reg_alloc.ReadW(args[0]);
RegAlloc::Realize(Wresult, Woperand);
ctx.reg_alloc.SpillFlags();
const size_t N = args[1].GetImmediateU8();
ASSERT(N <= 31);
const u32 saturated_value = (1u << N) - 1;
code.MOV(Wscratch0, saturated_value);
code.CMP(*Woperand, Wscratch0);
code.CSEL(Wresult, Woperand, Wscratch0, LS);
if (overflow_inst) {
auto Woverflow = ctx.reg_alloc.WriteW(overflow_inst);
RegAlloc::Realize(Woverflow);
code.CSET(Woverflow, HI);
}
} }
} // namespace Dynarmic::Backend::Arm64 } // namespace Dynarmic::Backend::Arm64