thumb32: Implement CMP (reg)

This commit is contained in:
MerryMage 2021-03-06 19:44:38 +00:00
parent a63271fd3b
commit 17bdb54d30
3 changed files with 17 additions and 1 deletions

View file

@ -43,7 +43,7 @@ INST(thumb32_CMN_reg, "CMN (reg)", "111010110001nnnn0vvv11
INST(thumb32_ADD_reg, "ADD (reg)", "11101011000Snnnn0vvvddddvvttmmmm")
INST(thumb32_ADC_reg, "ADC (reg)", "11101011010Snnnn0vvvddddvvttmmmm")
INST(thumb32_SBC_reg, "SBC (reg)", "11101011011Snnnn0vvvddddvvttmmmm")
//INST(thumb32_CMP_reg, "CMP (reg)", "111010111011--------1111--------")
INST(thumb32_CMP_reg, "CMP (reg)", "111010111011nnnn0vvv1111vvttmmmm")
//INST(thumb32_SUB_reg, "SUB (reg)", "11101011101---------------------")
//INST(thumb32_RSB_reg, "RSB (reg)", "11101011110---------------------")

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@ -238,4 +238,19 @@ bool ThumbTranslatorVisitor::thumb32_SBC_reg(bool S, Reg n, Imm<3> imm3, Reg d,
return true;
}
bool ThumbTranslatorVisitor::thumb32_CMP_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m) {
if (n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const auto shifted = EmitImmShift(ir.GetRegister(m), type, imm3, imm2, ir.GetCFlag());
const auto result = ir.SubWithCarry(ir.GetRegister(n), shifted.result, ir.Imm1(1));
ir.SetNFlag(ir.MostSignificantBit(result.result));
ir.SetZFlag(ir.IsZero(result.result));
ir.SetCFlag(result.carry);
ir.SetVFlag(result.overflow);
return true;
}
} // namespace Dynarmic::A32

View file

@ -186,6 +186,7 @@ struct ThumbTranslatorVisitor final {
bool thumb32_ADD_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
bool thumb32_ADC_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
bool thumb32_SBC_reg(bool S, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, ShiftType type, Reg m);
bool thumb32_CMP_reg(Reg n, Imm<3> imm3, Imm<2> imm2, ShiftType type, Reg m);
// thumb32 data processing (modified immediate) instructions
bool thumb32_TST_imm(Imm<1> i, Reg n, Imm<3> imm3, Imm<8> imm8);