thumb32: Implement SMULXY

This commit is contained in:
Lioncash 2021-02-07 12:27:40 -05:00
parent 1e29ef8b0e
commit 1cd10e3214
3 changed files with 19 additions and 1 deletions

View file

@ -264,7 +264,7 @@ INST(thumb32_CLZ, "CLZ", "111110101011nnnn1111dd
INST(thumb32_MUL, "MUL", "111110110000nnnn1111dddd0000mmmm")
INST(thumb32_MLA, "MLA", "111110110000nnnnaaaadddd0000mmmm")
INST(thumb32_MLS, "MLS", "111110110000nnnnaaaadddd0001mmmm")
//INST(thumb32_SMULXY, "SMULXY", "111110110001----1111----00------")
INST(thumb32_SMULXY, "SMULXY", "111110110001nnnn1111dddd00NMmmmm")
//INST(thumb32_SMLAXY, "SMLAXY", "111110110001------------00------")
//INST(thumb32_SMUAD, "SMUAD", "111110110010----1111----000-----")
//INST(thumb32_SMLAD, "SMLAD", "111110110010------------000-----")

View file

@ -48,6 +48,23 @@ bool ThumbTranslatorVisitor::thumb32_MUL(Reg n, Reg d, Reg m) {
return true;
}
bool ThumbTranslatorVisitor::thumb32_SMULXY(Reg n, Reg d, bool N, bool M, Reg m) {
if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const auto n32 = ir.GetRegister(n);
const auto m32 = ir.GetRegister(m);
const auto n16 = N ? ir.ArithmeticShiftRight(n32, ir.Imm8(16), ir.Imm1(0)).result
: ir.SignExtendHalfToWord(ir.LeastSignificantHalf(n32));
const auto m16 = M ? ir.ArithmeticShiftRight(m32, ir.Imm8(16), ir.Imm1(0)).result
: ir.SignExtendHalfToWord(ir.LeastSignificantHalf(m32));
const auto result = ir.Mul(n16, m16);
ir.SetRegister(d, result);
return true;
}
bool ThumbTranslatorVisitor::thumb32_USAD8(Reg n, Reg d, Reg m) {
if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();

View file

@ -132,6 +132,7 @@ struct ThumbTranslatorVisitor final {
bool thumb32_MLA(Reg n, Reg a, Reg d, Reg m);
bool thumb32_MLS(Reg n, Reg a, Reg d, Reg m);
bool thumb32_MUL(Reg n, Reg d, Reg m);
bool thumb32_SMULXY(Reg n, Reg d, bool N, bool M, Reg m);
bool thumb32_USAD8(Reg n, Reg d, Reg m);
bool thumb32_USADA8(Reg n, Reg a, Reg d, Reg m);