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A64: Implement FMAX (scalar), FMIN (scalar)

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This commit is contained in:
MerryMage 2018-02-11 16:44:02 +00:00
parent 44a5b57f2a
commit 2080a51f41
2 changed files with 32 additions and 2 deletions
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4
src/frontend/A64/decoder/a64.inc
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@ -925,8 +925,8 @@ INST(FMUL_float, "FMUL (scalar)", "00011
INST(FDIV_float, "FDIV (scalar)", "00011110yy1mmmmm000110nnnnnddddd") INST(FDIV_float, "FDIV (scalar)", "00011110yy1mmmmm000110nnnnnddddd")
INST(FADD_float, "FADD (scalar)", "00011110yy1mmmmm001010nnnnnddddd") INST(FADD_float, "FADD (scalar)", "00011110yy1mmmmm001010nnnnnddddd")
INST(FSUB_float, "FSUB (scalar)", "00011110yy1mmmmm001110nnnnnddddd") INST(FSUB_float, "FSUB (scalar)", "00011110yy1mmmmm001110nnnnnddddd")
//INST(FMAX_float, "FMAX (scalar)", "00011110yy1mmmmm010010nnnnnddddd") INST(FMAX_float, "FMAX (scalar)", "00011110yy1mmmmm010010nnnnnddddd")
//INST(FMIN_float, "FMIN (scalar)", "00011110yy1mmmmm010110nnnnnddddd") INST(FMIN_float, "FMIN (scalar)", "00011110yy1mmmmm010110nnnnnddddd")
//INST(FMAXNM_float, "FMAXNM (scalar)", "00011110yy1mmmmm011010nnnnnddddd") //INST(FMAXNM_float, "FMAXNM (scalar)", "00011110yy1mmmmm011010nnnnnddddd")
//INST(FMINNM_float, "FMINNM (scalar)", "00011110yy1mmmmm011110nnnnnddddd") //INST(FMINNM_float, "FMINNM (scalar)", "00011110yy1mmmmm011110nnnnnddddd")
INST(FNMUL_float, "FNMUL (scalar)", "00011110yy1mmmmm100010nnnnnddddd") INST(FNMUL_float, "FNMUL (scalar)", "00011110yy1mmmmm100010nnnnnddddd")

30
src/frontend/A64/translate/impl/floating_point_data_processing_two_register.cpp
View file

@ -83,6 +83,36 @@ bool TranslatorVisitor::FSUB_float(Imm<2> type, Vec Vm, Vec Vn, Vec Vd) {
return true; return true;
} }
bool TranslatorVisitor::FMAX_float(Imm<2> type, Vec Vm, Vec Vn, Vec Vd) {
auto datasize = GetDataSize(type);
if (!datasize) {
return UnallocatedEncoding();
}
const IR::U32U64 operand1 = V_scalar(*datasize, Vn);
const IR::U32U64 operand2 = V_scalar(*datasize, Vm);
const IR::U32U64 result = ir.FPMax(operand1, operand2, true);
V_scalar(*datasize, Vd, result);
return true;
}
bool TranslatorVisitor::FMIN_float(Imm<2> type, Vec Vm, Vec Vn, Vec Vd) {
auto datasize = GetDataSize(type);
if (!datasize) {
return UnallocatedEncoding();
}
const IR::U32U64 operand1 = V_scalar(*datasize, Vn);
const IR::U32U64 operand2 = V_scalar(*datasize, Vm);
const IR::U32U64 result = ir.FPMin(operand1, operand2, true);
V_scalar(*datasize, Vd, result);
return true;
}
bool TranslatorVisitor::FNMUL_float(Imm<2> type, Vec Vm, Vec Vn, Vec Vd) { bool TranslatorVisitor::FNMUL_float(Imm<2> type, Vec Vm, Vec Vn, Vec Vd) {
auto datasize = GetDataSize(type); auto datasize = GetDataSize(type);
if (!datasize) { if (!datasize) {