mirrors/dynarmic
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

backend/rv64: Implement A32SetCpsrNZCV

Browse source
This commit is contained in:
Yang Liu 2024-02-17 18:22:24 +08:00 committed by Merry
parent 09c6f22da9
commit 208acb3026
1 changed files with 10 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

10
src/dynarmic/backend/riscv64/emit_riscv64_a32.cpp
View file

@ -248,4 +248,14 @@ void EmitIR<IR::Opcode::A32SetCpsrNZC>(biscuit::Assembler& as, EmitContext& ctx,
as.SW(Xscratch0, offsetof(A32JitState, cpsr_nzcv), Xstate); as.SW(Xscratch0, offsetof(A32JitState, cpsr_nzcv), Xstate);
} }
template<>
void EmitIR<IR::Opcode::A32SetCpsrNZCV>(biscuit::Assembler& as, EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
auto Xnzcv = ctx.reg_alloc.ReadX(args[0]);
RegAlloc::Realize(Xnzcv);
as.SW(Xnzcv, offsetof(A32JitState, cpsr_nzcv), Xstate);
}
} // namespace Dynarmic::Backend::RV64 } // namespace Dynarmic::Backend::RV64