thumb32: Implement SHSUB8/UHSUB8

src/frontend/A32/decoder/thumb32.h

@@ -252,7 +252,7 @@ std::optional<std::reference_wrapper<const Thumb32Matcher<V>>> DecodeThumb32(u32
         INST(&V::thumb32_SHSAX,          "SHSAX",                    "111110101110nnnn1111dddd0010mmmm"),
         INST(&V::thumb32_SHSUB16,        "SHSUB16",                  "111110101101nnnn1111dddd0010mmmm"),
         INST(&V::thumb32_SHADD8,         "SHADD8",                   "111110101000nnnn1111dddd0010mmmm"),
-        //INST(&V::thumb32_SHSUB8,         "SHSUB8",                   "111110101100----1111----0010----"),
+        INST(&V::thumb32_SHSUB8,         "SHSUB8",                   "111110101100nnnn1111dddd0010mmmm"),
 
         // Parallel Addition and Subtraction (unsigned)
         INST(&V::thumb32_UADD16,         "UADD16",                   "111110101001nnnn1111dddd0100mmmm"),
@@ -272,7 +272,7 @@ std::optional<std::reference_wrapper<const Thumb32Matcher<V>>> DecodeThumb32(u32
         INST(&V::thumb32_UHSAX,          "UHSAX",                    "111110101110nnnn1111dddd0110mmmm"),
         INST(&V::thumb32_UHSUB16,        "UHSUB16",                  "111110101101nnnn1111dddd0110mmmm"),
         INST(&V::thumb32_UHADD8,         "UHADD8",                   "111110101000nnnn1111dddd0110mmmm"),
-        //INST(&V::thumb32_UHSUB8,         "UHSUB8",                   "111110101100----1111----0110----"),
+        INST(&V::thumb32_UHSUB8,         "UHSUB8",                   "111110101100nnnn1111dddd0110mmmm"),
 
         // Miscellaneous Operations
         INST(&V::thumb32_QADD,           "QADD",                     "111110101000nnnn1111dddd1000mmmm"),

src/frontend/A32/translate/impl/thumb32_parallel.cpp

@@ -414,6 +414,19 @@ bool ThumbTranslatorVisitor::thumb32_SHSAX(Reg n, Reg d, Reg m) {
     return true;
 }
 
+bool ThumbTranslatorVisitor::thumb32_SHSUB8(Reg n, Reg d, Reg m) {
+    if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
+        return UnpredictableInstruction();
+    }
+
+    const auto reg_m = ir.GetRegister(m);
+    const auto reg_n = ir.GetRegister(n);
+    const auto result = ir.PackedHalvingSubS8(reg_n, reg_m);
+
+    ir.SetRegister(d, result);
+    return true;
+}
+
 bool ThumbTranslatorVisitor::thumb32_SHSUB16(Reg n, Reg d, Reg m) {
     if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
         return UnpredictableInstruction();
@@ -479,6 +492,19 @@ bool ThumbTranslatorVisitor::thumb32_UHSAX(Reg n, Reg d, Reg m) {
     return true;
 }
 
+bool ThumbTranslatorVisitor::thumb32_UHSUB8(Reg n, Reg d, Reg m) {
+    if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
+        return UnpredictableInstruction();
+    }
+
+    const auto reg_m = ir.GetRegister(m);
+    const auto reg_n = ir.GetRegister(n);
+    const auto result = ir.PackedHalvingSubU8(reg_n, reg_m);
+
+    ir.SetRegister(d, result);
+    return true;
+}
+
 bool ThumbTranslatorVisitor::thumb32_UHSUB16(Reg n, Reg d, Reg m) {
     if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
         return UnpredictableInstruction();

src/frontend/A32/translate/impl/translate_thumb.h

@@ -159,11 +159,13 @@ struct ThumbTranslatorVisitor final {
     bool thumb32_SHADD16(Reg n, Reg d, Reg m);
     bool thumb32_SHASX(Reg n, Reg d, Reg m);
     bool thumb32_SHSAX(Reg n, Reg d, Reg m);
+    bool thumb32_SHSUB8(Reg n, Reg d, Reg m);
     bool thumb32_SHSUB16(Reg n, Reg d, Reg m);
     bool thumb32_UHADD8(Reg n, Reg d, Reg m);
     bool thumb32_UHADD16(Reg n, Reg d, Reg m);
     bool thumb32_UHASX(Reg n, Reg d, Reg m);
     bool thumb32_UHSAX(Reg n, Reg d, Reg m);
+    bool thumb32_UHSUB8(Reg n, Reg d, Reg m);
     bool thumb32_UHSUB16(Reg n, Reg d, Reg m);
 };
 

tests/A32/fuzz_thumb.cpp

@@ -440,6 +440,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") {
                      three_reg_not_r15),
         ThumbInstGen("111110101110nnnn1111dddd0010mmmm", // SHSAX
                      three_reg_not_r15),
+        ThumbInstGen("111110101100nnnn1111dddd0010mmmm", // SHSUB8
+                     three_reg_not_r15),
         ThumbInstGen("111110101101nnnn1111dddd0010mmmm", // SHSUB16
                      three_reg_not_r15),
         ThumbInstGen("111110101110nnnn1111dddd0000mmmm", // SSAX
@@ -462,6 +464,8 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") {
                      three_reg_not_r15),
         ThumbInstGen("111110101110nnnn1111dddd0110mmmm", // UHSAX
                      three_reg_not_r15),
+        ThumbInstGen("111110101100nnnn1111dddd0110mmmm", // UHSUB8
+                     three_reg_not_r15),
         ThumbInstGen("111110101101nnnn1111dddd0110mmmm", // UHSUB16
                      three_reg_not_r15),
         ThumbInstGen("111110101000nnnn1111dddd0101mmmm", // UQADD8