thumb32: Implement UMULL

This commit is contained in:
Lioncash 2021-02-07 17:29:20 -05:00
parent 6cf47e0ce0
commit 28108c7924
3 changed files with 22 additions and 1 deletions

View file

@ -281,7 +281,7 @@ INST(thumb32_USADA8, "USADA8", "111110110111nnnnaaaadd
// Long Multiply, Long Multiply Accumulate, and Divide
INST(thumb32_SMULL, "SMULL", "111110111000nnnnllllhhhh0000mmmm")
//INST(thumb32_SDIV, "SDIV", "111110111001------------1111----")
//INST(thumb32_UMULL, "UMULL", "111110111010------------0000----")
INST(thumb32_UMULL, "UMULL", "111110111010nnnnllllhhhh0000mmmm")
//INST(thumb32_UDIV, "UDIV", "111110111011------------1111----")
//INST(thumb32_SMLAL, "SMLAL", "111110111100------------0000----")
//INST(thumb32_SMLALXY, "SMLALXY", "111110111100------------10------")

View file

@ -27,4 +27,24 @@ bool ThumbTranslatorVisitor::thumb32_SMULL(Reg n, Reg dLo, Reg dHi, Reg m) {
return true;
}
bool ThumbTranslatorVisitor::thumb32_UMULL(Reg n, Reg dLo, Reg dHi, Reg m) {
if (dLo == Reg::PC || dHi == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
if (dHi == dLo) {
return UnpredictableInstruction();
}
const auto n64 = ir.ZeroExtendWordToLong(ir.GetRegister(n));
const auto m64 = ir.ZeroExtendWordToLong(ir.GetRegister(m));
const auto result = ir.Mul(n64, m64);
const auto lo = ir.LeastSignificantWord(result);
const auto hi = ir.MostSignificantWord(result).result;
ir.SetRegister(dLo, lo);
ir.SetRegister(dHi, hi);
return true;
}
} // namespace Dynarmic::A32

View file

@ -118,6 +118,7 @@ struct ThumbTranslatorVisitor final {
// thumb32 long multiply, long multiply accumulate, and divide instructions
bool thumb32_SMULL(Reg n, Reg dLo, Reg dHi, Reg m);
bool thumb32_UMULL(Reg n, Reg dLo, Reg dHi, Reg m);
// thumb32 miscellaneous instructions
bool thumb32_CLZ(Reg n, Reg d, Reg m);