thumb32: Implement SSAT/USAT

src/frontend/A32/decoder/thumb32.inc

@@ -77,15 +77,13 @@ INST(thumb32_MOVW_imm,       "MOVW (imm)",               "11110i100100iiii0iiidd
 //INST(thumb32_ADR,            "ADR",                      "11110-10101011110---------------")
 INST(thumb32_SUB_imm_2,      "SUB (imm)",                "11110i10101011010iiiddddiiiiiiii")
 INST(thumb32_MOVT,           "MOVT",                     "11110i101100iiii0iiiddddiiiiiiii")
-//INST(thumb32_SSAT,           "SSAT",                     "11110-110000----0---------------")
-//INST(thumb32_SSAT,           "SSAT",                     "11110-110010----0---------------")
 INST(thumb32_SSAT16,         "SSAT16",                   "111100110010nnnn0000dddd0000iiii")
+INST(thumb32_USAT16,         "USAT16",                   "111100111010nnnn0000dddd0000iiii")
+INST(thumb32_SSAT,           "SSAT",                     "1111001100s0nnnn0iiiddddii0bbbbb")
+INST(thumb32_USAT,           "USAT",                     "1111001110s0nnnn0iiiddddii0bbbbb")
 INST(thumb32_SBFX,           "SBFX",                     "111100110100nnnn0iiiddddii0wwwww")
 INST(thumb32_BFC,            "BFC",                      "11110011011011110iiiddddii0bbbbb")
 INST(thumb32_BFI,            "BFI",                      "111100110110nnnn0iiiddddii0bbbbb")
-//INST(thumb32_USAT,           "USAT",                     "11110-111000----0---------------")
-//INST(thumb32_USAT,           "USAT",                     "11110-111010----0---------------")
-INST(thumb32_USAT16,         "USAT16",                   "111100111010nnnn0000dddd0000iiii")
 INST(thumb32_UBFX,           "UBFX",                     "111100111100nnnn0iiiddddii0wwwww")
 
 // Branches and Miscellaneous Control

src/frontend/A32/translate/impl/thumb32_data_processing_plain_binary_immediate.cpp

@@ -3,6 +3,7 @@
  * SPDX-License-Identifier: 0BSD
  */
 
+#include "common/assert.h"
 #include "common/bit_util.h"
 #include "frontend/A32/translate/impl/translate_thumb.h"
 
@@ -17,6 +18,24 @@ static IR::U16 MostSignificantHalf(A32::IREmitter& ir, IR::U32 value) {
 
 using SaturationFunction = IR::ResultAndOverflow<IR::U32> (IREmitter::*)(const IR::U32&, size_t);
 
+static bool Saturation(ThumbTranslatorVisitor& v, bool sh, Reg n, Reg d, Imm<5> shift_amount, size_t saturate_to, SaturationFunction sat_fn) {
+    if (d == Reg::PC || n == Reg::PC) {
+        return v.UnpredictableInstruction();
+    }
+
+    if (sh && shift_amount == 0) {
+        ASSERT_FALSE("Invalid decode");
+    }
+
+    const auto shift = sh ? ShiftType::ASR : ShiftType::LSL;
+    const auto operand = v.EmitImmShift(v.ir.GetRegister(n), shift, shift_amount, v.ir.GetCFlag());
+    const auto result = (v.ir.*sat_fn)(operand.result, saturate_to);
+
+    v.ir.SetRegister(d, result.result);
+    v.ir.OrQFlag(result.overflow);
+    return true;
+}
+
 static bool Saturation16(ThumbTranslatorVisitor& v, Reg n, Reg d, size_t saturate_to, SaturationFunction sat_fn) {
     if (d == Reg::PC || n == Reg::PC) {
         return v.UnpredictableInstruction();
@@ -138,6 +157,10 @@ bool ThumbTranslatorVisitor::thumb32_SBFX(Reg n, Imm<3> imm3, Reg d, Imm<2> imm2
     return true;
 }
 
+bool ThumbTranslatorVisitor::thumb32_SSAT(bool sh, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm<5> sat_imm) {
+    return Saturation(*this, sh, n, d, concatenate(imm3, imm2), sat_imm.ZeroExtend() + 1, &IREmitter::SignedSaturation);
+}
+
 bool ThumbTranslatorVisitor::thumb32_SSAT16(Reg n, Reg d, Imm<4> sat_imm) {
     return Saturation16(*this, n, d, sat_imm.ZeroExtend() + 1, &IREmitter::SignedSaturation);
 }
@@ -175,6 +198,10 @@ bool ThumbTranslatorVisitor::thumb32_UBFX(Reg n, Imm<3> imm3, Reg d, Imm<2> imm2
     return true;
 }
 
+bool ThumbTranslatorVisitor::thumb32_USAT(bool sh, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm<5> sat_imm) {
+    return Saturation(*this, sh, n, d, concatenate(imm3, imm2), sat_imm.ZeroExtend(), &IREmitter::UnsignedSaturation);
+}
+
 bool ThumbTranslatorVisitor::thumb32_USAT16(Reg n, Reg d, Imm<4> sat_imm) {
     return Saturation16(*this, n, d, sat_imm.ZeroExtend(), &IREmitter::UnsignedSaturation);
 }

src/frontend/A32/translate/impl/translate_thumb.h

@@ -67,6 +67,8 @@ struct ThumbTranslatorVisitor final {
     bool UndefinedInstruction();
     bool RaiseException(Exception exception);
 
+    IR::ResultAndCarry<IR::U32> EmitImmShift(IR::U32 value, ShiftType type, Imm<5> imm5, IR::U1 carry_in);
+
     // thumb16
     bool thumb16_LSL_imm(Imm<5> imm5, Reg m, Reg d);
     bool thumb16_LSR_imm(Imm<5> imm5, Reg m, Reg d);
@@ -166,9 +168,11 @@ struct ThumbTranslatorVisitor final {
     bool thumb32_MOVT(Imm<1> imm1, Imm<4> imm4, Imm<3> imm3, Reg d, Imm<8> imm8);
     bool thumb32_MOVW_imm(Imm<1> imm1, Imm<4> imm4, Imm<3> imm3, Reg d, Imm<8> imm8);
     bool thumb32_SBFX(Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm<5> widthm1);
+    bool thumb32_SSAT(bool sh, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm<5> sat_imm);
     bool thumb32_SSAT16(Reg n, Reg d, Imm<4> sat_imm);
     bool thumb32_SUB_imm_2(Imm<1> imm1, Imm<3> imm3, Reg d, Imm<8> imm8);
     bool thumb32_UBFX(Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm<5> widthm1);
+    bool thumb32_USAT(bool sh, Reg n, Imm<3> imm3, Reg d, Imm<2> imm2, Imm<5> sat_imm);
     bool thumb32_USAT16(Reg n, Reg d, Imm<4> sat_imm);
 
     // thumb32 miscellaneous control instructions

src/frontend/A32/translate/translate_thumb.cpp

@@ -176,4 +176,25 @@ bool ThumbTranslatorVisitor::RaiseException(Exception exception) {
     return false;
 }
 
+IR::ResultAndCarry<IR::U32> ThumbTranslatorVisitor::EmitImmShift(IR::U32 value, ShiftType type, Imm<5> imm5, IR::U1 carry_in) {
+    u8 imm5_value = imm5.ZeroExtend<u8>();
+    switch (type) {
+    case ShiftType::LSL:
+        return ir.LogicalShiftLeft(value, ir.Imm8(imm5_value), carry_in);
+    case ShiftType::LSR:
+        imm5_value = imm5_value ? imm5_value : 32;
+        return ir.LogicalShiftRight(value, ir.Imm8(imm5_value), carry_in);
+    case ShiftType::ASR:
+        imm5_value = imm5_value ? imm5_value : 32;
+        return ir.ArithmeticShiftRight(value, ir.Imm8(imm5_value), carry_in);
+    case ShiftType::ROR:
+        if (imm5_value) {
+            return ir.RotateRight(value, ir.Imm8(imm5_value), carry_in);
+        } else {
+            return ir.RotateRightExtended(value, carry_in);
+        }
+    }
+    UNREACHABLE();
+}
+
 } // namespace Dynarmic::A32