a32_get_set_elimination_pass: New algorithm
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Merry
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76aa4dd665
commit
33fa44acf6
1 changed files with 120 additions and 107 deletions
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@ -17,59 +17,58 @@
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namespace Dynarmic::Optimization {
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void A32GetSetElimination(IR::Block& block, A32GetSetEliminationOptions opt) {
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using Iterator = IR::Block::iterator;
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void A32GetSetElimination(IR::Block& block, A32GetSetEliminationOptions) {
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using Iterator = std::reverse_iterator<IR::Block::iterator>;
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struct RegisterInfo {
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IR::Value register_value;
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bool set_instruction_present = false;
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Iterator last_set_instruction;
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bool set_not_required = false;
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bool has_value_request = false;
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Iterator value_request = {};
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};
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struct ValuelessRegisterInfo {
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bool set_not_required = false;
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};
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std::array<RegisterInfo, 15> reg_info;
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std::array<RegisterInfo, 64> ext_reg_singles_info;
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std::array<RegisterInfo, 32> ext_reg_doubles_info;
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std::array<RegisterInfo, 32> ext_reg_vector_double_info;
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std::array<RegisterInfo, 16> ext_reg_vector_quad_info;
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struct CpsrInfo {
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RegisterInfo nz;
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RegisterInfo c;
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RegisterInfo nzc;
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RegisterInfo nzcv;
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ValuelessRegisterInfo nzcvq;
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ValuelessRegisterInfo nzcv;
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ValuelessRegisterInfo nz;
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RegisterInfo c_flag;
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RegisterInfo ge;
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} cpsr_info;
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const auto do_delete_last_set = [&block](RegisterInfo& info) {
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if (info.set_instruction_present) {
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info.set_instruction_present = false;
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info.last_set_instruction->Invalidate();
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block.Instructions().erase(info.last_set_instruction);
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auto do_set = [&](RegisterInfo& info, IR::Value value, Iterator inst) {
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if (info.has_value_request) {
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info.value_request->ReplaceUsesWith(value);
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}
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info = {};
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};
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info.has_value_request = false;
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const auto do_set = [&do_delete_last_set](RegisterInfo& info, IR::Value value, Iterator set_inst) {
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do_delete_last_set(info);
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info.register_value = value;
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info.set_instruction_present = true;
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info.last_set_instruction = set_inst;
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};
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const auto do_set_without_inst = [&do_delete_last_set](RegisterInfo& info, IR::Value value) {
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do_delete_last_set(info);
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info.register_value = value;
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};
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const auto do_get = [](RegisterInfo& info, Iterator get_inst) {
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if (info.register_value.IsEmpty()) {
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info.register_value = IR::Value(&*get_inst);
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return;
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if (info.set_not_required) {
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inst->Invalidate();
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}
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get_inst->ReplaceUsesWith(info.register_value);
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info.set_not_required = true;
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};
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auto do_set_valueless = [&](ValuelessRegisterInfo& info, Iterator inst) {
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if (info.set_not_required) {
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inst->Invalidate();
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}
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info.set_not_required = true;
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};
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auto do_get = [](RegisterInfo& info, Iterator inst) {
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if (info.has_value_request) {
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info.value_request->ReplaceUsesWith(IR::Value{&*inst});
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}
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info.has_value_request = true;
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info.value_request = inst;
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};
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// Location and version don't matter here.
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A32::IREmitter ir{block, A32::LocationDescriptor{block.Location()}, {}};
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for (auto inst = block.begin(); inst != block.end(); ++inst) {
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for (auto inst = block.rbegin(); inst != block.rend(); ++inst) {
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switch (inst->GetOpcode()) {
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case IR::Opcode::A32SetRegister: {
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const A32::Reg reg = inst->GetArg(0).GetA32RegRef();
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@ -101,10 +100,6 @@ void A32GetSetElimination(IR::Block& block, A32GetSetEliminationOptions opt) {
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const A32::ExtReg reg = inst->GetArg(0).GetA32ExtRegRef();
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const size_t reg_index = A32::RegNumber(reg);
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do_get(ext_reg_singles_info[reg_index], inst);
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ext_reg_doubles_info[reg_index / 2] = {};
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ext_reg_vector_double_info[reg_index / 2] = {};
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ext_reg_vector_quad_info[reg_index / 4] = {};
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break;
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}
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case IR::Opcode::A32SetExtendedRegister64: {
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@ -122,11 +117,6 @@ void A32GetSetElimination(IR::Block& block, A32GetSetEliminationOptions opt) {
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const A32::ExtReg reg = inst->GetArg(0).GetA32ExtRegRef();
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const size_t reg_index = A32::RegNumber(reg);
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do_get(ext_reg_doubles_info[reg_index], inst);
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ext_reg_singles_info[reg_index * 2 + 0] = {};
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ext_reg_singles_info[reg_index * 2 + 1] = {};
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ext_reg_vector_double_info[reg_index] = {};
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ext_reg_vector_quad_info[reg_index / 2] = {};
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break;
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}
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case IR::Opcode::A32SetVector: {
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@ -160,100 +150,123 @@ void A32GetSetElimination(IR::Block& block, A32GetSetEliminationOptions opt) {
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const size_t reg_index = A32::RegNumber(reg);
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if (A32::IsDoubleExtReg(reg)) {
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do_get(ext_reg_vector_double_info[reg_index], inst);
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ext_reg_singles_info[reg_index * 2 + 0] = {};
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ext_reg_singles_info[reg_index * 2 + 1] = {};
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ext_reg_doubles_info[reg_index] = {};
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ext_reg_vector_quad_info[reg_index / 2] = {};
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} else {
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DEBUG_ASSERT(A32::IsQuadExtReg(reg));
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do_get(ext_reg_vector_quad_info[reg_index], inst);
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ext_reg_singles_info[reg_index * 4 + 0] = {};
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ext_reg_singles_info[reg_index * 4 + 1] = {};
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ext_reg_singles_info[reg_index * 4 + 2] = {};
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ext_reg_singles_info[reg_index * 4 + 3] = {};
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ext_reg_doubles_info[reg_index * 2 + 0] = {};
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ext_reg_doubles_info[reg_index * 2 + 1] = {};
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ext_reg_vector_double_info[reg_index * 2 + 0] = {};
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ext_reg_vector_double_info[reg_index * 2 + 1] = {};
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}
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break;
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}
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case IR::Opcode::A32GetCFlag: {
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if (cpsr_info.c.register_value.IsEmpty() && cpsr_info.nzcv.register_value.GetType() == IR::Type::NZCVFlags) {
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ir.SetInsertionPointBefore(inst);
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IR::U1 c = ir.GetCFlagFromNZCV(IR::NZCV{cpsr_info.nzcv.register_value});
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inst->ReplaceUsesWith(c);
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cpsr_info.c.register_value = c;
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do_get(c_flag, inst);
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break;
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}
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case IR::Opcode::A32SetCpsrNZCV: {
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if (c_flag.has_value_request) {
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ir.SetInsertionPointBefore(inst.base()); // base is one ahead
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IR::U1 c = ir.GetCFlagFromNZCV(IR::NZCV{inst->GetArg(0)});
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c_flag.value_request->ReplaceUsesWith(c);
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c_flag.has_value_request = false;
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break; // This case will be executed again because of the above
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}
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do_get(cpsr_info.c, inst);
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// ensure source is not deleted
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cpsr_info.nzc = {};
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cpsr_info.nzcv = {};
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do_set_valueless(nzcv, inst);
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nz = {.set_not_required = true};
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c_flag = {.set_not_required = true};
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break;
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}
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case IR::Opcode::A32SetCpsrNZCV:
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case IR::Opcode::A32SetCpsrNZCVRaw: {
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do_delete_last_set(cpsr_info.nz);
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do_delete_last_set(cpsr_info.c);
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do_delete_last_set(cpsr_info.nzc);
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do_set(cpsr_info.nzcv, inst->GetArg(0), inst);
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if (c_flag.has_value_request) {
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nzcv.set_not_required = false;
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}
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do_set_valueless(nzcv, inst);
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nzcvq = {};
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nz = {.set_not_required = true};
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c_flag = {.set_not_required = true};
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break;
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}
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case IR::Opcode::A32SetCpsrNZCVQ: {
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do_delete_last_set(cpsr_info.nz);
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do_delete_last_set(cpsr_info.c);
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do_delete_last_set(cpsr_info.nzc);
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do_delete_last_set(cpsr_info.nzcv);
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if (c_flag.has_value_request) {
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nzcvq.set_not_required = false;
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}
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do_set_valueless(nzcvq, inst);
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nzcv = {.set_not_required = true};
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nz = {.set_not_required = true};
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c_flag = {.set_not_required = true};
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break;
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}
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case IR::Opcode::A32SetCpsrNZ: {
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if (cpsr_info.nzc.set_instruction_present) {
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cpsr_info.nzc.last_set_instruction->SetArg(0, IR::Value::EmptyNZCVImmediateMarker());
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}
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do_set_valueless(nz, inst);
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if (opt.convert_nz_to_nzc && !cpsr_info.c.register_value.IsEmpty()) {
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ir.SetInsertionPointAfter(inst);
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ir.SetCpsrNZC(IR::NZCV{inst->GetArg(0)}, ir.GetCFlag());
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inst->Invalidate();
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break;
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}
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// cpsr_info.c remains valid
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cpsr_info.nzc = {};
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cpsr_info.nzcv = {};
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do_set(cpsr_info.nz, inst->GetArg(0), inst);
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nzcvq = {};
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nzcv = {};
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break;
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}
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case IR::Opcode::A32SetCpsrNZC: {
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if (opt.convert_nzc_to_nz && !inst->GetArg(1).IsImmediate() && inst->GetArg(1).GetInstRecursive()->GetOpcode() == IR::Opcode::A32GetCFlag) {
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ir.SetInsertionPointAfter(inst);
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ir.SetCpsrNZ(IR::NZCV{inst->GetArg(0)});
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if (c_flag.has_value_request) {
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c_flag.value_request->ReplaceUsesWith(inst->GetArg(1));
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c_flag.has_value_request = false;
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}
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if (!inst->GetArg(1).IsImmediate() && inst->GetArg(1).GetInstRecursive()->GetOpcode() == IR::Opcode::A32GetCFlag) {
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const auto nz_value = inst->GetArg(0);
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inst->Invalidate();
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ir.SetInsertionPointBefore(inst.base());
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ir.SetCpsrNZ(IR::NZCV{nz_value});
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nzcvq = {};
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nzcv = {};
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nz = {.set_not_required = true};
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break;
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}
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cpsr_info.nzcv = {};
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do_set(cpsr_info.nzc, {}, inst);
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do_set_without_inst(cpsr_info.nz, inst->GetArg(0));
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do_set_without_inst(cpsr_info.c, inst->GetArg(1));
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if (nz.set_not_required && c_flag.set_not_required) {
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inst->Invalidate();
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} else if (nz.set_not_required) {
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inst->SetArg(0, IR::Value::EmptyNZCVImmediateMarker());
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}
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nz.set_not_required = true;
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c_flag.set_not_required = true;
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nzcv = {};
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nzcvq = {};
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break;
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}
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case IR::Opcode::A32SetGEFlags: {
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do_set(cpsr_info.ge, inst->GetArg(0), inst);
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do_set(ge, inst->GetArg(0), inst);
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break;
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}
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case IR::Opcode::A32GetGEFlags: {
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do_get(cpsr_info.ge, inst);
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do_get(ge, inst);
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break;
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}
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case IR::Opcode::A32SetGEFlagsCompressed: {
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ge = {.set_not_required = true};
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break;
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}
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case IR::Opcode::A32OrQFlag: {
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break;
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}
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default: {
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if (inst->ReadsFromCPSR() || inst->WritesToCPSR()) {
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cpsr_info = {};
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nzcvq = {};
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nzcv = {};
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nz = {};
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c_flag = {};
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ge = {};
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}
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if (inst->ReadsFromCoreRegister() || inst->WritesToCoreRegister()) {
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reg_info = {};
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ext_reg_singles_info = {};
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ext_reg_doubles_info = {};
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ext_reg_vector_double_info = {};
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ext_reg_vector_quad_info = {};
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}
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break;
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}
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