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IR: Implement VectorExtract, VectorExtractLower IR instructions

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This commit is contained in:
MerryMage 2018-04-02 21:52:46 +01:00
parent 8bba37089e
commit 3472f371df
4 changed files with 46 additions and 0 deletions
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32
src/backend_x64/emit_x64_vector.cpp
View file

@ -487,6 +487,38 @@ void EmitX64::EmitVectorEqual128(EmitContext& ctx, IR::Inst* inst) {
}
}
void EmitX64::EmitVectorExtract(EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
const Xbyak::Xmm xmm_a = ctx.reg_alloc.UseScratchXmm(args[0]);
const Xbyak::Xmm xmm_b = ctx.reg_alloc.UseScratchXmm(args[1]);
const u8 position = args[2].GetImmediateU8();
ASSERT(position % 8 == 0);
code.psrldq(xmm_a, position / 8);
code.pslldq(xmm_b, (128 - position) / 8);
code.por(xmm_a, xmm_b);
ctx.reg_alloc.DefineValue(inst, xmm_a);
}
void EmitX64::EmitVectorExtractLower(EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
const Xbyak::Xmm xmm_a = ctx.reg_alloc.UseScratchXmm(args[0]);
const Xbyak::Xmm xmm_b = ctx.reg_alloc.UseScratchXmm(args[1]);
const u8 position = args[2].GetImmediateU8();
ASSERT(position % 8 == 0);
code.psrldq(xmm_a, position / 8);
code.pslldq(xmm_b, (64 - position) / 8);
code.por(xmm_a, xmm_b);
ctx.reg_alloc.DefineValue(inst, xmm_a);
}
void EmitX64::EmitVectorGreaterS8(EmitContext& ctx, IR::Inst* inst) {
EmitVectorOperation(code, ctx, inst, &Xbyak::CodeGenerator::pcmpgtb);
}

10
src/frontend/ir/ir_emitter.cpp
View file

@ -872,6 +872,16 @@ U128 IREmitter::VectorEqual(size_t esize, const U128& a, const U128& b) {
return {};
}
U128 IREmitter::VectorExtract(const U128& a, const U128& b, size_t position) {
ASSERT(position <= 128);
return Inst<U128>(Opcode::VectorExtract, a, b, Imm8(static_cast<u8>(position)));
}
U128 IREmitter::VectorExtractLower(const U128& a, const U128& b, size_t position) {
ASSERT(position <= 64);
return Inst<U128>(Opcode::VectorExtractLower, a, b, Imm8(static_cast<u8>(position)));
}
U128 IREmitter::VectorGreaterSigned(size_t esize, const U128& a, const U128& b) {
switch (esize) {
case 8:

2
src/frontend/ir/ir_emitter.h
View file

@ -215,6 +215,8 @@ public:
U128 VectorBroadcastLower(size_t esize, const UAny& a);
U128 VectorEor(const U128& a, const U128& b);
U128 VectorEqual(size_t esize, const U128& a, const U128& b);
U128 VectorExtract(const U128& a, const U128& b, size_t position);
U128 VectorExtractLower(const U128& a, const U128& b, size_t position);
U128 VectorGreaterEqualSigned(size_t esize, const U128& a, const U128& b);
U128 VectorGreaterEqualUnsigned(size_t esize, const U128& a, const U128& b);
U128 VectorGreaterSigned(size_t esize, const U128& a, const U128& b);

2
src/frontend/ir/opcodes.inc
View file

@ -233,6 +233,8 @@ OPCODE(VectorEqual16, T::U128, T::U128, T::U
OPCODE(VectorEqual32, T::U128, T::U128, T::U128 )
OPCODE(VectorEqual64, T::U128, T::U128, T::U128 )
OPCODE(VectorEqual128, T::U128, T::U128, T::U128 )
OPCODE(VectorExtract, T::U128, T::U128, T::U128, T::U8 )
OPCODE(VectorExtractLower, T::U128, T::U128, T::U128, T::U8 )
OPCODE(VectorGreaterS8, T::U128, T::U128, T::U128 )
OPCODE(VectorGreaterS16, T::U128, T::U128, T::U128 )
OPCODE(VectorGreaterS32, T::U128, T::U128, T::U128 )