IR: Implement VectorExtract, VectorExtractLower IR instructions
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4 changed files with 46 additions and 0 deletions
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@ -487,6 +487,38 @@ void EmitX64::EmitVectorEqual128(EmitContext& ctx, IR::Inst* inst) {
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}
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}
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}
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}
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void EmitX64::EmitVectorExtract(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm xmm_a = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm xmm_b = ctx.reg_alloc.UseScratchXmm(args[1]);
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const u8 position = args[2].GetImmediateU8();
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ASSERT(position % 8 == 0);
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code.psrldq(xmm_a, position / 8);
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code.pslldq(xmm_b, (128 - position) / 8);
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code.por(xmm_a, xmm_b);
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ctx.reg_alloc.DefineValue(inst, xmm_a);
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}
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void EmitX64::EmitVectorExtractLower(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm xmm_a = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm xmm_b = ctx.reg_alloc.UseScratchXmm(args[1]);
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const u8 position = args[2].GetImmediateU8();
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ASSERT(position % 8 == 0);
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code.psrldq(xmm_a, position / 8);
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code.pslldq(xmm_b, (64 - position) / 8);
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code.por(xmm_a, xmm_b);
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ctx.reg_alloc.DefineValue(inst, xmm_a);
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}
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void EmitX64::EmitVectorGreaterS8(EmitContext& ctx, IR::Inst* inst) {
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void EmitX64::EmitVectorGreaterS8(EmitContext& ctx, IR::Inst* inst) {
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EmitVectorOperation(code, ctx, inst, &Xbyak::CodeGenerator::pcmpgtb);
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EmitVectorOperation(code, ctx, inst, &Xbyak::CodeGenerator::pcmpgtb);
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}
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}
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@ -872,6 +872,16 @@ U128 IREmitter::VectorEqual(size_t esize, const U128& a, const U128& b) {
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return {};
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return {};
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}
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}
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U128 IREmitter::VectorExtract(const U128& a, const U128& b, size_t position) {
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ASSERT(position <= 128);
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return Inst<U128>(Opcode::VectorExtract, a, b, Imm8(static_cast<u8>(position)));
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}
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U128 IREmitter::VectorExtractLower(const U128& a, const U128& b, size_t position) {
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ASSERT(position <= 64);
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return Inst<U128>(Opcode::VectorExtractLower, a, b, Imm8(static_cast<u8>(position)));
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}
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U128 IREmitter::VectorGreaterSigned(size_t esize, const U128& a, const U128& b) {
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U128 IREmitter::VectorGreaterSigned(size_t esize, const U128& a, const U128& b) {
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switch (esize) {
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switch (esize) {
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case 8:
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case 8:
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@ -215,6 +215,8 @@ public:
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U128 VectorBroadcastLower(size_t esize, const UAny& a);
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U128 VectorBroadcastLower(size_t esize, const UAny& a);
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U128 VectorEor(const U128& a, const U128& b);
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U128 VectorEor(const U128& a, const U128& b);
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U128 VectorEqual(size_t esize, const U128& a, const U128& b);
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U128 VectorEqual(size_t esize, const U128& a, const U128& b);
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U128 VectorExtract(const U128& a, const U128& b, size_t position);
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U128 VectorExtractLower(const U128& a, const U128& b, size_t position);
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U128 VectorGreaterEqualSigned(size_t esize, const U128& a, const U128& b);
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U128 VectorGreaterEqualSigned(size_t esize, const U128& a, const U128& b);
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U128 VectorGreaterEqualUnsigned(size_t esize, const U128& a, const U128& b);
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U128 VectorGreaterEqualUnsigned(size_t esize, const U128& a, const U128& b);
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U128 VectorGreaterSigned(size_t esize, const U128& a, const U128& b);
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U128 VectorGreaterSigned(size_t esize, const U128& a, const U128& b);
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@ -233,6 +233,8 @@ OPCODE(VectorEqual16, T::U128, T::U128, T::U
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OPCODE(VectorEqual32, T::U128, T::U128, T::U128 )
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OPCODE(VectorEqual32, T::U128, T::U128, T::U128 )
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OPCODE(VectorEqual64, T::U128, T::U128, T::U128 )
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OPCODE(VectorEqual64, T::U128, T::U128, T::U128 )
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OPCODE(VectorEqual128, T::U128, T::U128, T::U128 )
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OPCODE(VectorEqual128, T::U128, T::U128, T::U128 )
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OPCODE(VectorExtract, T::U128, T::U128, T::U128, T::U8 )
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OPCODE(VectorExtractLower, T::U128, T::U128, T::U128, T::U8 )
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OPCODE(VectorGreaterS8, T::U128, T::U128, T::U128 )
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OPCODE(VectorGreaterS8, T::U128, T::U128, T::U128 )
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OPCODE(VectorGreaterS16, T::U128, T::U128, T::U128 )
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OPCODE(VectorGreaterS16, T::U128, T::U128, T::U128 )
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OPCODE(VectorGreaterS32, T::U128, T::U128, T::U128 )
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OPCODE(VectorGreaterS32, T::U128, T::U128, T::U128 )
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