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A64: Implement SQRDMULH's scalar vector variant

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Implements the scalar variant in terms of the vector variant for the
time being.
This commit is contained in:
Lioncash 2019-04-12 14:39:20 -04:00 committed by MerryMage
parent 4a3d808354
commit 3b46b4a37d
2 changed files with 17 additions and 1 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -504,7 +504,7 @@ INST(URSHL_1, "URSHL", "01111
//INST(UQRSHL_1, "UQRSHL", "01111110zz1mmmmm010111nnnnnddddd")
INST(SUB_1, "SUB (vector)", "01111110zz1mmmmm100001nnnnnddddd")
INST(CMEQ_reg_1, "CMEQ (register)", "01111110zz1mmmmm100011nnnnnddddd")
//INST(SQRDMULH_vec_1, "SQRDMULH (vector)", "01111110zz1mmmmm101101nnnnnddddd")
INST(SQRDMULH_vec_1, "SQRDMULH (vector)", "01111110zz1mmmmm101101nnnnnddddd")
// Data Processing - FP and SIMD - SIMD Scalar shift by immediate
INST(SSHR_1, "SSHR", "010111110IIIIiii000001nnnnnddddd")

16
src/frontend/A64/translate/impl/simd_scalar_three_same.cpp
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@ -155,6 +155,22 @@ bool TranslatorVisitor::SQDMULH_vec_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
return true;
}
bool TranslatorVisitor::SQRDMULH_vec_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
if (size == 0b00 || size == 0b11) {
return ReservedValue();
}
const size_t esize = 8 << size.ZeroExtend();
const IR::U128 operand1 = ir.ZeroExtendToQuad(ir.VectorGetElement(esize, V(128, Vn), 0));
const IR::U128 operand2 = ir.ZeroExtendToQuad(ir.VectorGetElement(esize, V(128, Vm), 0));
const IR::UpperAndLower multiply = ir.VectorSignedSaturatedDoublingMultiply(esize, operand1, operand2);
const IR::U128 result = ir.VectorAdd(esize, multiply.upper, ir.VectorLogicalShiftRight(esize, multiply.lower, static_cast<u8>(esize - 1)));
V_scalar(esize, Vd, ir.VectorGetElement(esize, result, 0));
return true;
}
bool TranslatorVisitor::SQSUB_1(Imm<2> size, Vec Vm, Vec Vn, Vec Vd) {
const size_t esize = 8 << size.ZeroExtend<size_t>();