test_generator: Generate Arm instructions
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1 changed files with 115 additions and 12 deletions
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@ -67,6 +67,72 @@ bool ShouldTestInst(u32 instruction, u32 pc, bool is_thumb, bool is_last_inst, A
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return true;
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return true;
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}
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}
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u32 GenRandomArmInst(u32 pc, bool is_last_inst) {
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static const struct InstructionGeneratorInfo {
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std::vector<InstructionGenerator> generators;
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std::vector<InstructionGenerator> invalid;
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} instructions = [] {
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const std::vector<std::tuple<std::string, const char*>> list{
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#define INST(fn, name, bitstring) {#fn, bitstring},
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#include "dynarmic/frontend/A32/decoder/arm.inc"
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//#include "dynarmic/frontend/A32/decoder/asimd.inc"
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//#include "dynarmic/frontend/A32/decoder/vfp.inc"
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#undef INST
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};
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std::vector<InstructionGenerator> generators;
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std::vector<InstructionGenerator> invalid;
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// List of instructions not to test
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static constexpr std::array do_not_test{
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// Translating load/stores
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"arm_LDRBT", "arm_LDRBT", "arm_LDRHT", "arm_LDRHT", "arm_LDRSBT", "arm_LDRSBT", "arm_LDRSHT", "arm_LDRSHT", "arm_LDRT", "arm_LDRT",
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"arm_STRBT", "arm_STRBT", "arm_STRHT", "arm_STRHT", "arm_STRT", "arm_STRT",
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// Exclusive load/stores
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"arm_LDREXB", "arm_LDREXD", "arm_LDREXH", "arm_LDREX", "arm_LDAEXB", "arm_LDAEXD", "arm_LDAEXH", "arm_LDAEX",
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"arm_STREXB", "arm_STREXD", "arm_STREXH", "arm_STREX", "arm_STLEXB", "arm_STLEXD", "arm_STLEXH", "arm_STLEX",
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"arm_SWP", "arm_SWPB",
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// Elevated load/store multiple instructions.
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"arm_LDM_eret", "arm_LDM_usr",
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"arm_STM_usr",
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// Coprocessor
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"arm_CDP", "arm_LDC", "arm_MCR", "arm_MCRR", "arm_MRC", "arm_MRRC", "arm_STC",
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// System
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"arm_CPS", "arm_RFE", "arm_SRS",
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// Undefined
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"arm_UDF",
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// FPSCR is inaccurate
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"vfp_VMRS",
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// Incorrect Unicorn implementations
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"asimd_VRECPS", // Unicorn does not fuse the multiply and subtraction, resulting in being off by 1ULP.
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"asimd_VRSQRTS", // Unicorn does not fuse the multiply and subtraction, resulting in being off by 1ULP.
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"vfp_VCVT_from_fixed", // Unicorn does not do round-to-nearest-even for this instruction correctly.
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};
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for (const auto& [fn, bitstring] : list) {
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if (std::find(do_not_test.begin(), do_not_test.end(), fn) != do_not_test.end()) {
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invalid.emplace_back(InstructionGenerator{bitstring});
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continue;
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}
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generators.emplace_back(InstructionGenerator{bitstring});
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}
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return InstructionGeneratorInfo{generators, invalid};
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}();
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while (true) {
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const size_t index = RandInt<size_t>(0, instructions.generators.size() - 1);
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const u32 inst = instructions.generators[index].Generate();
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if ((instructions.generators[index].Mask() & 0xF0000000) == 0 && (inst & 0xF0000000) == 0xF0000000) {
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continue;
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}
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if (ShouldTestInst(inst, pc, false, is_last_inst)) {
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return inst;
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}
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}
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}
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std::vector<u16> GenRandomThumbInst(u32 pc, bool is_last_inst, A32::ITState it_state = {}) {
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std::vector<u16> GenRandomThumbInst(u32 pc, bool is_last_inst, A32::ITState it_state = {}) {
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static const struct InstructionGeneratorInfo {
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static const struct InstructionGeneratorInfo {
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std::vector<InstructionGenerator> generators;
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std::vector<InstructionGenerator> generators;
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@ -259,9 +325,7 @@ static void RunTestInstance(Dynarmic::A32::Jit& jit,
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}
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}
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} // Anonymous namespace
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} // Anonymous namespace
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int main(int, char*[]) {
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void TestThumb(size_t num_instructions, size_t num_iterations = 100000) {
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detail::g_rand_int_generator.seed(42);
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ThumbTestEnv jit_env{};
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ThumbTestEnv jit_env{};
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Dynarmic::A32::Jit jit{GetUserConfig(jit_env)};
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Dynarmic::A32::Jit jit{GetUserConfig(jit_env)};
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@ -269,19 +333,58 @@ int main(int, char*[]) {
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std::array<u32, 64> ext_reg;
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std::array<u32, 64> ext_reg;
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std::vector<u16> instructions;
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std::vector<u16> instructions;
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for (size_t iteration = 0; iteration < 1000000; ++iteration) {
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for (size_t iteration = 0; iteration < num_iterations; ++iteration) {
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std::generate(regs.begin(), regs.end(), [] { return RandInt<u32>(0, ~u32(0)); });
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std::generate(regs.begin(), regs.end(), [] { return RandInt<u32>(0, ~u32(0)); });
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std::generate(ext_reg.begin(), ext_reg.end(), [] { return RandInt<u32>(0, ~u32(0)); });
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std::generate(ext_reg.begin(), ext_reg.end(), [] { return RandInt<u32>(0, ~u32(0)); });
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instructions = GenRandomThumbInst(0, true);
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const u32 start_address = 100;
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const u32 start_address = 100;
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const u32 cpsr = (RandInt<u32>(0, 0xF) << 28) | 0x1F0;
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const u32 cpsr = (RandInt<u32>(0, 0xF) << 28) | 0x1F0;
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const u32 fpcr = RandomFpcr();
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const u32 fpcr = RandomFpcr();
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instructions.clear();
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for (size_t i = 0; i < num_instructions; ++i) {
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const auto inst = GenRandomThumbInst(static_cast<u32>(start_address + 2 * instructions.size()), i == num_instructions - 1);
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instructions.insert(instructions.end(), inst.begin(), inst.end());
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}
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regs[15] = start_address;
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RunTestInstance(jit, jit_env, regs, ext_reg, instructions, cpsr, fpcr, num_instructions);
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}
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}
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void TestArm(size_t num_instructions, size_t num_iterations = 100000) {
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ArmTestEnv jit_env{};
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Dynarmic::A32::Jit jit{GetUserConfig(jit_env)};
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std::array<u32, 16> regs;
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std::array<u32, 64> ext_reg;
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std::vector<u32> instructions;
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for (size_t iteration = 0; iteration < num_iterations; ++iteration) {
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std::generate(regs.begin(), regs.end(), [] { return RandInt<u32>(0, ~u32(0)); });
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std::generate(ext_reg.begin(), ext_reg.end(), [] { return RandInt<u32>(0, ~u32(0)); });
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const u32 start_address = 100;
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const u32 cpsr = (RandInt<u32>(0, 0xF) << 28);
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const u32 fpcr = RandomFpcr();
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instructions.clear();
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for (size_t i = 0; i < num_instructions; ++i) {
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instructions.emplace_back(GenRandomArmInst(static_cast<u32>(start_address + 4 * instructions.size()), i == num_instructions - 1));
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}
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regs[15] = start_address;
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regs[15] = start_address;
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RunTestInstance(jit, jit_env, regs, ext_reg, instructions, cpsr, fpcr, 1);
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RunTestInstance(jit, jit_env, regs, ext_reg, instructions, cpsr, fpcr, 1);
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}
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}
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}
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int main(int, char*[]) {
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detail::g_rand_int_generator.seed(42069);
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TestThumb(1);
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TestArm(1);
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TestThumb(1024, 1000);
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TestArm(1024, 1000);
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return 0;
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return 0;
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}
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}
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