frontend/ir_emitter: Add half-precision opcode for FPVectorEquals
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4 changed files with 12 additions and 0 deletions
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@ -541,6 +541,14 @@ void EmitX64::EmitFPVectorDiv64(EmitContext& ctx, IR::Inst* inst) {
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EmitThreeOpVectorOperation<64, DefaultIndexer>(code, ctx, inst, &Xbyak::CodeGenerator::divpd);
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}
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void EmitX64::EmitFPVectorEqual16(EmitContext& ctx, IR::Inst* inst) {
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EmitThreeOpFallback(code, ctx, inst, [](VectorArray<u16>& result, const VectorArray<u16>& op1, const VectorArray<u16>& op2, FP::FPCR fpcr, FP::FPSR& fpsr) {
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for (size_t i = 0; i < result.size(); i++) {
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result[i] = FP::FPCompareEQ(op1[i], op2[i], fpcr, fpsr) ? 0xFFFF : 0;
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}
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});
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}
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void EmitX64::EmitFPVectorEqual32(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]);
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@ -2276,6 +2276,8 @@ U128 IREmitter::FPVectorDiv(size_t esize, const U128& a, const U128& b) {
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U128 IREmitter::FPVectorEqual(size_t esize, const U128& a, const U128& b) {
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switch (esize) {
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case 16:
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return Inst<U128>(Opcode::FPVectorEqual16, a, b);
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case 32:
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return Inst<U128>(Opcode::FPVectorEqual32, a, b);
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case 64:
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@ -339,6 +339,7 @@ bool Inst::ReadsFromAndWritesToFPSRCumulativeExceptionBits() const {
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case Opcode::FPVectorAdd64:
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case Opcode::FPVectorDiv32:
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case Opcode::FPVectorDiv64:
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case Opcode::FPVectorEqual16:
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case Opcode::FPVectorEqual32:
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case Opcode::FPVectorEqual64:
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case Opcode::FPVectorFromSignedFixed32:
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@ -554,6 +554,7 @@ OPCODE(FPVectorAdd32, U128, U128
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OPCODE(FPVectorAdd64, U128, U128, U128 )
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OPCODE(FPVectorDiv32, U128, U128, U128 )
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OPCODE(FPVectorDiv64, U128, U128, U128 )
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OPCODE(FPVectorEqual16, U128, U128, U128 )
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OPCODE(FPVectorEqual32, U128, U128, U128 )
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OPCODE(FPVectorEqual64, U128, U128, U128 )
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OPCODE(FPVectorFromSignedFixed32, U128, U128, U8, U8 )
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