A64: Implement FNEG

This commit is contained in:
MerryMage 2018-02-04 13:44:33 +00:00
parent db958061a3
commit 4491746eae
2 changed files with 13 additions and 1 deletions

View file

@ -909,7 +909,7 @@ INST(FCVTZU_float_int, "FCVTZU (scalar, integer)", "z0011
// Data Processing - FP and SIMD - Floating point data processing
//INST(FMOV_float, "FMOV (register)", "00011110yy100000010000nnnnnddddd")
INST(FABS_float, "FABS (scalar)", "00011110yy100000110000nnnnnddddd")
//INST(FNEG_float, "FNEG (scalar)", "00011110yy100001010000nnnnnddddd")
INST(FNEG_float, "FNEG (scalar)", "00011110yy100001010000nnnnnddddd")
//INST(FSQRT_float, "FSQRT (scalar)", "00011110yy100001110000nnnnnddddd")
INST(FCVT_float, "FCVT", "00011110yy10001oo10000nnnnnddddd")
//INST(FRINTN_float, "FRINTN (scalar)", "00011110yy100100010000nnnnnddddd")

View file

@ -34,6 +34,18 @@ bool TranslatorVisitor::FABS_float(Imm<2> type, Vec Vn, Vec Vd) {
return true;
}
bool TranslatorVisitor::FNEG_float(Imm<2> type, Vec Vn, Vec Vd) {
boost::optional<size_t> datasize = GetDataSize(type);
if (!datasize || *datasize == 16) {
return UnallocatedEncoding();
}
const IR::U32U64 operand = V_scalar(*datasize, Vn);
const IR::U32U64 result = ir.FPNeg(operand);
V_scalar(*datasize, Vd, result);
return true;
}
bool TranslatorVisitor::FMOV_float_imm(Imm<2> type, Imm<8> imm8, Vec Vd) {
boost::optional<size_t> datasize = GetDataSize(type);
if (!datasize) {