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emit_x64_vector: GNFI implementation of ArithmeticShiftRightByte

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The bit-matrix is generated up-front and added to the constant-pool.
I'm using an embedded 64-bit broadcast here(m64bcst) which is the particular
EVEX encoded version of the instruction with AVX512VL+GNFI.

If it ever really matters, then we would ideally detect specific host
features like bare-GFNI and specific subsets of AVX512 and emit
the assembly based on that rather than by the entire Icelake uarch.
This commit is contained in:
Wunkolo 2020-11-05 14:52:33 -08:00 committed by merry
parent 7df235aefb
commit 490160ef43
1 changed files with 8 additions and 0 deletions
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8
src/backend/x64/emit_x64_vector.cpp
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@ -439,6 +439,14 @@ void EmitX64::EmitVectorAnd(EmitContext& ctx, IR::Inst* inst) {
}
static void ArithmeticShiftRightByte(EmitContext& ctx, BlockOfCode& code, const Xbyak::Xmm& result, u8 shift_amount) {
if (code.HasAVX512_Icelake()) {
// Do a logical shift right upon the 8x8 bit-matrix, but shift in
// `0x80` bytes into the matrix to repeat the most significant bit.
const u64 zero_extend = ~(~0ull << (shift_amount)) & 0x8080808080808080;
const u64 shift_matrix = (0x0102040810204080 >> (shift_amount * 8)) | zero_extend;
code.vgf2p8affineqb(result, result, code.MConst(xword_b, shift_matrix), 0);
return;
}
const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
code.punpckhbw(tmp, result);