{a32,a64}_jitstate: Rename FPSCR_IDC to fpsr_idc

This commit is contained in:
MerryMage 2019-05-05 19:44:08 +01:00
parent 622c02f537
commit 49fca15f90
7 changed files with 11 additions and 11 deletions

View file

@ -270,7 +270,7 @@ void TransferJitState(A32JitState& dest, const A32JitState& src, bool reset_rsb)
dest.Reg = src.Reg; dest.Reg = src.Reg;
dest.ExtReg = src.ExtReg; dest.ExtReg = src.ExtReg;
dest.guest_MXCSR = src.guest_MXCSR; dest.guest_MXCSR = src.guest_MXCSR;
dest.FPSCR_IDC = src.FPSCR_IDC; dest.fpsr_idc = src.fpsr_idc;
dest.FPSCR_mode = src.FPSCR_mode; dest.FPSCR_mode = src.FPSCR_mode;
dest.FPSCR_nzcv = src.FPSCR_nzcv; dest.FPSCR_nzcv = src.FPSCR_nzcv;
if (reset_rsb) { if (reset_rsb) {

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@ -156,12 +156,12 @@ constexpr u32 FPSCR_NZCV_MASK = 0xF0000000;
u32 A32JitState::Fpscr() const { u32 A32JitState::Fpscr() const {
ASSERT((FPSCR_mode & ~FPSCR_MODE_MASK) == 0); ASSERT((FPSCR_mode & ~FPSCR_MODE_MASK) == 0);
ASSERT((FPSCR_nzcv & ~FPSCR_NZCV_MASK) == 0); ASSERT((FPSCR_nzcv & ~FPSCR_NZCV_MASK) == 0);
ASSERT((FPSCR_IDC & ~(1 << 7)) == 0); ASSERT((fpsr_idc & ~(1 << 7)) == 0);
u32 FPSCR = FPSCR_mode | FPSCR_nzcv; u32 FPSCR = FPSCR_mode | FPSCR_nzcv;
FPSCR |= (guest_MXCSR & 0b0000000000001); // IOC = IE FPSCR |= (guest_MXCSR & 0b0000000000001); // IOC = IE
FPSCR |= (guest_MXCSR & 0b0000000111100) >> 1; // IXC, UFC, OFC, DZC = PE, UE, OE, ZE FPSCR |= (guest_MXCSR & 0b0000000111100) >> 1; // IXC, UFC, OFC, DZC = PE, UE, OE, ZE
FPSCR |= FPSCR_IDC; FPSCR |= fpsr_idc;
FPSCR |= fpsr_exc; FPSCR |= fpsr_exc;
return FPSCR; return FPSCR;
@ -181,7 +181,7 @@ void A32JitState::SetFpscr(u32 FPSCR) {
guest_MXCSR |= MXCSR_RMode[(FPSCR >> 22) & 0x3]; guest_MXCSR |= MXCSR_RMode[(FPSCR >> 22) & 0x3];
// Cumulative flags IDC, IOC, IXC, UFC, OFC, DZC // Cumulative flags IDC, IOC, IXC, UFC, OFC, DZC
FPSCR_IDC = 0; fpsr_idc = 0;
fpsr_exc = FPSCR & 0x9F; fpsr_exc = FPSCR & 0x9F;
if (Common::Bit<24>(FPSCR)) { if (Common::Bit<24>(FPSCR)) {

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@ -69,7 +69,7 @@ struct A32JitState {
u32 fpsr_exc = 0; u32 fpsr_exc = 0;
u32 fpsr_qc = 0; // Dummy value u32 fpsr_qc = 0; // Dummy value
u32 FPSCR_IDC = 0; u32 fpsr_idc = 0;
u32 FPSCR_mode = 0; u32 FPSCR_mode = 0;
u32 FPSCR_nzcv = 0; u32 FPSCR_nzcv = 0;
u32 old_FPSCR = 0; u32 old_FPSCR = 0;

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@ -103,7 +103,7 @@ u32 A64JitState::GetFpsr() const {
u32 fpsr = 0; u32 fpsr = 0;
fpsr |= (guest_MXCSR & 0b0000000000001); // IOC = IE fpsr |= (guest_MXCSR & 0b0000000000001); // IOC = IE
fpsr |= (guest_MXCSR & 0b0000000111100) >> 1; // IXC, UFC, OFC, DZC = PE, UE, OE, ZE fpsr |= (guest_MXCSR & 0b0000000111100) >> 1; // IXC, UFC, OFC, DZC = PE, UE, OE, ZE
fpsr |= FPSCR_IDC; fpsr |= fpsr_idc;
fpsr |= fpsr_exc; fpsr |= fpsr_exc;
fpsr |= (fpsr_qc == 0 ? 0 : 1) << 27; fpsr |= (fpsr_qc == 0 ? 0 : 1) << 27;
return fpsr; return fpsr;
@ -111,7 +111,7 @@ u32 A64JitState::GetFpsr() const {
void A64JitState::SetFpsr(u32 value) { void A64JitState::SetFpsr(u32 value) {
guest_MXCSR &= ~0x0000003D; guest_MXCSR &= ~0x0000003D;
FPSCR_IDC = 0; fpsr_idc = 0;
fpsr_qc = (value >> 27) & 1; fpsr_qc = (value >> 27) & 1;
fpsr_exc = value & 0x9F; fpsr_exc = value & 0x9F;
} }

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@ -73,7 +73,7 @@ struct A64JitState {
u32 fpsr_exc = 0; u32 fpsr_exc = 0;
u32 fpsr_qc = 0; u32 fpsr_qc = 0;
u32 FPSCR_IDC = 0; u32 fpsr_idc = 0;
u32 fpcr = 0; u32 fpcr = 0;
u32 GetFpcr() const; u32 GetFpcr() const;
u32 GetFpsr() const; u32 GetFpsr() const;

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@ -114,7 +114,7 @@ void DenormalsAreZero(BlockOfCode& code, Xbyak::Xmm xmm_value, Xbyak::Reg64 gpr_
code.ja(end); code.ja(end);
code.andps(xmm_value, code.MConst(xword, fsize == 32 ? f32_negative_zero : f64_negative_zero)); code.andps(xmm_value, code.MConst(xword, fsize == 32 ? f32_negative_zero : f64_negative_zero));
code.mov(dword[r15 + code.GetJitStateInfo().offsetof_FPSCR_IDC], u32(1 << 7)); code.mov(dword[r15 + code.GetJitStateInfo().offsetof_fpsr_idc], u32(1 << 7));
code.L(end); code.L(end);
} }

View file

@ -24,7 +24,7 @@ struct JitStateInfo {
, offsetof_rsb_location_descriptors(offsetof(JitStateType, rsb_location_descriptors)) , offsetof_rsb_location_descriptors(offsetof(JitStateType, rsb_location_descriptors))
, offsetof_rsb_codeptrs(offsetof(JitStateType, rsb_codeptrs)) , offsetof_rsb_codeptrs(offsetof(JitStateType, rsb_codeptrs))
, offsetof_CPSR_nzcv(offsetof(JitStateType, CPSR_nzcv)) , offsetof_CPSR_nzcv(offsetof(JitStateType, CPSR_nzcv))
, offsetof_FPSCR_IDC(offsetof(JitStateType, FPSCR_IDC)) , offsetof_fpsr_idc(offsetof(JitStateType, fpsr_idc))
, offsetof_fpsr_exc(offsetof(JitStateType, fpsr_exc)) , offsetof_fpsr_exc(offsetof(JitStateType, fpsr_exc))
, offsetof_fpsr_qc(offsetof(JitStateType, fpsr_qc)) , offsetof_fpsr_qc(offsetof(JitStateType, fpsr_qc))
{} {}
@ -38,7 +38,7 @@ struct JitStateInfo {
const size_t offsetof_rsb_location_descriptors; const size_t offsetof_rsb_location_descriptors;
const size_t offsetof_rsb_codeptrs; const size_t offsetof_rsb_codeptrs;
const size_t offsetof_CPSR_nzcv; const size_t offsetof_CPSR_nzcv;
const size_t offsetof_FPSCR_IDC; const size_t offsetof_fpsr_idc;
const size_t offsetof_fpsr_exc; const size_t offsetof_fpsr_exc;
const size_t offsetof_fpsr_qc; const size_t offsetof_fpsr_qc;
}; };