thumb32: Implement SMUAD

This commit is contained in:
Lioncash 2021-02-07 13:04:18 -05:00
parent 1e06231575
commit 4d9a7308ac
3 changed files with 27 additions and 1 deletions

View file

@ -266,7 +266,7 @@ INST(thumb32_MLA, "MLA", "111110110000nnnnaaaadd
INST(thumb32_MLS, "MLS", "111110110000nnnnaaaadddd0001mmmm") INST(thumb32_MLS, "MLS", "111110110000nnnnaaaadddd0001mmmm")
INST(thumb32_SMULXY, "SMULXY", "111110110001nnnn1111dddd00NMmmmm") INST(thumb32_SMULXY, "SMULXY", "111110110001nnnn1111dddd00NMmmmm")
INST(thumb32_SMLAXY, "SMLAXY", "111110110001nnnnaaaadddd00NMmmmm") INST(thumb32_SMLAXY, "SMLAXY", "111110110001nnnnaaaadddd00NMmmmm")
//INST(thumb32_SMUAD, "SMUAD", "111110110010----1111----000-----") INST(thumb32_SMUAD, "SMUAD", "111110110010nnnn1111dddd000Mmmmm")
//INST(thumb32_SMLAD, "SMLAD", "111110110010------------000-----") //INST(thumb32_SMLAD, "SMLAD", "111110110010------------000-----")
//INST(thumb32_SMULWY, "SMULWY", "111110110011----1111----000-----") //INST(thumb32_SMULWY, "SMULWY", "111110110011----1111----000-----")
//INST(thumb32_SMLAWY, "SMLAWY", "111110110011------------000-----") //INST(thumb32_SMLAWY, "SMLAWY", "111110110011------------000-----")

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@ -67,6 +67,31 @@ bool ThumbTranslatorVisitor::thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M,
return true; return true;
} }
bool ThumbTranslatorVisitor::thumb32_SMUAD(Reg n, Reg d, bool M, Reg m) {
if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const IR::U32 n32 = ir.GetRegister(n);
const IR::U32 m32 = ir.GetRegister(m);
const IR::U32 n_lo = ir.SignExtendHalfToWord(ir.LeastSignificantHalf(n32));
const IR::U32 n_hi = ir.ArithmeticShiftRight(n32, ir.Imm8(16), ir.Imm1(0)).result;
IR::U32 m_lo = ir.SignExtendHalfToWord(ir.LeastSignificantHalf(m32));
IR::U32 m_hi = ir.ArithmeticShiftRight(m32, ir.Imm8(16), ir.Imm1(0)).result;
if (M) {
std::swap(m_lo, m_hi);
}
const IR::U32 product_lo = ir.Mul(n_lo, m_lo);
const IR::U32 product_hi = ir.Mul(n_hi, m_hi);
const auto result_overflow = ir.AddWithCarry(product_lo, product_hi, ir.Imm1(0));
ir.SetRegister(d, result_overflow.result);
ir.OrQFlag(result_overflow.overflow);
return true;
}
bool ThumbTranslatorVisitor::thumb32_SMULXY(Reg n, Reg d, bool N, bool M, Reg m) { bool ThumbTranslatorVisitor::thumb32_SMULXY(Reg n, Reg d, bool N, bool M, Reg m) {
if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction(); return UnpredictableInstruction();

View file

@ -133,6 +133,7 @@ struct ThumbTranslatorVisitor final {
bool thumb32_MLS(Reg n, Reg a, Reg d, Reg m); bool thumb32_MLS(Reg n, Reg a, Reg d, Reg m);
bool thumb32_MUL(Reg n, Reg d, Reg m); bool thumb32_MUL(Reg n, Reg d, Reg m);
bool thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M, Reg m); bool thumb32_SMLAXY(Reg n, Reg a, Reg d, bool N, bool M, Reg m);
bool thumb32_SMUAD(Reg n, Reg d, bool M, Reg m);
bool thumb32_SMULXY(Reg n, Reg d, bool N, bool M, Reg m); bool thumb32_SMULXY(Reg n, Reg d, bool N, bool M, Reg m);
bool thumb32_USAD8(Reg n, Reg d, Reg m); bool thumb32_USAD8(Reg n, Reg d, Reg m);
bool thumb32_USADA8(Reg n, Reg a, Reg d, Reg m); bool thumb32_USADA8(Reg n, Reg a, Reg d, Reg m);