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A64: Implement CMLE (zero)'s scalar variant

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Lioncash 2018-04-20 11:00:49 -04:00 committed by MerryMage
parent 6534184df2
commit 4ec735f707
2 changed files with 8 additions and 1 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -415,7 +415,7 @@ INST(ABS_1, "ABS", "01011
//INST(USQADD_1, "USQADD", "01111110zz100000001110nnnnnddddd")
//INST(SQNEG_1, "SQNEG", "01111110zz100000011110nnnnnddddd")
INST(CMGE_zero_1, "CMGE (zero)", "01111110zz100000100010nnnnnddddd")
//INST(CMLE_1, "CMLE (zero)", "01111110zz100000100110nnnnnddddd")
INST(CMLE_1, "CMLE (zero)", "01111110zz100000100110nnnnnddddd")
INST(NEG_1, "NEG (vector)", "01111110zz100000101110nnnnnddddd")
//INST(SQXTUN_1, "SQXTUN, SQXTUN2", "01111110zz100001001010nnnnnddddd")
//INST(UQXTN_1, "UQXTN, UQXTN2", "01111110zz100001010010nnnnnddddd")

7
src/frontend/A64/translate/impl/simd_scalar_three_same.cpp
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@ -16,6 +16,7 @@ enum class ComparisonType {
GT,
HI,
HS,
LE,
LT,
};
@ -48,6 +49,8 @@ bool ScalarCompare(TranslatorVisitor& v, Imm<2> size, boost::optional<Vec> Vm, V
return v.ir.VectorGreaterUnsigned(esize, operand1, operand2);
case ComparisonType::HS:
return v.ir.VectorGreaterEqualUnsigned(esize, operand1, operand2);
case ComparisonType::LE:
return v.ir.VectorLessEqualSigned(esize, operand1, operand2);
case ComparisonType::LT:
default:
return v.ir.VectorLessSigned(esize, operand1, operand2);
@ -97,6 +100,10 @@ bool TranslatorVisitor::CMGT_zero_1(Imm<2> size, Vec Vn, Vec Vd) {
return ScalarCompare(*this, size, {}, Vn, Vd, ComparisonType::GT, ComparisonVariant::Zero);
}
bool TranslatorVisitor::CMLE_1(Imm<2> size, Vec Vn, Vec Vd) {
return ScalarCompare(*this, size, {}, Vn, Vd, ComparisonType::LE, ComparisonVariant::Zero);
}
bool TranslatorVisitor::CMLT_1(Imm<2> size, Vec Vn, Vec Vd) {
return ScalarCompare(*this, size, {}, Vn, Vd, ComparisonType::LT, ComparisonVariant::Zero);
}