emit_x64_vector: Refactor pre-SSE4.1 min/max instruction replacements
This commit is contained in:
zmt00
merry
parent
60a6092b65
commit
4f08226e0e
1 changed files with 183 additions and 162 deletions
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@ -1954,6 +1954,92 @@ void EmitX64::EmitVectorLogicalVShift64(EmitContext& ctx, IR::Inst* inst) {
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});
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}
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namespace {
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enum class MinMaxOperation {
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Min,
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Max,
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};
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// Compute the minimum/maximum of two vectors of signed 8-bit integers, using only SSE2 instructons.
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// The result of the operation is placed in operand a, while b is unmodified.
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template<MinMaxOperation op>
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void FallbackMinMaxS8(BlockOfCode& code, EmitContext& ctx, const Xbyak::Xmm& a, const Xbyak::Xmm& b) {
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const Xbyak::Xmm c = ctx.reg_alloc.ScratchXmm();
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if constexpr (op == MinMaxOperation::Min) {
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code.movdqa(c, b);
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code.pcmpgtb(c, a);
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} else {
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code.movdqa(c, a);
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code.pcmpgtb(c, b);
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}
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code.pand(a, c);
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code.pandn(c, b);
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code.por(a, c);
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}
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// Compute the minimum/maximum of two vectors of unsigned 16-bit integers, using only SSE2 instructons.
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// The result of the operation is placed in operand a, while b is unmodified.
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template<MinMaxOperation op>
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void FallbackMinMaxU16(BlockOfCode& code, EmitContext& ctx, const Xbyak::Xmm& a, const Xbyak::Xmm& b) {
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if constexpr (op == MinMaxOperation::Min) {
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const Xbyak::Xmm c = ctx.reg_alloc.ScratchXmm();
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code.movdqa(c, a);
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code.psubusw(c, b);
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code.psubw(a, c);
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} else {
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code.psubusw(a, b);
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code.paddw(a, b);
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}
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}
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// Compute the minimum/maximum of two vectors of signed 32-bit integers, using only SSE2 instructons.
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// The result of the operation is placed in operand a, while b is unmodified.
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template<MinMaxOperation op>
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void FallbackMinMaxS32(BlockOfCode& code, EmitContext& ctx, const Xbyak::Xmm& a, const Xbyak::Xmm& b) {
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const Xbyak::Xmm c = ctx.reg_alloc.ScratchXmm();
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if constexpr (op == MinMaxOperation::Min) {
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code.movdqa(c, b);
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code.pcmpgtd(c, a);
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} else {
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code.movdqa(c, a);
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code.pcmpgtd(c, b);
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}
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code.pand(a, c);
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code.pandn(c, b);
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code.por(a, c);
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}
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// Compute the minimum/maximum of two vectors of unsigned 32-bit integers, using only SSE2 instructons.
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// The result of the operation is placed in operand a, while b is unmodified.
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template<MinMaxOperation op>
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void FallbackMinMaxU32(BlockOfCode& code, EmitContext& ctx, const Xbyak::Xmm& a, const Xbyak::Xmm& b) {
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const Xbyak::Xmm c = ctx.reg_alloc.ScratchXmm();
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code.movdqa(c, code.BConst<32>(xword, 0x80000000));
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// bias a and b by XORing their sign bits, then use the signed comparison function
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const Xbyak::Xmm d = ctx.reg_alloc.ScratchXmm();
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if constexpr (op == MinMaxOperation::Min) {
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code.movdqa(d, a);
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code.pxor(d, c);
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code.pxor(c, b);
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} else {
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code.movdqa(d, b);
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code.pxor(d, c);
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code.pxor(c, a);
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}
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code.pcmpgtd(c, d);
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code.pand(a, c);
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code.pandn(c, b);
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code.por(a, c);
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}
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} // anonymous namespace
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void EmitX64::EmitVectorMaxS8(EmitContext& ctx, IR::Inst* inst) {
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if (code.HasHostFeature(HostFeature::SSE41)) {
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EmitVectorOperation(code, ctx, inst, &Xbyak::CodeGenerator::pmaxsb);
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@ -1962,17 +2048,11 @@ void EmitX64::EmitVectorMaxS8(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm b = ctx.reg_alloc.UseScratchXmm(args[1]);
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const Xbyak::Xmm b = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm tmp_b = ctx.reg_alloc.ScratchXmm();
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code.movdqa(tmp_b, b);
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FallbackMinMaxS8<MinMaxOperation::Max>(code, ctx, a, b);
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code.pcmpgtb(tmp_b, a);
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code.pand(b, tmp_b);
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code.pandn(tmp_b, a);
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code.por(tmp_b, b);
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ctx.reg_alloc.DefineValue(inst, tmp_b);
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ctx.reg_alloc.DefineValue(inst, a);
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}
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void EmitX64::EmitVectorMaxS16(EmitContext& ctx, IR::Inst* inst) {
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@ -1987,17 +2067,11 @@ void EmitX64::EmitVectorMaxS32(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm b = ctx.reg_alloc.UseScratchXmm(args[1]);
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const Xbyak::Xmm b = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm tmp_b = ctx.reg_alloc.ScratchXmm();
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code.movdqa(tmp_b, b);
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FallbackMinMaxS32<MinMaxOperation::Max>(code, ctx, a, b);
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code.pcmpgtd(tmp_b, a);
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code.pand(b, tmp_b);
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code.pandn(tmp_b, a);
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code.por(tmp_b, b);
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ctx.reg_alloc.DefineValue(inst, tmp_b);
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ctx.reg_alloc.DefineValue(inst, a);
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}
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void EmitX64::EmitVectorMaxS64(EmitContext& ctx, IR::Inst* inst) {
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@ -2038,8 +2112,7 @@ void EmitX64::EmitVectorMaxU16(EmitContext& ctx, IR::Inst* inst) {
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const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm b = ctx.reg_alloc.UseXmm(args[1]);
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code.psubusw(a, b);
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code.paddw(a, b);
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FallbackMinMaxU16<MinMaxOperation::Max>(code, ctx, a, b);
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ctx.reg_alloc.DefineValue(inst, a);
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}
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@ -2054,19 +2127,7 @@ void EmitX64::EmitVectorMaxU32(EmitContext& ctx, IR::Inst* inst) {
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const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm b = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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code.movdqa(tmp, code.Const(xword, 0x8000000080000000, 0x8000000080000000));
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const Xbyak::Xmm tmp_b = ctx.reg_alloc.ScratchXmm();
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code.movdqa(tmp_b, b);
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code.pxor(tmp_b, tmp);
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code.pxor(tmp, a);
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code.pcmpgtd(tmp, tmp_b);
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code.pand(a, tmp);
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code.pandn(tmp, b);
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code.por(a, tmp);
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FallbackMinMaxU32<MinMaxOperation::Max>(code, ctx, a, b);
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ctx.reg_alloc.DefineValue(inst, a);
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}
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@ -2109,13 +2170,7 @@ void EmitX64::EmitVectorMinS8(EmitContext& ctx, IR::Inst* inst) {
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const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm b = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm tmp_b = ctx.reg_alloc.ScratchXmm();
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code.movdqa(tmp_b, b);
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code.pcmpgtb(tmp_b, a);
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code.pand(a, tmp_b);
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code.pandn(tmp_b, b);
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code.por(a, tmp_b);
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FallbackMinMaxS8<MinMaxOperation::Min>(code, ctx, a, b);
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ctx.reg_alloc.DefineValue(inst, a);
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}
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@ -2134,13 +2189,7 @@ void EmitX64::EmitVectorMinS32(EmitContext& ctx, IR::Inst* inst) {
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const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm b = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm tmp_b = ctx.reg_alloc.ScratchXmm();
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code.movdqa(tmp_b, b);
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code.pcmpgtd(tmp_b, a);
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code.pand(a, tmp_b);
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code.pandn(tmp_b, b);
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code.por(a, tmp_b);
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FallbackMinMaxS32<MinMaxOperation::Min>(code, ctx, a, b);
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ctx.reg_alloc.DefineValue(inst, a);
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}
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@ -2180,16 +2229,12 @@ void EmitX64::EmitVectorMinU16(EmitContext& ctx, IR::Inst* inst) {
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}
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm a = ctx.reg_alloc.UseXmm(args[0]);
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const Xbyak::Xmm b = ctx.reg_alloc.UseScratchXmm(args[1]);
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const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm b = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm tmp_b = ctx.reg_alloc.ScratchXmm();
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code.movdqa(tmp_b, b);
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FallbackMinMaxU16<MinMaxOperation::Min>(code, ctx, a, b);
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code.psubusw(tmp_b, a);
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code.psubw(b, tmp_b);
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ctx.reg_alloc.DefineValue(inst, b);
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ctx.reg_alloc.DefineValue(inst, a);
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}
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void EmitX64::EmitVectorMinU32(EmitContext& ctx, IR::Inst* inst) {
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@ -2202,21 +2247,7 @@ void EmitX64::EmitVectorMinU32(EmitContext& ctx, IR::Inst* inst) {
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const Xbyak::Xmm a = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm b = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm sint_max_plus_one = ctx.reg_alloc.ScratchXmm();
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code.movdqa(sint_max_plus_one, code.Const(xword, 0x8000000080000000, 0x8000000080000000));
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const Xbyak::Xmm tmp_a = ctx.reg_alloc.ScratchXmm();
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code.movdqa(tmp_a, a);
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code.psubd(tmp_a, sint_max_plus_one);
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const Xbyak::Xmm tmp_b = ctx.reg_alloc.ScratchXmm();
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code.movdqa(tmp_b, b);
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code.psubd(tmp_b, sint_max_plus_one);
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code.pcmpgtd(tmp_b, tmp_a);
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code.pand(a, tmp_b);
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code.pandn(tmp_b, b);
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code.por(a, tmp_b);
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FallbackMinMaxU32<MinMaxOperation::Min>(code, ctx, a, b);
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ctx.reg_alloc.DefineValue(inst, a);
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}
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@ -2779,22 +2810,6 @@ static void LowerPairedMin(VectorArray<T>& result, const VectorArray<T>& x, cons
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LowerPairedOperation(result, x, y, [](auto a, auto b) { return std::min(a, b); });
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}
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template<typename Function>
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static void EmitVectorPairedMinMaxLower8(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm x = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm y = ctx.reg_alloc.UseScratchXmm(args[1]);
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code.punpcklqdq(x, y);
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code.pshufb(x, code.Const(xword, 0x0E'0C'0A'08'06'04'02'00, 0x0F'0D'0B'09'07'05'03'01));
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code.movhlps(y, x);
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code.movq(x, x);
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(code.*fn)(x, y);
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ctx.reg_alloc.DefineValue(inst, x);
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}
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template<typename Function>
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static void EmitVectorPairedMinMax8(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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@ -2812,7 +2827,33 @@ static void EmitVectorPairedMinMax8(BlockOfCode& code, EmitContext& ctx, IR::Ins
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code.shufps(x, y, 0b11'10'11'10);
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if constexpr (std::is_member_function_pointer_v<Function>) {
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(code.*fn)(x, tmp);
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} else {
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fn(x, tmp);
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}
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ctx.reg_alloc.DefineValue(inst, x);
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}
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template<typename Function>
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static void EmitVectorPairedMinMaxLower8(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst, Function fn) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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const Xbyak::Xmm x = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm y = ctx.reg_alloc.UseScratchXmm(args[1]);
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code.punpcklqdq(x, y);
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code.pshufb(x, code.Const(xword, 0x0E'0C'0A'08'06'04'02'00, 0x0F'0D'0B'09'07'05'03'01));
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code.movhlps(y, x);
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code.movq(x, x);
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if constexpr (std::is_member_function_pointer_v<Function>) {
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(code.*fn)(x, y);
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} else {
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fn(x, y);
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}
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ctx.reg_alloc.DefineValue(inst, x);
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}
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@ -2839,7 +2880,11 @@ static void EmitVectorPairedMinMax16(BlockOfCode& code, EmitContext& ctx, IR::In
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// x = x[1, 3], x[5, 7], y[1, 3], y[5, 7]
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code.shufps(x, y, 0b11'01'11'01);
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if constexpr (std::is_member_function_pointer_v<Function>) {
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(code.*fn)(x, tmp);
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} else {
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fn(x, tmp);
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}
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ctx.reg_alloc.DefineValue(inst, x);
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}
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@ -2891,6 +2936,11 @@ void EmitX64::EmitVectorPairedMaxS8(EmitContext& ctx, IR::Inst* inst) {
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if (code.HasHostFeature(HostFeature::SSE41)) {
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EmitVectorPairedMinMax8(code, ctx, inst, &Xbyak::CodeGenerator::pmaxsb);
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return;
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} else if (code.HasHostFeature(HostFeature::SSSE3)) {
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EmitVectorPairedMinMax8(code, ctx, inst, [&](const auto& lhs, const auto& rhs) {
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FallbackMinMaxS8<MinMaxOperation::Max>(code, ctx, lhs, rhs);
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});
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return;
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}
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EmitTwoArgumentFallback(code, ctx, inst, [](VectorArray<s8>& result, const VectorArray<s8>& a, const VectorArray<s8>& b) {
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@ -2915,19 +2965,11 @@ void EmitX64::EmitVectorPairedMaxS32(EmitContext& ctx, IR::Inst* inst) {
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if (code.HasHostFeature(HostFeature::SSE41)) {
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code.pmaxsd(x, tmp);
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} else {
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FallbackMinMaxS32<MinMaxOperation::Max>(code, ctx, x, tmp);
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}
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ctx.reg_alloc.DefineValue(inst, x);
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} else {
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const Xbyak::Xmm tmp2 = ctx.reg_alloc.ScratchXmm();
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code.movdqa(tmp2, tmp);
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code.pcmpgtd(tmp2, x);
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code.pand(tmp, tmp2);
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code.pandn(tmp2, x);
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code.por(tmp2, tmp);
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ctx.reg_alloc.DefineValue(inst, tmp2);
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}
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}
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void EmitX64::EmitVectorPairedMaxU8(EmitContext& ctx, IR::Inst* inst) {
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@ -2944,12 +2986,11 @@ void EmitX64::EmitVectorPairedMaxU8(EmitContext& ctx, IR::Inst* inst) {
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void EmitX64::EmitVectorPairedMaxU16(EmitContext& ctx, IR::Inst* inst) {
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if (code.HasHostFeature(HostFeature::SSE41)) {
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EmitVectorPairedMinMax16(code, ctx, inst, &Xbyak::CodeGenerator::pmaxuw);
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return;
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}
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EmitTwoArgumentFallback(code, ctx, inst, [](VectorArray<u16>& result, const VectorArray<u16>& a, const VectorArray<u16>& b) {
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PairedMax(result, a, b);
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} else {
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EmitVectorPairedMinMax16(code, ctx, inst, [&](const auto& lhs, const auto& rhs) {
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FallbackMinMaxU16<MinMaxOperation::Max>(code, ctx, lhs, rhs);
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});
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}
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}
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void EmitX64::EmitVectorPairedMaxU32(EmitContext& ctx, IR::Inst* inst) {
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@ -2957,38 +2998,30 @@ void EmitX64::EmitVectorPairedMaxU32(EmitContext& ctx, IR::Inst* inst) {
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const Xbyak::Xmm x = ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm y = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm tmp1 = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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code.movdqa(tmp1, x);
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code.shufps(tmp1, y, 0b10001000);
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code.movdqa(tmp, x);
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code.shufps(tmp, y, 0b10001000);
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code.shufps(x, y, 0b11011101);
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if (code.HasHostFeature(HostFeature::SSE41)) {
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code.pmaxud(x, tmp1);
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code.pmaxud(x, tmp);
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} else {
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FallbackMinMaxU32<MinMaxOperation::Max>(code, ctx, x, tmp);
|
||||
}
|
||||
|
||||
ctx.reg_alloc.DefineValue(inst, x);
|
||||
} else {
|
||||
const Xbyak::Xmm tmp3 = ctx.reg_alloc.ScratchXmm();
|
||||
code.movdqa(tmp3, code.Const(xword, 0x8000000080000000, 0x8000000080000000));
|
||||
|
||||
const Xbyak::Xmm tmp2 = ctx.reg_alloc.ScratchXmm();
|
||||
code.movdqa(tmp2, x);
|
||||
|
||||
code.pxor(tmp2, tmp3);
|
||||
code.pxor(tmp3, tmp1);
|
||||
code.pcmpgtd(tmp3, tmp2);
|
||||
code.pand(tmp1, tmp3);
|
||||
code.pandn(tmp3, x);
|
||||
code.por(tmp1, tmp3);
|
||||
|
||||
ctx.reg_alloc.DefineValue(inst, tmp1);
|
||||
}
|
||||
}
|
||||
|
||||
void EmitX64::EmitVectorPairedMinS8(EmitContext& ctx, IR::Inst* inst) {
|
||||
if (code.HasHostFeature(HostFeature::SSE41)) {
|
||||
EmitVectorPairedMinMax8(code, ctx, inst, &Xbyak::CodeGenerator::pminsb);
|
||||
return;
|
||||
} else if (code.HasHostFeature(HostFeature::SSSE3)) {
|
||||
EmitVectorPairedMinMax8(code, ctx, inst, [&](const auto& lhs, const auto& rhs) {
|
||||
FallbackMinMaxS8<MinMaxOperation::Min>(code, ctx, lhs, rhs);
|
||||
});
|
||||
return;
|
||||
}
|
||||
|
||||
EmitTwoArgumentFallback(code, ctx, inst, [](VectorArray<s8>& result, const VectorArray<s8>& a, const VectorArray<s8>& b) {
|
||||
|
|
@ -3013,19 +3046,11 @@ void EmitX64::EmitVectorPairedMinS32(EmitContext& ctx, IR::Inst* inst) {
|
|||
|
||||
if (code.HasHostFeature(HostFeature::SSE41)) {
|
||||
code.pminsd(x, tmp);
|
||||
} else {
|
||||
FallbackMinMaxS32<MinMaxOperation::Min>(code, ctx, x, tmp);
|
||||
}
|
||||
|
||||
ctx.reg_alloc.DefineValue(inst, x);
|
||||
} else {
|
||||
const Xbyak::Xmm tmp2 = ctx.reg_alloc.ScratchXmm();
|
||||
|
||||
code.movaps(tmp2, x);
|
||||
code.pcmpgtd(tmp2, tmp);
|
||||
code.pand(tmp, tmp2);
|
||||
code.pandn(tmp2, x);
|
||||
code.por(tmp2, tmp);
|
||||
|
||||
ctx.reg_alloc.DefineValue(inst, tmp2);
|
||||
}
|
||||
}
|
||||
|
||||
void EmitX64::EmitVectorPairedMinU8(EmitContext& ctx, IR::Inst* inst) {
|
||||
|
|
@ -3042,12 +3067,11 @@ void EmitX64::EmitVectorPairedMinU8(EmitContext& ctx, IR::Inst* inst) {
|
|||
void EmitX64::EmitVectorPairedMinU16(EmitContext& ctx, IR::Inst* inst) {
|
||||
if (code.HasHostFeature(HostFeature::SSE41)) {
|
||||
EmitVectorPairedMinMax16(code, ctx, inst, &Xbyak::CodeGenerator::pminuw);
|
||||
return;
|
||||
}
|
||||
|
||||
EmitTwoArgumentFallback(code, ctx, inst, [](VectorArray<u16>& result, const VectorArray<u16>& a, const VectorArray<u16>& b) {
|
||||
PairedMin(result, a, b);
|
||||
} else {
|
||||
EmitVectorPairedMinMax16(code, ctx, inst, [&](const auto& lhs, const auto& rhs) {
|
||||
FallbackMinMaxU16<MinMaxOperation::Min>(code, ctx, lhs, rhs);
|
||||
});
|
||||
}
|
||||
}
|
||||
|
||||
void EmitX64::EmitVectorPairedMinU32(EmitContext& ctx, IR::Inst* inst) {
|
||||
|
|
@ -3055,38 +3079,30 @@ void EmitX64::EmitVectorPairedMinU32(EmitContext& ctx, IR::Inst* inst) {
|
|||
|
||||
const Xbyak::Xmm x = ctx.reg_alloc.UseScratchXmm(args[0]);
|
||||
const Xbyak::Xmm y = ctx.reg_alloc.UseXmm(args[1]);
|
||||
const Xbyak::Xmm tmp1 = ctx.reg_alloc.ScratchXmm();
|
||||
const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
|
||||
|
||||
code.movdqa(tmp1, x);
|
||||
code.shufps(tmp1, y, 0b10001000);
|
||||
code.movdqa(tmp, x);
|
||||
code.shufps(tmp, y, 0b10001000);
|
||||
code.shufps(x, y, 0b11011101);
|
||||
|
||||
if (code.HasHostFeature(HostFeature::SSE41)) {
|
||||
code.pminud(x, tmp1);
|
||||
code.pminud(x, tmp);
|
||||
} else {
|
||||
FallbackMinMaxU32<MinMaxOperation::Min>(code, ctx, x, tmp);
|
||||
}
|
||||
|
||||
ctx.reg_alloc.DefineValue(inst, x);
|
||||
} else {
|
||||
const Xbyak::Xmm tmp3 = ctx.reg_alloc.ScratchXmm();
|
||||
code.movdqa(tmp3, code.Const(xword, 0x8000000080000000, 0x8000000080000000));
|
||||
|
||||
const Xbyak::Xmm tmp2 = ctx.reg_alloc.ScratchXmm();
|
||||
code.movdqa(tmp2, tmp1);
|
||||
|
||||
code.pxor(tmp2, tmp3);
|
||||
code.pxor(tmp3, x);
|
||||
code.pcmpgtd(tmp3, tmp2);
|
||||
code.pand(tmp1, tmp3);
|
||||
code.pandn(tmp3, x);
|
||||
code.por(tmp1, tmp3);
|
||||
|
||||
ctx.reg_alloc.DefineValue(inst, tmp1);
|
||||
}
|
||||
}
|
||||
|
||||
void EmitX64::EmitVectorPairedMaxLowerS8(EmitContext& ctx, IR::Inst* inst) {
|
||||
if (code.HasHostFeature(HostFeature::SSE41)) {
|
||||
EmitVectorPairedMinMaxLower8(code, ctx, inst, &Xbyak::CodeGenerator::pmaxsb);
|
||||
return;
|
||||
} else if (code.HasHostFeature(HostFeature::SSSE3)) {
|
||||
EmitVectorPairedMinMaxLower8(code, ctx, inst, [&](const auto& lhs, const auto& rhs) {
|
||||
FallbackMinMaxS8<MinMaxOperation::Max>(code, ctx, lhs, rhs);
|
||||
});
|
||||
return;
|
||||
}
|
||||
|
||||
EmitTwoArgumentFallback(code, ctx, inst, [](VectorArray<s8>& result, const VectorArray<s8>& a, const VectorArray<s8>& b) {
|
||||
|
|
@ -3117,7 +3133,7 @@ void EmitX64::EmitVectorPairedMaxLowerS32(EmitContext& ctx, IR::Inst* inst) {
|
|||
}
|
||||
|
||||
void EmitX64::EmitVectorPairedMaxLowerU8(EmitContext& ctx, IR::Inst* inst) {
|
||||
if (code.HasHostFeature(HostFeature::SSE41)) {
|
||||
if (code.HasHostFeature(HostFeature::SSSE3)) {
|
||||
EmitVectorPairedMinMaxLower8(code, ctx, inst, &Xbyak::CodeGenerator::pmaxub);
|
||||
return;
|
||||
}
|
||||
|
|
@ -3153,6 +3169,11 @@ void EmitX64::EmitVectorPairedMinLowerS8(EmitContext& ctx, IR::Inst* inst) {
|
|||
if (code.HasHostFeature(HostFeature::SSE41)) {
|
||||
EmitVectorPairedMinMaxLower8(code, ctx, inst, &Xbyak::CodeGenerator::pminsb);
|
||||
return;
|
||||
} else if (code.HasHostFeature(HostFeature::SSSE3)) {
|
||||
EmitVectorPairedMinMaxLower8(code, ctx, inst, [&](const auto& lhs, const auto& rhs) {
|
||||
FallbackMinMaxS8<MinMaxOperation::Min>(code, ctx, lhs, rhs);
|
||||
});
|
||||
return;
|
||||
}
|
||||
|
||||
EmitTwoArgumentFallback(code, ctx, inst, [](VectorArray<s8>& result, const VectorArray<s8>& a, const VectorArray<s8>& b) {
|
||||
|
|
@ -3183,7 +3204,7 @@ void EmitX64::EmitVectorPairedMinLowerS32(EmitContext& ctx, IR::Inst* inst) {
|
|||
}
|
||||
|
||||
void EmitX64::EmitVectorPairedMinLowerU8(EmitContext& ctx, IR::Inst* inst) {
|
||||
if (code.HasHostFeature(HostFeature::SSE41)) {
|
||||
if (code.HasHostFeature(HostFeature::SSSE3)) {
|
||||
EmitVectorPairedMinMaxLower8(code, ctx, inst, &Xbyak::CodeGenerator::pminub);
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue