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IR: Implement FPRSqrtStepFused

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This commit is contained in:
MerryMage 2018-07-23 22:02:28 +01:00
parent 6eb069e80d
commit 506e544bfe
4 changed files with 27 additions and 0 deletions
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17
src/backend_x64/emit_x64_floating_point.cpp
View file

@ -912,6 +912,23 @@ void EmitX64::EmitFPRSqrtEstimate64(EmitContext& ctx, IR::Inst* inst) {
EmitFPRSqrtEstimate<u64>(code, ctx, inst); EmitFPRSqrtEstimate<u64>(code, ctx, inst);
} }
template<typename FPT>
static void EmitFPRSqrtStepFused(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst);
ctx.reg_alloc.HostCall(inst, args[0], args[1]);
code.mov(code.ABI_PARAM3.cvt32(), ctx.FPCR());
code.lea(code.ABI_PARAM4, code.ptr[code.r15 + code.GetJitStateInfo().offsetof_fpsr_exc]);
code.CallFunction(&FP::FPRSqrtStepFused<FPT>);
}
void EmitX64::EmitFPRSqrtStepFused32(EmitContext& ctx, IR::Inst* inst) {
EmitFPRSqrtStepFused<u32>(code, ctx, inst);
}
void EmitX64::EmitFPRSqrtStepFused64(EmitContext& ctx, IR::Inst* inst) {
EmitFPRSqrtStepFused<u64>(code, ctx, inst);
}
void EmitX64::EmitFPSqrt32(EmitContext& ctx, IR::Inst* inst) { void EmitX64::EmitFPSqrt32(EmitContext& ctx, IR::Inst* inst) {
FPTwoOp32(code, ctx, inst, &Xbyak::CodeGenerator::sqrtss); FPTwoOp32(code, ctx, inst, &Xbyak::CodeGenerator::sqrtss);
} }

7
src/frontend/ir/ir_emitter.cpp
View file

@ -1463,6 +1463,13 @@ U32U64 IREmitter::FPRSqrtEstimate(const U32U64& a) {
return Inst<U64>(Opcode::FPRSqrtEstimate64, a); return Inst<U64>(Opcode::FPRSqrtEstimate64, a);
} }
U32U64 IREmitter::FPRSqrtStepFused(const U32U64& a, const U32U64& b) {
if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::FPRSqrtStepFused32, a, b);
}
return Inst<U64>(Opcode::FPRSqrtStepFused64, a, b);
}
U32U64 IREmitter::FPSqrt(const U32U64& a) { U32U64 IREmitter::FPSqrt(const U32U64& a) {
if (a.GetType() == Type::U32) { if (a.GetType() == Type::U32) {
return Inst<U32>(Opcode::FPSqrt32, a); return Inst<U32>(Opcode::FPSqrt32, a);

1
src/frontend/ir/ir_emitter.h
View file

@ -268,6 +268,7 @@ public:
U32U64 FPNeg(const U32U64& a); U32U64 FPNeg(const U32U64& a);
U32U64 FPRoundInt(const U32U64& a, FP::RoundingMode rounding, bool exact); U32U64 FPRoundInt(const U32U64& a, FP::RoundingMode rounding, bool exact);
U32U64 FPRSqrtEstimate(const U32U64& a); U32U64 FPRSqrtEstimate(const U32U64& a);
U32U64 FPRSqrtStepFused(const U32U64& a, const U32U64& b);
U32U64 FPSqrt(const U32U64& a); U32U64 FPSqrt(const U32U64& a);
U32U64 FPSub(const U32U64& a, const U32U64& b, bool fpscr_controlled); U32U64 FPSub(const U32U64& a, const U32U64& b, bool fpscr_controlled);
U32 FPDoubleToSingle(const U64& a, bool fpscr_controlled); U32 FPDoubleToSingle(const U64& a, bool fpscr_controlled);

2
src/frontend/ir/opcodes.inc
View file

@ -388,6 +388,8 @@ OPCODE(FPRoundInt32, T::U32, T::U32, T::U
OPCODE(FPRoundInt64, T::U64, T::U64, T::U8, T::U1 ) OPCODE(FPRoundInt64, T::U64, T::U64, T::U8, T::U1 )
OPCODE(FPRSqrtEstimate32, T::U32, T::U32 ) OPCODE(FPRSqrtEstimate32, T::U32, T::U32 )
OPCODE(FPRSqrtEstimate64, T::U64, T::U64 ) OPCODE(FPRSqrtEstimate64, T::U64, T::U64 )
OPCODE(FPRSqrtStepFused32, T::U32, T::U32, T::U32 )
OPCODE(FPRSqrtStepFused64, T::U64, T::U64, T::U64 )
OPCODE(FPSqrt32, T::U32, T::U32 ) OPCODE(FPSqrt32, T::U32, T::U32 )
OPCODE(FPSqrt64, T::U64, T::U64 ) OPCODE(FPSqrt64, T::U64, T::U64 )
OPCODE(FPSub32, T::U32, T::U32, T::U32 ) OPCODE(FPSub32, T::U32, T::U32, T::U32 )