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A64CallbackConfigPass: Ensure IR instructions emitted by this pass have correct location descriptors attached

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This commit is contained in:
Merry 2022-07-17 22:36:34 +01:00
parent 786161b416
commit 51a89dbb7a
4 changed files with 6 additions and 5 deletions
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2
src/dynarmic/backend/x64/a64_emit_x64.cpp
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@ -508,7 +508,7 @@ void A64EmitX64::EmitA64ExceptionRaised(A64EmitContext& ctx, IR::Inst* inst) {
void A64EmitX64::EmitA64DataCacheOperationRaised(A64EmitContext& ctx, IR::Inst* inst) { void A64EmitX64::EmitA64DataCacheOperationRaised(A64EmitContext& ctx, IR::Inst* inst) {
auto args = ctx.reg_alloc.GetArgumentInfo(inst); auto args = ctx.reg_alloc.GetArgumentInfo(inst);
ctx.reg_alloc.HostCall(nullptr, {}, args[0], args[1]); ctx.reg_alloc.HostCall(nullptr, {}, args[1], args[2]);
Devirtualize<&A64::UserCallbacks::DataCacheOperationRaised>(conf.callbacks).EmitCall(code); Devirtualize<&A64::UserCallbacks::DataCacheOperationRaised>(conf.callbacks).EmitCall(code);
} }

2
src/dynarmic/frontend/A64/a64_ir_emitter.cpp
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@ -55,7 +55,7 @@ void IREmitter::ExceptionRaised(Exception exception) {
} }
void IREmitter::DataCacheOperationRaised(DataCacheOperation op, const IR::U64& value) { void IREmitter::DataCacheOperationRaised(DataCacheOperation op, const IR::U64& value) {
Inst(Opcode::A64DataCacheOperationRaised, Imm64(static_cast<u64>(op)), value); Inst(Opcode::A64DataCacheOperationRaised, ImmCurrentLocationDescriptor(), Imm64(static_cast<u64>(op)), value);
} }
void IREmitter::InstructionCacheOperationRaised(InstructionCacheOperation op, const IR::U64& value) { void IREmitter::InstructionCacheOperationRaised(InstructionCacheOperation op, const IR::U64& value) {

2
src/dynarmic/ir/opcodes.inc
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@ -69,7 +69,7 @@ A64OPC(OrQC, Void, U1
A64OPC(SetPC, Void, U64 ) A64OPC(SetPC, Void, U64 )
A64OPC(CallSupervisor, Void, U32 ) A64OPC(CallSupervisor, Void, U32 )
A64OPC(ExceptionRaised, Void, U64, U64 ) A64OPC(ExceptionRaised, Void, U64, U64 )
A64OPC(DataCacheOperationRaised, Void, U64, U64 ) A64OPC(DataCacheOperationRaised, Void, U64, U64, U64 )
A64OPC(InstructionCacheOperationRaised, Void, U64, U64 ) A64OPC(InstructionCacheOperationRaised, Void, U64, U64 )
A64OPC(DataSynchronizationBarrier, Void, ) A64OPC(DataSynchronizationBarrier, Void, )
A64OPC(DataMemoryBarrier, Void, ) A64OPC(DataMemoryBarrier, Void, )

5
src/dynarmic/ir/opt/a64_callback_config_pass.cpp
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@ -22,13 +22,14 @@ void A64CallbackConfigPass(IR::Block& block, const A64::UserConfig& conf) {
continue; continue;
} }
const auto op = static_cast<A64::DataCacheOperation>(inst.GetArg(0).GetU64()); const auto op = static_cast<A64::DataCacheOperation>(inst.GetArg(1).GetU64());
if (op == A64::DataCacheOperation::ZeroByVA) { if (op == A64::DataCacheOperation::ZeroByVA) {
A64::IREmitter ir{block}; A64::IREmitter ir{block};
ir.current_location = A64::LocationDescriptor{IR::LocationDescriptor{inst.GetArg(0).GetU64()}};
ir.SetInsertionPoint(&inst); ir.SetInsertionPoint(&inst);
size_t bytes = 4 << static_cast<size_t>(conf.dczid_el0 & 0b1111); size_t bytes = 4 << static_cast<size_t>(conf.dczid_el0 & 0b1111);
IR::U64 addr{inst.GetArg(1)}; IR::U64 addr{inst.GetArg(2)};
const IR::U128 zero_u128 = ir.ZeroExtendToQuad(ir.Imm64(0)); const IR::U128 zero_u128 = ir.ZeroExtendToQuad(ir.Imm64(0));
while (bytes >= 16) { while (bytes >= 16) {