emit_x64_vector_saturated: Consolidate unsigned operations into EmitVectorUnsignedSaturated
This commit is contained in:
Merry
parent
a76e8c8827
commit
56e3bf57d2
1 changed files with 98 additions and 223 deletions
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@ -157,6 +157,100 @@ void EmitVectorSignedSaturated(BlockOfCode& code, EmitContext& ctx, IR::Inst* in
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}
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}
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template<Op op, size_t esize>
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void EmitVectorUnsignedSaturated(BlockOfCode& code, EmitContext& ctx, IR::Inst* inst) {
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static_assert(esize == 32 || esize == 64);
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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if (code.HasHostFeature(HostFeature::AVX512_Ortho | HostFeature::AVX512DQ)) {
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const Xbyak::Xmm operand1 = ctx.reg_alloc.UseXmm(args[0]);
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const Xbyak::Xmm operand2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Reg8 overflow = ctx.reg_alloc.ScratchGpr().cvt8();
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if constexpr (op == Op::Add) {
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ICODE(vpadd)(result, operand1, operand2);
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ICODE(vpcmpu)(k1, result, operand1, CmpInt::LessThan);
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ICODE(vpternlog)(result | k1, result, result, u8(0xFF));
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} else {
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ICODE(vpsub)(result, operand1, operand2);
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ICODE(vpcmpu)(k1, result, operand1, CmpInt::GreaterThan);
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ICODE(vpxor)(result | k1, result, result);
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}
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code.ktestb(k1, k1);
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code.setnz(overflow);
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code.or_(code.byte[code.r15 + code.GetJitStateInfo().offsetof_fpsr_qc], overflow);
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ctx.reg_alloc.DefineValue(inst, result);
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return;
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}
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const Xbyak::Xmm operand1 = code.HasHostFeature(HostFeature::AVX) ? ctx.reg_alloc.UseXmm(args[0]) : ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm operand2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm result = code.HasHostFeature(HostFeature::AVX) ? ctx.reg_alloc.ScratchXmm() : operand1;
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const Xbyak::Reg8 overflow = ctx.reg_alloc.ScratchGpr().cvt8();
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const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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if constexpr (op == Op::Add) {
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if (code.HasHostFeature(HostFeature::AVX)) {
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code.vpxor(xmm0, operand1, operand2);
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code.vpand(tmp, operand1, operand2);
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ICODE(vpadd)(result, operand1, operand2);
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} else {
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code.movaps(tmp, operand1);
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code.movaps(xmm0, operand1);
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code.pxor(xmm0, operand2);
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code.pand(tmp, operand2);
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ICODE(padd)(result, operand2);
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}
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ICODE(psrl)(xmm0, 1);
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ICODE(padd)(tmp, xmm0);
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} else {
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if (code.HasHostFeature(HostFeature::AVX)) {
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code.vpxor(tmp, operand1, operand2);
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ICODE(vpsub)(result, operand1, operand2);
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code.vpand(xmm0, operand2, tmp);
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} else {
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code.movaps(tmp, operand1);
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code.movaps(xmm0, operand2);
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code.pxor(tmp, operand2);
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ICODE(psub)(result, operand2);
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code.pand(xmm0, tmp);
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}
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ICODE(psrl)(tmp, 1);
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ICODE(psub)(tmp, xmm0);
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}
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code.psrad(tmp, 31);
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if constexpr (esize == 64) {
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code.pshufd(tmp, tmp, 0b11110101);
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}
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if (code.HasHostFeature(HostFeature::SSE41)) {
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code.ptest(tmp, tmp);
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} else {
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FCODE(movmskp)(overflow.cvt32(), tmp);
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code.test(overflow.cvt32(), overflow.cvt32());
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}
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code.setnz(overflow);
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code.or_(code.byte[code.r15 + code.GetJitStateInfo().offsetof_fpsr_qc], overflow);
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if constexpr (op == Op::Add) {
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code.por(result, tmp);
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ctx.reg_alloc.DefineValue(inst, result);
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} else {
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code.pandn(tmp, result);
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ctx.reg_alloc.DefineValue(inst, tmp);
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}
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}
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} // anonymous namespace
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void EmitX64::EmitVectorSignedSaturatedAdd8(EmitContext& ctx, IR::Inst* inst) {
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@ -200,123 +294,11 @@ void EmitX64::EmitVectorUnsignedSaturatedAdd16(EmitContext& ctx, IR::Inst* inst)
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}
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void EmitX64::EmitVectorUnsignedSaturatedAdd32(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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if (code.HasHostFeature(HostFeature::AVX512_Ortho | HostFeature::AVX512DQ)) {
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const Xbyak::Xmm operand1 = ctx.reg_alloc.UseXmm(args[0]);
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const Xbyak::Xmm operand2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Reg8 overflow = ctx.reg_alloc.ScratchGpr().cvt8();
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code.vpaddd(result, operand1, operand2);
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code.vpcmpud(k1, result, operand2, CmpInt::LessThan);
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code.vpternlogd(result | k1, result, result, 0xFF);
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code.ktestb(k1, k1);
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code.setnz(overflow);
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code.or_(code.byte[code.r15 + code.GetJitStateInfo().offsetof_fpsr_qc], overflow);
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ctx.reg_alloc.DefineValue(inst, result);
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return;
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}
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const Xbyak::Xmm operand1 = code.HasHostFeature(HostFeature::AVX) ? ctx.reg_alloc.UseXmm(args[0]) : ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm operand2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm result = code.HasHostFeature(HostFeature::AVX) ? ctx.reg_alloc.ScratchXmm() : operand1;
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const Xbyak::Reg8 overflow = ctx.reg_alloc.ScratchGpr().cvt8();
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const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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if (code.HasHostFeature(HostFeature::AVX)) {
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code.vpxor(xmm0, operand1, operand2);
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code.vpand(tmp, operand1, operand2);
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code.vpaddd(result, operand1, operand2);
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} else {
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code.movaps(tmp, operand1);
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code.movaps(xmm0, operand1);
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code.pxor(xmm0, operand2);
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code.pand(tmp, operand2);
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code.paddd(result, operand2);
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}
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code.psrld(xmm0, 1);
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code.paddd(tmp, xmm0);
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code.psrad(tmp, 31);
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code.por(result, tmp);
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if (code.HasHostFeature(HostFeature::SSE41)) {
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code.ptest(tmp, tmp);
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} else {
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code.movmskps(overflow.cvt32(), tmp);
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code.test(overflow.cvt32(), overflow.cvt32());
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}
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code.setnz(overflow);
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code.or_(code.byte[code.r15 + code.GetJitStateInfo().offsetof_fpsr_qc], overflow);
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ctx.reg_alloc.DefineValue(inst, result);
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EmitVectorUnsignedSaturated<Op::Add, 32>(code, ctx, inst);
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}
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void EmitX64::EmitVectorUnsignedSaturatedAdd64(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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if (code.HasHostFeature(HostFeature::AVX512_Ortho | HostFeature::AVX512DQ)) {
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const Xbyak::Xmm operand1 = ctx.reg_alloc.UseXmm(args[0]);
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const Xbyak::Xmm operand2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Reg8 overflow = ctx.reg_alloc.ScratchGpr().cvt8();
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code.vpaddq(result, operand1, operand2);
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code.vpcmpuq(k1, result, operand1, CmpInt::LessThan);
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code.vpternlogq(result | k1, result, result, 0xFF);
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code.ktestb(k1, k1);
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code.setnz(overflow);
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code.or_(code.byte[code.r15 + code.GetJitStateInfo().offsetof_fpsr_qc], overflow);
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ctx.reg_alloc.DefineValue(inst, result);
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return;
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}
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const Xbyak::Xmm operand1 = code.HasHostFeature(HostFeature::AVX) ? ctx.reg_alloc.UseXmm(args[0]) : ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm operand2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm result = code.HasHostFeature(HostFeature::AVX) ? ctx.reg_alloc.ScratchXmm() : operand1;
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const Xbyak::Reg8 overflow = ctx.reg_alloc.ScratchGpr().cvt8();
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const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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if (code.HasHostFeature(HostFeature::AVX)) {
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code.vpxor(xmm0, operand1, operand2);
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code.vpand(tmp, operand1, operand2);
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code.vpaddq(result, operand1, operand2);
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} else {
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code.movaps(xmm0, operand1);
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code.movaps(tmp, operand1);
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code.pxor(xmm0, operand2);
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code.pand(tmp, operand2);
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code.paddq(result, operand2);
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}
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code.psrlq(xmm0, 1);
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code.paddq(tmp, xmm0);
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code.psrad(tmp, 31);
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code.pshufd(tmp, tmp, 0b11110101);
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code.por(result, tmp);
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if (code.HasHostFeature(HostFeature::SSE41)) {
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code.ptest(tmp, tmp);
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} else {
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code.movmskpd(overflow.cvt32(), tmp);
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code.test(overflow.cvt32(), overflow.cvt32());
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}
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code.setnz(overflow);
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code.or_(code.byte[code.r15 + code.GetJitStateInfo().offsetof_fpsr_qc], overflow);
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ctx.reg_alloc.DefineValue(inst, result);
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EmitVectorUnsignedSaturated<Op::Add, 64>(code, ctx, inst);
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}
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void EmitX64::EmitVectorUnsignedSaturatedSub8(EmitContext& ctx, IR::Inst* inst) {
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@ -328,118 +310,11 @@ void EmitX64::EmitVectorUnsignedSaturatedSub16(EmitContext& ctx, IR::Inst* inst)
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}
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void EmitX64::EmitVectorUnsignedSaturatedSub32(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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if (code.HasHostFeature(HostFeature::AVX512_Ortho | HostFeature::AVX512DQ)) {
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const Xbyak::Xmm operand1 = ctx.reg_alloc.UseXmm(args[0]);
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const Xbyak::Xmm operand2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Reg8 overflow = ctx.reg_alloc.ScratchGpr().cvt8();
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code.vpsubd(result, operand1, operand2);
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code.vpcmpud(k1, result, operand1, CmpInt::GreaterThan);
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code.vpxord(result | k1, result, result);
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code.ktestb(k1, k1);
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code.setnz(overflow);
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code.or_(code.byte[code.r15 + code.GetJitStateInfo().offsetof_fpsr_qc], overflow);
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ctx.reg_alloc.DefineValue(inst, result);
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return;
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}
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const Xbyak::Xmm operand1 = code.HasHostFeature(HostFeature::AVX) ? ctx.reg_alloc.UseXmm(args[0]) : ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm operand2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm result = code.HasHostFeature(HostFeature::AVX) ? ctx.reg_alloc.ScratchXmm() : operand1;
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const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Reg8 overflow = ctx.reg_alloc.ScratchGpr().cvt8();
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if (code.HasHostFeature(HostFeature::AVX)) {
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code.vpxor(tmp, operand1, operand2);
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code.vpsubd(result, operand1, operand2);
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code.vpand(xmm0, operand2, tmp);
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} else {
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code.movaps(tmp, operand1);
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code.movaps(xmm0, operand2);
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code.pxor(tmp, operand2);
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code.psubd(result, operand2);
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code.pand(xmm0, tmp);
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}
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code.psrld(tmp, 1);
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code.psubd(tmp, xmm0);
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code.psrad(tmp, 31);
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if (code.HasHostFeature(HostFeature::SSE41)) {
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code.ptest(tmp, tmp);
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} else {
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code.movmskps(overflow.cvt32(), tmp);
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code.test(overflow.cvt32(), overflow.cvt32());
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}
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code.setnz(overflow);
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code.or_(code.byte[code.r15 + code.GetJitStateInfo().offsetof_fpsr_qc], overflow);
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code.pandn(tmp, result);
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ctx.reg_alloc.DefineValue(inst, tmp);
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EmitVectorUnsignedSaturated<Op::Sub, 32>(code, ctx, inst);
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}
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void EmitX64::EmitVectorUnsignedSaturatedSub64(EmitContext& ctx, IR::Inst* inst) {
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auto args = ctx.reg_alloc.GetArgumentInfo(inst);
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if (code.HasHostFeature(HostFeature::AVX512_Ortho | HostFeature::AVX512DQ)) {
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const Xbyak::Xmm operand1 = ctx.reg_alloc.UseXmm(args[0]);
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const Xbyak::Xmm operand2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm result = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Reg8 overflow = ctx.reg_alloc.ScratchGpr().cvt8();
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code.vpsubq(result, operand1, operand2);
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code.vpcmpuq(k1, result, operand1, CmpInt::GreaterThan);
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code.vpxorq(result | k1, result, result);
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code.ktestb(k1, k1);
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code.setnz(overflow);
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code.or_(code.byte[code.r15 + code.GetJitStateInfo().offsetof_fpsr_qc], overflow);
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ctx.reg_alloc.DefineValue(inst, result);
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return;
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}
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const Xbyak::Xmm operand1 = code.HasHostFeature(HostFeature::AVX) ? ctx.reg_alloc.UseXmm(args[0]) : ctx.reg_alloc.UseScratchXmm(args[0]);
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const Xbyak::Xmm operand2 = ctx.reg_alloc.UseXmm(args[1]);
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const Xbyak::Xmm result = code.HasHostFeature(HostFeature::AVX) ? ctx.reg_alloc.ScratchXmm() : operand1;
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const Xbyak::Xmm tmp = ctx.reg_alloc.ScratchXmm();
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const Xbyak::Reg8 overflow = ctx.reg_alloc.ScratchGpr().cvt8();
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if (code.HasHostFeature(HostFeature::AVX)) {
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code.vpxor(tmp, operand1, operand2);
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code.vpsubq(result, operand1, operand2);
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code.vpand(xmm0, operand2, tmp);
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} else {
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code.movaps(tmp, operand1);
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code.movaps(xmm0, operand2);
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code.pxor(tmp, operand2);
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code.psubq(result, operand2);
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code.pand(xmm0, tmp);
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}
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code.psrlq(tmp, 1);
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code.psubq(tmp, xmm0);
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code.psrad(tmp, 31);
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code.pshufd(tmp, tmp, 0b11110101);
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if (code.HasHostFeature(HostFeature::SSE41)) {
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code.ptest(tmp, tmp);
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} else {
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code.movmskpd(overflow.cvt32(), tmp);
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code.test(overflow.cvt32(), overflow.cvt32());
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}
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code.setnz(overflow);
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code.or_(code.byte[code.r15 + code.GetJitStateInfo().offsetof_fpsr_qc], overflow);
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code.pandn(tmp, result);
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ctx.reg_alloc.DefineValue(inst, tmp);
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EmitVectorUnsignedSaturated<Op::Sub, 64>(code, ctx, inst);
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}
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} // namespace Dynarmic::Backend::X64
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