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translate_arm: Simplify EmitImmShift and EmitRegShift

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MerryMage 2016-08-19 00:21:31 +01:00
parent fe9329ef3e
commit 5869e79b9c
1 changed files with 15 additions and 25 deletions
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40
src/frontend/translate/translate_arm.cpp
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@ -98,48 +98,38 @@ bool ArmTranslatorVisitor::LinkToNextInstruction() {
} }
IREmitter::ResultAndCarry ArmTranslatorVisitor::EmitImmShift(IR::Value value, ShiftType type, Imm5 imm5, IR::Value carry_in) { IREmitter::ResultAndCarry ArmTranslatorVisitor::EmitImmShift(IR::Value value, ShiftType type, Imm5 imm5, IR::Value carry_in) {
IREmitter::ResultAndCarry result_and_carry; switch (type) {
switch (type)
{
case ShiftType::LSL: case ShiftType::LSL:
result_and_carry = ir.LogicalShiftLeft(value, ir.Imm8(imm5), carry_in); return ir.LogicalShiftLeft(value, ir.Imm8(imm5), carry_in);
break;
case ShiftType::LSR: case ShiftType::LSR:
imm5 = imm5 ? imm5 : 32; imm5 = imm5 ? imm5 : 32;
result_and_carry = ir.LogicalShiftRight(value, ir.Imm8(imm5), carry_in); return ir.LogicalShiftRight(value, ir.Imm8(imm5), carry_in);
break;
case ShiftType::ASR: case ShiftType::ASR:
imm5 = imm5 ? imm5 : 32; imm5 = imm5 ? imm5 : 32;
result_and_carry = ir.ArithmeticShiftRight(value, ir.Imm8(imm5), carry_in); return ir.ArithmeticShiftRight(value, ir.Imm8(imm5), carry_in);
break;
case ShiftType::ROR: case ShiftType::ROR:
if (imm5) if (imm5)
result_and_carry = ir.RotateRight(value, ir.Imm8(imm5), carry_in); return ir.RotateRight(value, ir.Imm8(imm5), carry_in);
else else
result_and_carry = ir.RotateRightExtended(value, carry_in); return ir.RotateRightExtended(value, carry_in);
break;
} }
return result_and_carry; ASSERT_MSG(false, "Unreachable");
return {};
} }
IREmitter::ResultAndCarry ArmTranslatorVisitor::EmitRegShift(IR::Value value, ShiftType type, IR::Value amount, IR::Value carry_in) { IREmitter::ResultAndCarry ArmTranslatorVisitor::EmitRegShift(IR::Value value, ShiftType type, IR::Value amount, IR::Value carry_in) {
IREmitter::ResultAndCarry result_and_carry; switch (type) {
switch (type)
{
case ShiftType::LSL: case ShiftType::LSL:
result_and_carry = ir.LogicalShiftLeft(value, amount, carry_in); return ir.LogicalShiftLeft(value, amount, carry_in);
break;
case ShiftType::LSR: case ShiftType::LSR:
result_and_carry = ir.LogicalShiftRight(value, amount, carry_in); return ir.LogicalShiftRight(value, amount, carry_in);
break;
case ShiftType::ASR: case ShiftType::ASR:
result_and_carry = ir.ArithmeticShiftRight(value, amount, carry_in); return ir.ArithmeticShiftRight(value, amount, carry_in);
break;
case ShiftType::ROR: case ShiftType::ROR:
result_and_carry = ir.RotateRight(value, amount, carry_in); return ir.RotateRight(value, amount, carry_in);
break;
} }
return result_and_carry; ASSERT_MSG(false, "Unreachable");
return {};
} }
} // namespace Arm } // namespace Arm