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A64: Implement NEG (vector)

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This commit is contained in:
MerryMage 2018-02-20 15:38:45 +00:00
parent 710d09471b
commit 58fbb3ff1b
2 changed files with 16 additions and 1 deletions
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2
src/frontend/A64/decoder/a64.inc
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@ -620,7 +620,7 @@ INST(XTN, "XTN, XTN2", "0Q001
//INST(SQNEG_2, "SQNEG", "0Q101110zz100000011110nnnnnddddd")
//INST(CMGE_zero_2, "CMGE (zero)", "0Q101110zz100000100010nnnnnddddd")
//INST(CMLE_2, "CMLE (zero)", "0Q101110zz100000100110nnnnnddddd")
//INST(NEG_2, "NEG (vector)", "0Q101110zz100000101110nnnnnddddd")
INST(NEG_2, "NEG (vector)", "0Q101110zz100000101110nnnnnddddd")
//INST(SQXTUN_2, "SQXTUN, SQXTUN2", "0Q101110zz100001001010nnnnnddddd")
//INST(SHLL, "SHLL, SHLL2", "0Q101110zz100001001110nnnnnddddd")
//INST(UQXTN_2, "UQXTN, UQXTN2", "0Q101110zz100001010010nnnnnddddd")

15
src/frontend/A64/translate/impl/simd_two_register_misc.cpp
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@ -81,6 +81,21 @@ bool TranslatorVisitor::XTN(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
return true;
}
bool TranslatorVisitor::NEG_2(bool Q, Imm<2> size, Vec Vn, Vec Vd) {
if (size == 0b11 && !Q) {
return ReservedValue();
}
const size_t esize = 8 << size.ZeroExtend<size_t>();
const size_t datasize = Q ? 128 : 64;
const IR::U128 operand = V(datasize, Vn);
const IR::U128 zero = ir.ZeroVector();
const IR::U128 result = ir.VectorSub(esize, zero, operand);
V(datasize, Vd, result);
return true;
}
bool TranslatorVisitor::NOT(bool Q, Vec Vn, Vec Vd) {
const size_t datasize = Q ? 128 : 64;