thumb32: Implement TST (immediate)

This commit is contained in:
MerryMage 2021-02-18 01:05:45 +00:00
parent 069beb5228
commit 5bf676d93e
4 changed files with 29 additions and 1 deletions

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@ -156,6 +156,7 @@ if ("A32" IN_LIST DYNARMIC_FRONTENDS)
frontend/A32/translate/impl/thumb32_branch.cpp frontend/A32/translate/impl/thumb32_branch.cpp
frontend/A32/translate/impl/thumb32_control.cpp frontend/A32/translate/impl/thumb32_control.cpp
frontend/A32/translate/impl/thumb32_data_processing_register.cpp frontend/A32/translate/impl/thumb32_data_processing_register.cpp
frontend/A32/translate/impl/thumb32_data_processing_modified_immediate.cpp
frontend/A32/translate/impl/thumb32_long_multiply.cpp frontend/A32/translate/impl/thumb32_long_multiply.cpp
frontend/A32/translate/impl/thumb32_misc.cpp frontend/A32/translate/impl/thumb32_misc.cpp
frontend/A32/translate/impl/thumb32_multiply.cpp frontend/A32/translate/impl/thumb32_multiply.cpp

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@ -53,7 +53,7 @@
//INST(thumb32_RSB_reg, "RSB (reg)", "11101011110---------------------") //INST(thumb32_RSB_reg, "RSB (reg)", "11101011110---------------------")
// Data Processing (Modified Immediate) // Data Processing (Modified Immediate)
//INST(thumb32_TST_imm, "TST (imm)", "11110-000001----0---1111--------") INST(thumb32_TST_imm, "TST (imm)", "11110v000001nnnn0vvv1111vvvvvvvv")
//INST(thumb32_AND_imm, "AND (imm)", "11110-00000-----0---------------") //INST(thumb32_AND_imm, "AND (imm)", "11110-00000-----0---------------")
//INST(thumb32_BIC_imm, "BIC (imm)", "11110-00001-----0---------------") //INST(thumb32_BIC_imm, "BIC (imm)", "11110-00001-----0---------------")
//INST(thumb32_MOV_imm, "MOV (imm)", "11110000010-11110---------------") //INST(thumb32_MOV_imm, "MOV (imm)", "11110000010-11110---------------")

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@ -0,0 +1,24 @@
/* This file is part of the dynarmic project.
* Copyright (c) 2021 MerryMage
* SPDX-License-Identifier: 0BSD
*/
#include "frontend/A32/translate/impl/translate_thumb.h"
namespace Dynarmic::A32 {
bool ThumbTranslatorVisitor::thumb32_TST_imm(Imm<1> i, Reg n, Imm<3> imm3, Imm<8> imm8) {
if (n == Reg::PC) {
return UnpredictableInstruction();
}
const auto imm_carry = ThumbExpandImm_C(rotate, imm8, ir.GetCFlag());
const auto result = ir.And(ir.GetRegister(n), ir.Imm32(imm_carry.imm32));
ir.SetNFlag(ir.MostSignificantBit(result));
ir.SetZFlag(ir.IsZero(result));
ir.SetCFlag(imm_carry.carry);
return true;
}
} // namespace Dynarmic::A32

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@ -148,6 +148,9 @@ struct ThumbTranslatorVisitor final {
bool thumb16_B_t1(Cond cond, Imm<8> imm8); bool thumb16_B_t1(Cond cond, Imm<8> imm8);
bool thumb16_B_t2(Imm<11> imm11); bool thumb16_B_t2(Imm<11> imm11);
// thumb32 data processing (modified immediate) instructions
bool thumb32_TST_imm(Imm<1> i, Reg n, Imm<3> imm3, Imm<8> imm8);
// thumb32 miscellaneous control instructions // thumb32 miscellaneous control instructions
bool thumb32_UDF(); bool thumb32_UDF();