Add simplified LogicalShiftRight64 IR opcode

This commit is contained in:
Tillmann Karras 2016-08-07 14:23:33 +01:00 committed by MerryMage
parent ccb2aa96a5
commit 5d26899ac9
4 changed files with 17 additions and 0 deletions

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@ -592,6 +592,17 @@ void EmitX64::EmitLogicalShiftRight(IR::Block& block, IR::Inst* inst) {
} }
} }
void EmitX64::EmitLogicalShiftRight64(IR::Block& block, IR::Inst* inst) {
X64Reg result = reg_alloc.UseDefRegister(inst->GetArg(0), inst, any_gpr);
auto shift_arg = inst->GetArg(1);
ASSERT_MSG(shift_arg.IsImmediate(), "variable 64 bit shifts are not implemented");
u8 shift = shift_arg.GetU8();
ASSERT_MSG(shift < 64, "shift width clamping is not implemented");
code->SHR(64, R(result), Imm8(shift));
}
void EmitX64::EmitArithmeticShiftRight(IR::Block& block, IR::Inst* inst) { void EmitX64::EmitArithmeticShiftRight(IR::Block& block, IR::Inst* inst) {
auto carry_inst = FindUseWithOpcode(inst, IR::Opcode::GetCarryFromOp); auto carry_inst = FindUseWithOpcode(inst, IR::Opcode::GetCarryFromOp);

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@ -169,6 +169,10 @@ IREmitter::ResultAndCarry IREmitter::LogicalShiftRight(const IR::Value& value_in
return {result, carry_out}; return {result, carry_out};
} }
IR::Value IREmitter::LogicalShiftRight64(const IR::Value& value_in, const IR::Value& shift_amount) {
return Inst(IR::Opcode::LogicalShiftRight64, {value_in, shift_amount});
}
IREmitter::ResultAndCarry IREmitter::ArithmeticShiftRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in) { IREmitter::ResultAndCarry IREmitter::ArithmeticShiftRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in) {
auto result = Inst(IR::Opcode::ArithmeticShiftRight, {value_in, shift_amount, carry_in}); auto result = Inst(IR::Opcode::ArithmeticShiftRight, {value_in, shift_amount, carry_in});
auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result}); auto carry_out = Inst(IR::Opcode::GetCarryFromOp, {result});

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@ -68,6 +68,7 @@ public:
ResultAndCarry LogicalShiftLeft(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in); ResultAndCarry LogicalShiftLeft(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in);
ResultAndCarry LogicalShiftRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in); ResultAndCarry LogicalShiftRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in);
IR::Value LogicalShiftRight64(const IR::Value& value_in, const IR::Value& shift_amount);
ResultAndCarry ArithmeticShiftRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in); ResultAndCarry ArithmeticShiftRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in);
ResultAndCarry RotateRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in); ResultAndCarry RotateRight(const IR::Value& value_in, const IR::Value& shift_amount, const IR::Value& carry_in);
ResultAndCarry RotateRightExtended(const IR::Value& value_in, const IR::Value& carry_in); ResultAndCarry RotateRightExtended(const IR::Value& value_in, const IR::Value& carry_in);

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@ -37,6 +37,7 @@ OPCODE(IsZero, T::U1, T::U32
OPCODE(IsZero64, T::U1, T::U64 ) OPCODE(IsZero64, T::U1, T::U64 )
OPCODE(LogicalShiftLeft, T::U32, T::U32, T::U8, T::U1 ) OPCODE(LogicalShiftLeft, T::U32, T::U32, T::U8, T::U1 )
OPCODE(LogicalShiftRight, T::U32, T::U32, T::U8, T::U1 ) OPCODE(LogicalShiftRight, T::U32, T::U32, T::U8, T::U1 )
OPCODE(LogicalShiftRight64, T::U64, T::U64, T::U8 )
OPCODE(ArithmeticShiftRight, T::U32, T::U32, T::U8, T::U1 ) OPCODE(ArithmeticShiftRight, T::U32, T::U32, T::U8, T::U1 )
OPCODE(RotateRight, T::U32, T::U32, T::U8, T::U1 ) OPCODE(RotateRight, T::U32, T::U32, T::U8, T::U1 )
OPCODE(RotateRightExtended, T::U32, T::U32, T::U1 ) OPCODE(RotateRightExtended, T::U32, T::U32, T::U1 )