thumb32: Implement QDADD

This commit is contained in:
Lioncash 2021-02-01 15:39:15 -05:00
parent d96c8c662b
commit 65365ad2a3
4 changed files with 32 additions and 1 deletions

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@ -276,7 +276,7 @@ std::optional<std::reference_wrapper<const Thumb32Matcher<V>>> DecodeThumb32(u32
// Miscellaneous Operations // Miscellaneous Operations
//INST(&V::thumb32_QADD, "QADD", "111110101000----1111----1000----"), //INST(&V::thumb32_QADD, "QADD", "111110101000----1111----1000----"),
//INST(&V::thumb32_QDADD, "QDADD", "111110101000----1111----1001----"), INST(&V::thumb32_QDADD, "QDADD", "111110101000nnnn1111dddd1001mmmm"),
//INST(&V::thumb32_QSUB, "QSUB", "111110101000----1111----1010----"), //INST(&V::thumb32_QSUB, "QSUB", "111110101000----1111----1010----"),
INST(&V::thumb32_QDSUB, "QDSUB", "111110101000nnnn1111dddd1011mmmm"), INST(&V::thumb32_QDSUB, "QDSUB", "111110101000nnnn1111dddd1011mmmm"),
INST(&V::thumb32_REV, "REV", "111110101001nnnn1111dddd1000mmmm"), INST(&V::thumb32_REV, "REV", "111110101001nnnn1111dddd1000mmmm"),

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@ -19,6 +19,22 @@ bool ThumbTranslatorVisitor::thumb32_CLZ(Reg n, Reg d, Reg m) {
return true; return true;
} }
bool ThumbTranslatorVisitor::thumb32_QDADD(Reg n, Reg d, Reg m) {
if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction();
}
const auto reg_m = ir.GetRegister(m);
const auto reg_n = ir.GetRegister(n);
const auto doubled_n = ir.SignedSaturatedAdd(reg_n, reg_n);
ir.OrQFlag(doubled_n.overflow);
const auto result = ir.SignedSaturatedAdd(reg_m, doubled_n.result);
ir.SetRegister(d, result.result);
ir.OrQFlag(result.overflow);
return true;
}
bool ThumbTranslatorVisitor::thumb32_QDSUB(Reg n, Reg d, Reg m) { bool ThumbTranslatorVisitor::thumb32_QDSUB(Reg n, Reg d, Reg m) {
if (d == Reg::PC || n == Reg::PC || m == Reg::PC) { if (d == Reg::PC || n == Reg::PC || m == Reg::PC) {
return UnpredictableInstruction(); return UnpredictableInstruction();

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@ -118,6 +118,7 @@ struct ThumbTranslatorVisitor final {
// thumb32 miscellaneous instructions // thumb32 miscellaneous instructions
bool thumb32_CLZ(Reg n, Reg d, Reg m); bool thumb32_CLZ(Reg n, Reg d, Reg m);
bool thumb32_QDADD(Reg n, Reg d, Reg m);
bool thumb32_QDSUB(Reg n, Reg d, Reg m); bool thumb32_QDSUB(Reg n, Reg d, Reg m);
bool thumb32_RBIT(Reg n, Reg d, Reg m); bool thumb32_RBIT(Reg n, Reg d, Reg m);
bool thumb32_REV(Reg n, Reg d, Reg m); bool thumb32_REV(Reg n, Reg d, Reg m);

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@ -369,6 +369,20 @@ TEST_CASE("Fuzz Thumb32 instructions set", "[JitX64][Thumb][Thumb32]") {
const auto n = Common::Bits<16, 19>(inst); const auto n = Common::Bits<16, 19>(inst);
return m == n && d != 15 && m != 15; return m == n && d != 15 && m != 15;
}), }),
ThumbInstGen("111110101000nnnn1111dddd1001mmmm", // QDADD
[](u32 inst) {
const auto d = Common::Bits<8, 11>(inst);
const auto m = Common::Bits<0, 3>(inst);
const auto n = Common::Bits<16, 19>(inst);
return d != 15 && m != 15 && n != 15;
}),
ThumbInstGen("111110101000nnnn1111dddd1011mmmm", // QDSUB
[](u32 inst) {
const auto d = Common::Bits<8, 11>(inst);
const auto m = Common::Bits<0, 3>(inst);
const auto n = Common::Bits<16, 19>(inst);
return d != 15 && m != 15 && n != 15;
}),
ThumbInstGen("111110101001nnnn1111dddd1010mmmm", // RBIT ThumbInstGen("111110101001nnnn1111dddd1010mmmm", // RBIT
[](u32 inst) { [](u32 inst) {
const auto d = Common::Bits<8, 11>(inst); const auto d = Common::Bits<8, 11>(inst);