mirrors/dynarmic
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

Implement thumb1_TST_reg

Browse source
This commit is contained in:
MerryMage 2016-07-10 08:35:58 +08:00
parent 8145b33882
commit 6536ad9618
3 changed files with 13 additions and 2 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

4
src/frontend/decoder/thumb1.h
View file

@ -56,7 +56,7 @@ private:
};
template <typename V>
static const std::array<Thumb1Matcher<V>, 21> g_thumb1_instruction_table {{
static const std::array<Thumb1Matcher<V>, 22> g_thumb1_instruction_table {{
#define INST(fn, name, bitstring) detail::detail<Thumb1Matcher, u16, 16>::GetMatcher<decltype(fn), fn>(name, bitstring)
@ -82,7 +82,7 @@ static const std::array<Thumb1Matcher<V>, 21> g_thumb1_instruction_table {{
{ INST(&V::thumb1_ADC_reg, "ADC (reg)", "0100000101mmmddd") },
{ INST(&V::thumb1_SBC_reg, "SBC (reg)", "0100000110mmmddd") },
{ INST(&V::thumb1_ROR_reg, "ROR (reg)", "0100000111sssddd") },
//{ INST(&V::thumb1_TST_rr, "TST (rr)", "0100001000mmmnnn") },
{ INST(&V::thumb1_TST_reg, "TST (reg)", "0100001000mmmnnn") },
//{ INST(&V::thumb1_NEGS_rr, "NEGS (rr)", "0100001001mmmddd") },
//{ INST(&V::thumb1_CMP_rr, "CMP (rr)", "0100001010mmmnnn") },
//{ INST(&V::thumb1_CMN_rr, "CMN (rr)", "0100001011mmmnnn") },

4
src/frontend/disassembler_thumb.cpp
View file

@ -178,6 +178,10 @@ public:
return Common::StringFromFormat("rors %s, %s", RegStr(d_n), RegStr(m));
}
std::string thumb1_TST_reg(Reg m, Reg n) {
return Common::StringFromFormat("tst %s, %s", RegStr(n), RegStr(m));
}
std::string thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) {
Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo;
return Common::StringFromFormat("add %s, %s", RegStr(d_n), RegStr(m));

7
src/frontend/translate_thumb.cpp
View file

@ -251,6 +251,13 @@ struct TranslatorVisitor final {
ir.SetCFlag(result.carry);
return true;
}
bool thumb1_TST_reg(Reg m, Reg n) {
// TST <Rn>, <Rm>
auto result = ir.And(ir.GetRegister(n), ir.GetRegister(m));
ir.SetNFlag(ir.MostSignificantBit(result));
ir.SetZFlag(ir.IsZero(result));
return true;
}
bool thumb1_ADD_reg_t2(bool d_n_hi, Reg m, Reg d_n_lo) {
Reg d_n = d_n_hi ? (d_n_lo + 8) : d_n_lo;